diff --git a/arch/arm/src/armv7-a/arm_schedulesigaction.c b/arch/arm/src/armv7-a/arm_schedulesigaction.c
index 35b71afb71..0ec3a1e15b 100644
--- a/arch/arm/src/armv7-a/arm_schedulesigaction.c
+++ b/arch/arm/src/armv7-a/arm_schedulesigaction.c
@@ -145,16 +145,16 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
                * the signals have been delivered.
                */
 
-              tcb->xcp.sigdeliver       = sigdeliver;
-              tcb->xcp.saved_pc         = CURRENT_REGS[REG_PC];
-              tcb->xcp.saved_cpsr       = CURRENT_REGS[REG_CPSR];
+              tcb->xcp.sigdeliver    = sigdeliver;
+              tcb->xcp.saved_pc      = CURRENT_REGS[REG_PC];
+              tcb->xcp.saved_cpsr    = CURRENT_REGS[REG_CPSR];
 
               /* Then set up to vector to the trampoline with interrupts
                * disabled
                */
 
-              CURRENT_REGS[REG_PC]      = (uint32_t)up_sigdeliver;
-              CURRENT_REGS[REG_CPSR]    = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
+              CURRENT_REGS[REG_PC]   = (uint32_t)up_sigdeliver;
+              CURRENT_REGS[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
 
               /* And make sure that the saved context in the TCB is the same
                * as the interrupt return context.
@@ -176,16 +176,16 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
            * have been delivered.
            */
 
-          tcb->xcp.sigdeliver       = sigdeliver;
-          tcb->xcp.saved_pc         = tcb->xcp.regs[REG_PC];
-          tcb->xcp.saved_cpsr       = tcb->xcp.regs[REG_CPSR];
+          tcb->xcp.sigdeliver     = sigdeliver;
+          tcb->xcp.saved_pc       = tcb->xcp.regs[REG_PC];
+          tcb->xcp.saved_cpsr     = tcb->xcp.regs[REG_CPSR];
 
           /* Then set up to vector to the trampoline with interrupts
            * disabled
            */
 
-          tcb->xcp.regs[REG_PC]      = (uint32_t)up_sigdeliver;
-          tcb->xcp.regs[REG_CPSR]    = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
+          tcb->xcp.regs[REG_PC]   = (uint32_t)up_sigdeliver;
+          tcb->xcp.regs[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
         }
     }
 
@@ -216,11 +216,11 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 
       sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
 
-      me  = this_cpu();
-      cpu = tcb->cpu;
-
       if (tcb->task_state == TSTATE_TASK_RUNNING)
         {
+          me  = this_cpu();
+          cpu = tcb->cpu;
+
           /* CASE 1:  We are not in an interrupt handler and a task is
            * signalling itself for some reason.
            */
@@ -333,9 +333,9 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
            * have been delivered.
            */
 
-          tcb->xcp.sigdeliver       = sigdeliver;
-          tcb->xcp.saved_pc         = tcb->xcp.regs[REG_PC];
-          tcb->xcp.saved_cpsr       = tcb->xcp.regs[REG_CPSR];
+          tcb->xcp.sigdeliver     = sigdeliver;
+          tcb->xcp.saved_pc       = tcb->xcp.regs[REG_PC];
+          tcb->xcp.saved_cpsr     = tcb->xcp.regs[REG_CPSR];
 
           /* Increment the IRQ lock count so that when the task is restarted,
            * it will hold the IRQ spinlock.
@@ -348,8 +348,8 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
            * disabled
            */
 
-          tcb->xcp.regs[REG_PC]      = (uint32_t)up_sigdeliver;
-          tcb->xcp.regs[REG_CPSR]    = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
+          tcb->xcp.regs[REG_PC]   = (uint32_t)up_sigdeliver;
+          tcb->xcp.regs[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
         }
     }
 
diff --git a/arch/arm/src/armv7-m/up_schedulesigaction.c b/arch/arm/src/armv7-m/up_schedulesigaction.c
index d4dd36c04a..2ba672c55a 100644
--- a/arch/arm/src/armv7-m/up_schedulesigaction.c
+++ b/arch/arm/src/armv7-m/up_schedulesigaction.c
@@ -166,7 +166,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 #endif
               CURRENT_REGS[REG_XPSR]    = ARMV7M_XPSR_T;
 #ifdef CONFIG_BUILD_PROTECTED
-              CURRENT_REGS[REG_LR]     = EXC_RETURN_PRIVTHR;
+              CURRENT_REGS[REG_LR]      = EXC_RETURN_PRIVTHR;
 #endif
               /* And make sure that the saved context in the TCB is the same
                * as the interrupt return context.
@@ -244,11 +244,11 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 
       sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
 
-      me  = this_cpu();
-      cpu = tcb->cpu;
-
       if (tcb->task_state == TSTATE_TASK_RUNNING)
         {
+          me  = this_cpu();
+          cpu = tcb->cpu;
+
           /* CASE 1:  We are not in an interrupt handler and a task is
            * signalling itself for some reason.
            */
@@ -345,7 +345,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 #endif
                   CURRENT_REGS[REG_XPSR]    = ARMV7M_XPSR_T;
 #ifdef CONFIG_BUILD_PROTECTED
-                  CURRENT_REGS[REG_LR]     = EXC_RETURN_PRIVTHR;
+                  CURRENT_REGS[REG_LR]      = EXC_RETURN_PRIVTHR;
 #endif
                   /* In an SMP configuration, the interrupt disable logic also
                    * involves spinlocks that are configured per the TCB irqcount
diff --git a/arch/xtensa/src/common/xtensa_schedsigaction.c b/arch/xtensa/src/common/xtensa_schedsigaction.c
index f6b3ddb46a..b9c01ef5b5 100644
--- a/arch/xtensa/src/common/xtensa_schedsigaction.c
+++ b/arch/xtensa/src/common/xtensa_schedsigaction.c
@@ -144,19 +144,19 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
                * NOTE: that hi-priority interrupts are not disabled.
                */
 
-              tcb->xcp.sigdeliver       = sigdeliver;
-              tcb->xcp.saved_pc         = CURRENT_REGS[REG_PC];
-              tcb->xcp.saved_ps         = CURRENT_REGS[REG_PS];
+              tcb->xcp.sigdeliver  = sigdeliver;
+              tcb->xcp.saved_pc    = CURRENT_REGS[REG_PC];
+              tcb->xcp.saved_ps    = CURRENT_REGS[REG_PS];
 
               /* Then set up to vector to the trampoline with interrupts
                * disabled
                */
 
-              CURRENT_REGS[REG_PC]      = (uint32_t)_xtensa_sig_trampoline;
+              CURRENT_REGS[REG_PC] = (uint32_t)_xtensa_sig_trampoline;
 #ifdef __XTENSA_CALL0_ABI__
-              CURRENT_REGS[REG_PS]      = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
+              CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
 #else
-              CURRENT_REGS[REG_PS]      = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);
+              CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);
 #endif
 
               /* And make sure that the saved context in the TCB is the same
@@ -180,19 +180,19 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
            * NOTE: that hi-priority interrupts are not disabled.
            */
 
-          tcb->xcp.sigdeliver       = sigdeliver;
-          tcb->xcp.saved_pc         = CURRENT_REGS[REG_PC];
-          tcb->xcp.saved_ps         = CURRENT_REGS[REG_PS];
+          tcb->xcp.sigdeliver   = sigdeliver;
+          tcb->xcp.saved_pc     = CURRENT_REGS[REG_PC];
+          tcb->xcp.saved_ps     = CURRENT_REGS[REG_PS];
 
           /* Then set up to vector to the trampoline with interrupts
            * disabled
            */
 
-          tcb->xcp.regs[REG_PC]     = (uint32_t)_xtensa_sig_trampoline;
+          tcb->xcp.regs[REG_PC] = (uint32_t)_xtensa_sig_trampoline;
 #ifdef __XTENSA_CALL0_ABI__
-          tcb->xcp.regs[REG_PS]     = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
+          tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
 #else
-          tcb->xcp.regs[REG_PS]     = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);
+          tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);
 #endif
         }
     }
@@ -224,11 +224,11 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
 
       sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
 
-      me  = this_cpu();
-      cpu = tcb->cpu;
-
       if (tcb->task_state == TSTATE_TASK_RUNNING)
         {
+          me  = this_cpu();
+          cpu = tcb->cpu;
+
           /* CASE 1:  We are not in an interrupt handler and a task is
            * signalling itself for some reason.
            */
@@ -346,9 +346,9 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
            * NOTE: that hi-priority interrupts are not disabled.
            */
 
-          tcb->xcp.sigdeliver       = sigdeliver;
-          tcb->xcp.saved_pc         = CURRENT_REGS[REG_PC];
-          tcb->xcp.saved_ps         = CURRENT_REGS[REG_PS];
+          tcb->xcp.sigdeliver   = sigdeliver;
+          tcb->xcp.saved_pc     = CURRENT_REGS[REG_PC];
+          tcb->xcp.saved_ps     = CURRENT_REGS[REG_PS];
 
           /* Increment the IRQ lock count so that when the task is restarted,
            * it will hold the IRQ spinlock.
@@ -361,11 +361,11 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
            * disabled
            */
 
-          tcb->xcp.regs[REG_PC]     = (uint32_t)_xtensa_sig_trampoline;
+          tcb->xcp.regs[REG_PC] = (uint32_t)_xtensa_sig_trampoline;
 #ifdef __XTENSA_CALL0_ABI__
-          tcb->xcp.regs[REG_PS]     = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
+          tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
 #else
-          tcb->xcp.regs[REG_PS]     = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);
+          tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);
 #endif
         }
     }