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Fix lots of typos in C comments and Kconfig help text

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This commit is contained in:
Alan Carvalho de Assis 2018-07-08 18:24:45 -06:00 committed by Gregory Nutt
parent 1783d344dc
commit 283b73edc5
106 changed files with 187 additions and 187 deletions
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6
ChangeLog
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@ -7164,7 +7164,7 @@
structures are initialized, they will not behave properly structures are initialized, they will not behave properly
(2014-4-10). (2014-4-10).
* arch/arm/src/sama5/sam_twi.c: TWI data sending is fails to increment * arch/arm/src/sama5/sam_twi.c: TWI data sending is fails to increment
the number of byes transferred on first byte sent. from David Sidrane the number of bytes transferred on first byte sent. From David Sidrane
(2014-4-10). (2014-4-10).
* configs/sama5d3x-ek/src: The red LED is controlled by PE24 which is * configs/sama5d3x-ek/src: The red LED is controlled by PE24 which is
also the camera/ISI interface reset line. So if the a camera is also the camera/ISI interface reset line. So if the a camera is
@ -10049,7 +10049,7 @@
The check on RTC_MAGIC on the BK0R register lead to rtc_setup() call The check on RTC_MAGIC on the BK0R register lead to rtc_setup() call
that rightfully enables the lsi clock; but the next times, when the that rightfully enables the lsi clock; but the next times, when the
rtc is already setup, the rtc_resume() call does NOT start the lsi rtc is already setup, the rtc_resume() call does NOT start the lsi
clock! The right place to put LSE/LSI initialisation is inside clock! The right place to put LSE/LSI initialization is inside
stm32_stdclockconfig() in stm32fxxxxx_rcc.c. Doing this I checked stm32_stdclockconfig() in stm32fxxxxx_rcc.c. Doing this I checked
the possible uses of the LSI and the LSE sources: the LSI can be used the possible uses of the LSI and the LSE sources: the LSI can be used
for RTC and/or the IWDG, while the LSE only for the RTC (and to output for RTC and/or the IWDG, while the LSE only for the RTC (and to output
@ -12336,7 +12336,7 @@
* STM32L4: Port foward bugfix from stm32 of oneshot timer. From * STM32L4: Port foward bugfix from stm32 of oneshot timer. From
ziggurat29 (2016-07-13). ziggurat29 (2016-07-13).
* STM32 and EFM32: I'm using syslog through ITM. In this case * STM32 and EFM32: I'm using syslog through ITM. In this case
syslog_channel function is call before RAM initialisation in syslog_channel function is call before RAM initialization in
stm32_clockconfig. But syslog channel uses a global variable that is stm32_clockconfig. But syslog channel uses a global variable that is
reset to default by the RAM initialization. From Pierre-noel reset to default by the RAM initialization. From Pierre-noel
Bouteville (2016-07-14). Bouteville (2016-07-14).

2
Documentation/NXGraphicsSubsystem.html
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@ -3263,7 +3263,7 @@ int nxf_convert_32bpp(FAR uint32_t *dest, uint16_t height,
<dd>By default, NX builds to use a framebuffer driver (see <code>include/nuttx/video/fb.h</code>). <dd>By default, NX builds to use a framebuffer driver (see <code>include/nuttx/video/fb.h</code>).
If this option is defined, NX will build to use an LCD driver (see <code>include/nuttx/lcd/lcd.h</code>). If this option is defined, NX will build to use an LCD driver (see <code>include/nuttx/lcd/lcd.h</code>).
<dt><code>CONFIG_NX_ANTIALIASING</code>: <dt><code>CONFIG_NX_ANTIALIASING</code>:
<dd>Enable support for ant-aliasing when rendering lines as various <dd>Enable support for anti-aliasing when rendering lines as various
orientations. orientations.
This option is only available for use with frame buffer drivers and This option is only available for use with frame buffer drivers and
only with 16-, 24-, or 32-bit RGB color formats. only with 16-, 24-, or 32-bit RGB color formats.

2
Documentation/NuttShell.html
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@ -3329,7 +3329,7 @@ nsh&gt;
</p> </p>
<p> <p>
There are several built-in appliations in the <code>apps/</code> repository. There are several built-in applications in the <code>apps/</code> repository.
No attempt is made here to enumerate all of them. No attempt is made here to enumerate all of them.
But a few of the more common, useful built-in applications are listed below. But a few of the more common, useful built-in applications are listed below.
</p> </p>

2
Documentation/NuttX.html
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@ -3216,7 +3216,7 @@ nsh>
<b>Olimexino-STM32</b>. <b>Olimexino-STM32</b>.
This port uses the Olimexino STM32 board (STM32F103RBT6). This port uses the Olimexino STM32 board (STM32F103RBT6).
See the http://www.olimex.com for further information. See the http://www.olimex.com for further information.
Contribued by David Sidrane. Contributed by David Sidrane.
</p> </p>
</li> </li>
</ol> </ol>

2
Documentation/UsbTrace.html
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@ -100,7 +100,7 @@
<ol> <ol>
<li>8-bits of the trace ID (values associated with the above)</li> <li>8-bits of the trace ID (values associated with the above)</li>
<li>8-bits of additional trace ID data, and</li> <li>8-bits of additional trace ID data, and</li>
<li>16-bits of additonal data.</li> <li>16-bits of additional data.</li>
</ol> </ol>
<p><b>8-bit Trace Data</b> <p><b>8-bit Trace Data</b>
The 8-bit trace data depends on the specific event ID. As examples, The 8-bit trace data depends on the specific event ID. As examples,

8
Kconfig
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@ -19,7 +19,7 @@ config DEFAULT_SMALL
default n default n
---help--- ---help---
When options are present, the default value for certain options will When options are present, the default value for certain options will
be the one the results in the smallest size (at a loss of featurs). be the one the results in the smallest size (at a loss of features).
The default is a fuller feature set at a larger size. The default is a fuller feature set at a larger size.
NOTE: This option does not prevent you from overriding the default NOTE: This option does not prevent you from overriding the default
@ -75,7 +75,7 @@ config WINDOWS_CYGWIN
config WINDOWS_UBUNTU config WINDOWS_UBUNTU
bool "Ubuntu under Windows 10" bool "Ubuntu under Windows 10"
---help--- ---help---
Build natively in an Unbuntu shell under Windoes 10 environment with Build natively in an Ubuntu shell under Windoes 10 environment with
POSIX style paths (like /mnt/c/Program Files) POSIX style paths (like /mnt/c/Program Files)
config WINDOWS_MSYS config WINDOWS_MSYS
@ -495,7 +495,7 @@ config DEBUG_AUDIO
depends on AUDIO depends on AUDIO
---help--- ---help---
Enable audio device debug features. Enable audio device debug features.
Enable low level debug featurs for the audio subsystem and for audio Enable low level debug features for the audio subsystem and for audio
device drivers. (disabled by default). Support for this debug option device drivers. (disabled by default). Support for this debug option
is architecture-specific and may not be available for some MCUs. is architecture-specific and may not be available for some MCUs.
@ -1063,7 +1063,7 @@ config DEBUG_INPUT
depends on INPUT depends on INPUT
---help--- ---help---
Enable input d. Enable input d.
Enable low level evice debug features for the input device drivers Enable low level device debug features for the input device drivers
such as mice and touchscreens (disabled by default). Support for such as mice and touchscreens (disabled by default). Support for
this debug option is board-specific and may not be available for this debug option is board-specific and may not be available for
some boards. some boards.

4
ReleaseNotes
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@ -6292,7 +6292,7 @@ Bugfixes (see the ChangeLog for details). Some of these are very important:
- Fix a case in the UDPHS driver where received status was not being - Fix a case in the UDPHS driver where received status was not being
cleared, causing OUT SETUP commands to fail. cleared, causing OUT SETUP commands to fail.
- TWI data sending fails to increment the number of byes transferred - TWI data sending fails to increment the number of bytes transferred
on first byte sent. from David Sidrane. on first byte sent. from David Sidrane.
- If running from SDRAM, then BOARD_MCK_FREQUENCY is not a constant - If running from SDRAM, then BOARD_MCK_FREQUENCY is not a constant
and cannot be used in conditional compilation. All drivers fixed and cannot be used in conditional compilation. All drivers fixed
@ -8783,7 +8783,7 @@ detailed bugfix information):
register lead to rtc_setup() call that rightfully enables the LSI register lead to rtc_setup() call that rightfully enables the LSI
clock; but the next times, when the rtc is already setup, the clock; but the next times, when the rtc is already setup, the
rtc_resume() call does NOT start the LSI clock! The right place to rtc_resume() call does NOT start the LSI clock! The right place to
put LSE/LSI initialisation is inside stm32_stdclockconfig() in put LSE/LSI initialization is inside stm32_stdclockconfig() in
stm32fxxxxx_rcc.c. Doing this I checked the possible uses of the stm32fxxxxx_rcc.c. Doing this I checked the possible uses of the
LSI and the LSE sources: the LSI can be used for RTC and/or the LSI and the LSE sources: the LSI can be used for RTC and/or the
IWDG, while the LSE only for the RTC (and to output the MCO1 pin). IWDG, while the LSE only for the RTC (and to output the MCO1 pin).

2
arch/Kconfig
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@ -427,7 +427,7 @@ config ARCH_PGPOOL_VBASE
environment logic. environment logic.
config ARCH_PGPOOL_SIZE config ARCH_PGPOOL_SIZE
int "Page pool size (byes)" int "Page pool size (bytes)"
default 0 default 0
---help--- ---help---
The size of the page pool memory in bytes. This setting is probably The size of the page pool memory in bytes. This setting is probably

2
arch/arm/Kconfig
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@ -734,7 +734,7 @@ config DEBUG_HARDFAULT
---help--- ---help---
Enables verbose debug output when a hard fault is occurs. This verbose Enables verbose debug output when a hard fault is occurs. This verbose
output is sometimes helpful when debugging difficult hard fault problems, output is sometimes helpful when debugging difficult hard fault problems,
but may be more than you typcially want to see. but may be more than you typically want to see.
if ARCH_CORTEXM0 if ARCH_CORTEXM0
source arch/arm/src/armv6-m/Kconfig source arch/arm/src/armv6-m/Kconfig

32
arch/arm/include/imx6/irq.h
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@ -70,22 +70,22 @@
* registers, not the priority set by the sending Cortex-A9 processor. * registers, not the priority set by the sending Cortex-A9 processor.
*/ */
#define IMX_IRQ_SGI0 0 /* Sofware Generated Interrupt (SGI) 0 */ #define IMX_IRQ_SGI0 0 /* Software Generated Interrupt (SGI) 0 */
#define IMX_IRQ_SGI1 1 /* Sofware Generated Interrupt (SGI) 1 */ #define IMX_IRQ_SGI1 1 /* Software Generated Interrupt (SGI) 1 */
#define IMX_IRQ_SGI2 2 /* Sofware Generated Interrupt (SGI) 2 */ #define IMX_IRQ_SGI2 2 /* Software Generated Interrupt (SGI) 2 */
#define IMX_IRQ_SGI3 3 /* Sofware Generated Interrupt (SGI) 3 */ #define IMX_IRQ_SGI3 3 /* Software Generated Interrupt (SGI) 3 */
#define IMX_IRQ_SGI4 4 /* Sofware Generated Interrupt (SGI) 4 */ #define IMX_IRQ_SGI4 4 /* Software Generated Interrupt (SGI) 4 */
#define IMX_IRQ_SGI5 5 /* Sofware Generated Interrupt (SGI) 5 */ #define IMX_IRQ_SGI5 5 /* Software Generated Interrupt (SGI) 5 */
#define IMX_IRQ_SGI6 6 /* Sofware Generated Interrupt (SGI) 6 */ #define IMX_IRQ_SGI6 6 /* Software Generated Interrupt (SGI) 6 */
#define IMX_IRQ_SGI7 7 /* Sofware Generated Interrupt (SGI) 7 */ #define IMX_IRQ_SGI7 7 /* Software Generated Interrupt (SGI) 7 */
#define IMX_IRQ_SGI8 8 /* Sofware Generated Interrupt (SGI) 8 */ #define IMX_IRQ_SGI8 8 /* Software Generated Interrupt (SGI) 8 */
#define IMX_IRQ_SGI9 9 /* Sofware Generated Interrupt (SGI) 9 */ #define IMX_IRQ_SGI9 9 /* Software Generated Interrupt (SGI) 9 */
#define IMX_IRQ_SGI10 10 /* Sofware Generated Interrupt (SGI) 10 */ #define IMX_IRQ_SGI10 10 /* Software Generated Interrupt (SGI) 10 */
#define IMX_IRQ_SGI11 11 /* Sofware Generated Interrupt (SGI) 11 */ #define IMX_IRQ_SGI11 11 /* Software Generated Interrupt (SGI) 11 */
#define IMX_IRQ_SGI12 12 /* Sofware Generated Interrupt (SGI) 12 */ #define IMX_IRQ_SGI12 12 /* Software Generated Interrupt (SGI) 12 */
#define IMX_IRQ_SGI13 13 /* Sofware Generated Interrupt (SGI) 13 */ #define IMX_IRQ_SGI13 13 /* Software Generated Interrupt (SGI) 13 */
#define IMX_IRQ_SGI14 14 /* Sofware Generated Interrupt (SGI) 14 */ #define IMX_IRQ_SGI14 14 /* Software Generated Interrupt (SGI) 14 */
#define IMX_IRQ_SGI15 15 /* Sofware Generated Interrupt (SGI) 15 */ #define IMX_IRQ_SGI15 15 /* Software Generated Interrupt (SGI) 15 */
#define IMX_IRQ_GTM 27 /* Global Timer (GTM) PPI(0) */ #define IMX_IRQ_GTM 27 /* Global Timer (GTM) PPI(0) */
#define IMX_IRQ_FIQ 28 /* Fast Interrupt Request (nFIQ) PPI(1) */ #define IMX_IRQ_FIQ 28 /* Fast Interrupt Request (nFIQ) PPI(1) */

32
arch/arm/src/armv7-a/gic.h
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@ -563,22 +563,22 @@
* task management. * task management.
*/ */
#define GIC_IRQ_SGI0 0 /* Sofware Generated Interrupt (SGI) 0 */ #define GIC_IRQ_SGI0 0 /* Software Generated Interrupt (SGI) 0 */
#define GIC_IRQ_SGI1 1 /* Sofware Generated Interrupt (SGI) 1 */ #define GIC_IRQ_SGI1 1 /* Software Generated Interrupt (SGI) 1 */
#define GIC_IRQ_SGI2 2 /* Sofware Generated Interrupt (SGI) 2 */ #define GIC_IRQ_SGI2 2 /* Software Generated Interrupt (SGI) 2 */
#define GIC_IRQ_SGI3 3 /* Sofware Generated Interrupt (SGI) 3 */ #define GIC_IRQ_SGI3 3 /* Software Generated Interrupt (SGI) 3 */
#define GIC_IRQ_SGI4 4 /* Sofware Generated Interrupt (SGI) 4 */ #define GIC_IRQ_SGI4 4 /* Software Generated Interrupt (SGI) 4 */
#define GIC_IRQ_SGI5 5 /* Sofware Generated Interrupt (SGI) 5 */ #define GIC_IRQ_SGI5 5 /* Software Generated Interrupt (SGI) 5 */
#define GIC_IRQ_SGI6 6 /* Sofware Generated Interrupt (SGI) 6 */ #define GIC_IRQ_SGI6 6 /* Software Generated Interrupt (SGI) 6 */
#define GIC_IRQ_SGI7 7 /* Sofware Generated Interrupt (SGI) 7 */ #define GIC_IRQ_SGI7 7 /* Software Generated Interrupt (SGI) 7 */
#define GIC_IRQ_SGI8 8 /* Sofware Generated Interrupt (SGI) 8 */ #define GIC_IRQ_SGI8 8 /* Software Generated Interrupt (SGI) 8 */
#define GIC_IRQ_SGI9 9 /* Sofware Generated Interrupt (SGI) 9 */ #define GIC_IRQ_SGI9 9 /* Software Generated Interrupt (SGI) 9 */
#define GIC_IRQ_SGI10 10 /* Sofware Generated Interrupt (SGI) 10 */ #define GIC_IRQ_SGI10 10 /* Software Generated Interrupt (SGI) 10 */
#define GIC_IRQ_SGI11 11 /* Sofware Generated Interrupt (SGI) 11 */ #define GIC_IRQ_SGI11 11 /* Software Generated Interrupt (SGI) 11 */
#define GIC_IRQ_SGI12 12 /* Sofware Generated Interrupt (SGI) 12 */ #define GIC_IRQ_SGI12 12 /* Software Generated Interrupt (SGI) 12 */
#define GIC_IRQ_SGI13 13 /* Sofware Generated Interrupt (SGI) 13 */ #define GIC_IRQ_SGI13 13 /* Software Generated Interrupt (SGI) 13 */
#define GIC_IRQ_SGI14 14 /* Sofware Generated Interrupt (SGI) 14 */ #define GIC_IRQ_SGI14 14 /* Software Generated Interrupt (SGI) 14 */
#define GIC_IRQ_SGI15 15 /* Sofware Generated Interrupt (SGI) 15 */ #define GIC_IRQ_SGI15 15 /* Software Generated Interrupt (SGI) 15 */
#define GIC_IRQ_GTM 27 /* Global Timer (GTM) PPI(0) */ #define GIC_IRQ_GTM 27 /* Global Timer (GTM) PPI(0) */
#define GIC_IRQ_FIQ 28 /* Fast Interrupt Request (nFIQ) PPI(1) */ #define GIC_IRQ_FIQ 28 /* Fast Interrupt Request (nFIQ) PPI(1) */

2
arch/arm/src/kinetis/Kconfig
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@ -1070,7 +1070,7 @@ config KINETIS_UART_SINGLEWIRE
depends on KINETIS_UART || KINETIS_LPUART depends on KINETIS_UART || KINETIS_LPUART
---help--- ---help---
Enable single wire UART and LPUART support. The option enables support Enable single wire UART and LPUART support. The option enables support
for the TIOCSSINGLEWIRE ioctl in the Kineteis serial drivers. for the TIOCSSINGLEWIRE ioctl in the Kinetis serial drivers.
endif # KINETIS_SERIALDRIVER || OTHER_SERIALDRIVER endif # KINETIS_SERIALDRIVER || OTHER_SERIALDRIVER

2
arch/arm/src/lc823450/lc823450_dvfs2.c
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@ -626,7 +626,7 @@ exit_with_error:
/**************************************************************************** /****************************************************************************
* Name: lc823450_dvfs_boost * Name: lc823450_dvfs_boost
* boost the sytem clock to MAX (i.e. 160M) * boost the system clock to MAX (i.e. 160M)
* timeout in msec * timeout in msec
****************************************************************************/ ****************************************************************************/

2
arch/arm/src/lpc11xx/Kconfig
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@ -136,7 +136,7 @@ config LPC11_ADC_CHANLIST
matching the LPC11_ADC0_MASK within the board-specific library. matching the LPC11_ADC0_MASK within the board-specific library.
config LPC11_ADC_BURSTMODE config LPC11_ADC_BURSTMODE
bool "One interrupt at the end of all ADC cconversions" bool "One interrupt at the end of all ADC conversions"
default n default n
---help--- ---help---
Select this if you want to generate only one interrupt once all Select this if you want to generate only one interrupt once all

6
arch/arm/src/lpc17xx/Kconfig
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@ -524,7 +524,7 @@ config LPC17_ADC_CHANLIST
matching the LPC17_ADC0_MASK within the board-specific library. matching the LPC17_ADC0_MASK within the board-specific library.
config LPC17_ADC_BURSTMODE config LPC17_ADC_BURSTMODE
bool "One interrupt at the end of all ADC cconversions" bool "One interrupt at the end of all ADC conversions"
default n default n
---help--- ---help---
Select this if you want to generate only one interrupt once all selected Select this if you want to generate only one interrupt once all selected
@ -656,9 +656,9 @@ menu "Ethernet driver options"
depends on LPC17_ETHERNET depends on LPC17_ETHERNET
config LPC17_PHY_AUTONEG config LPC17_PHY_AUTONEG
bool "Autonegiation" bool "Autonegotiation"
---help--- ---help---
Enable auto-negotion Enable auto-negotiation
config LPC17_PHY_SPEED100 config LPC17_PHY_SPEED100
bool "100Mbit/Sec" bool "100Mbit/Sec"

6
arch/arm/src/lpc43xx/Kconfig
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@ -427,7 +427,7 @@ config LPC43_EXTSDRAM1
depends on ARCH_HAVE_EXTSDRAM1 depends on ARCH_HAVE_EXTSDRAM1
select ARCH_HAVE_EXTSDRAM select ARCH_HAVE_EXTSDRAM
---help--- ---help---
Configure external SDRAM memoryand, if applicable, map then external Configure external SDRAM memory, if applicable, map then external
SDRAM into the memory map. SDRAM into the memory map.
if LPC43_EXTSDRAM1 if LPC43_EXTSDRAM1
@ -452,7 +452,7 @@ config LPC43_EXTSDRAM2
depends on ARCH_HAVE_EXTSDRAM2 depends on ARCH_HAVE_EXTSDRAM2
select ARCH_HAVE_EXTSDRAM select ARCH_HAVE_EXTSDRAM
---help--- ---help---
Configure external SDRAM memoryand, if applicable, map then external Configure external SDRAM memory, if applicable, map then external
SDRAM into the memory map. SDRAM into the memory map.
if LPC43_EXTSDRAM2 if LPC43_EXTSDRAM2
@ -477,7 +477,7 @@ config LPC43_EXTSDRAM3
depends on ARCH_HAVE_EXTSDRAM3 depends on ARCH_HAVE_EXTSDRAM3
select ARCH_HAVE_EXTSDRAM select ARCH_HAVE_EXTSDRAM
---help--- ---help---
Configure external SDRAM memoryand, if applicable, map then external Configure external SDRAM memory, if applicable, map then external
SDRAM into the memory map. SDRAM into the memory map.
if LPC43_EXTSDRAM3 if LPC43_EXTSDRAM3

2
arch/arm/src/lpc54xx/lpc54_emc.c
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@ -245,7 +245,7 @@ void lpc54_emc_initialize(FAR const struct emc_config_s *config)
lpc54_reset_emc(); lpc54_reset_emc();
/* Set the EMC sytem configure */ /* Set the EMC system configuration */
putreg32(SYSCON_EMCCLKDIV_DIV(config->clkdiv), LPC54_SYSCON_EMCCLKDIV); putreg32(SYSCON_EMCCLKDIV_DIV(config->clkdiv), LPC54_SYSCON_EMCCLKDIV);

2
arch/arm/src/lpc54xx/lpc54_ethernet.c
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@ -2884,7 +2884,7 @@ static int lpc54_phy_autonegotiate(struct lpc54_ethdriver_s *priv)
{ {
if (timeout-- <= 0) if (timeout-- <= 0)
{ {
nerr("ERROR: Autonegotion timed out\n"); nerr("ERROR: Autonegotiation timed out\n");
return -ETIMEDOUT; return -ETIMEDOUT;
} }

2
arch/arm/src/nuc1xx/chip/nuc_gcr.h
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@ -95,7 +95,7 @@
#define GCR_RSTSRC_LVR (1 << 3) /* Bit 3: Low voltage reset controller */ #define GCR_RSTSRC_LVR (1 << 3) /* Bit 3: Low voltage reset controller */
#define GCR_RSTSRC_BOD (1 << 4) /* Bit 4: Brown-out detection */ #define GCR_RSTSRC_BOD (1 << 4) /* Bit 4: Brown-out detection */
#define GCR_RSTSRC_SYS (1 << 5) /* Bit 5: Software set AIRCR:SYSRESETREQ */ #define GCR_RSTSRC_SYS (1 << 5) /* Bit 5: Software set AIRCR:SYSRESETREQ */
#define GCR_RSTSRC_CPU (1 << 7) /* Bit 7: Sofware set CPU_RST */ #define GCR_RSTSRC_CPU (1 << 7) /* Bit 7: Software set CPU_RST */
/* IP Reset control register 1 */ /* IP Reset control register 1 */

2
arch/arm/src/sam34/sam_hsmci.c
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@ -1801,7 +1801,7 @@ static int sam_sendcmd(FAR struct sdio_dev_s *dev,
* Name: sam_blocksetup * Name: sam_blocksetup
* *
* Description: * Description:
* Some hardward needs to be informed of the selected blocksize. * Some hardware needs to be informed of the selected blocksize.
* *
* Input Parameters: * Input Parameters:
* dev - An instance of the SDIO device interface * dev - An instance of the SDIO device interface

6
arch/arm/src/sama5/Kconfig
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@ -3242,7 +3242,7 @@ config SAMA5_ADC_DMASAMPLES
2 Buffers * Number_of_ADC_Channels * SAMA5_ADC_DMASAMPLES * sizeof(uint16_t) 2 Buffers * Number_of_ADC_Channels * SAMA5_ADC_DMASAMPLES * sizeof(uint16_t)
So, for example, if you had 8 ADC channels and 8 triggers per DMA So, for example, if you had 8 ADC channels and 8 triggers per DMA
transfer, then the total DMA buffering requirment would be: transfer, then the total DMA buffering requirement would be:
2 * 8 * 8 * 2 = 256 bytes. 2 * 8 * 8 * 2 = 256 bytes.
@ -4969,7 +4969,7 @@ config SAMA5_DDRCS_PGHEAP_OFFSET
you must have excluding this page cache region from the heap ether you must have excluding this page cache region from the heap ether
by (1) not selecting SAMA5_DDRCS_HEAP, or (2) selecting by (1) not selecting SAMA5_DDRCS_HEAP, or (2) selecting
SAMA5_DDRCS_HEAP_OFFSET and SAMA5_DDRCS_HEAP_SIZE so that the page SAMA5_DDRCS_HEAP_OFFSET and SAMA5_DDRCS_HEAP_SIZE so that the page
cache region does not overlapy the region of DRAM that is added to cache region does not overlap the region of DRAM that is added to
the heap. the heap.
config SAMA5_DDRCS_PGHEAP_SIZE config SAMA5_DDRCS_PGHEAP_SIZE
@ -4987,7 +4987,7 @@ config SAMA5_DDRCS_PGHEAP_SIZE
you must have excluding this page cache region from the heap ether you must have excluding this page cache region from the heap ether
by (1) not selecting SAMA5_DDRCS_HEAP, or (2) selecting by (1) not selecting SAMA5_DDRCS_HEAP, or (2) selecting
SAMA5_DDRCS_HEAP_OFFSET and SAMA5_DDRCS_HEAP_SIZE so that the page SAMA5_DDRCS_HEAP_OFFSET and SAMA5_DDRCS_HEAP_SIZE so that the page
cache region does not overlapy the region of DRAM that is added to cache region does not overlap the region of DRAM that is added to
the heap. the heap.
endif # SAMA5_DDRCS_PGHEAP endif # SAMA5_DDRCS_PGHEAP

2
arch/arm/src/sama5/sam_can.c
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@ -602,7 +602,7 @@ static int can_mballoc(FAR struct sam_can_s *priv)
for (i = 0; i < SAM_CAN_NMAILBOXES; i++) for (i = 0; i < SAM_CAN_NMAILBOXES; i++)
{ {
/* Is mailbox i availalbe? */ /* Is mailbox i available? */
uint8_t bit = (1 << i); uint8_t bit = (1 << i);
if ((priv->freemb & bit) != 0) if ((priv->freemb & bit) != 0)

2
arch/arm/src/sama5/sam_hsmci.c
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@ -2095,7 +2095,7 @@ static int sam_sendcmd(FAR struct sdio_dev_s *dev,
* Name: sam_blocksetup * Name: sam_blocksetup
* *
* Description: * Description:
* Some hardward needs to be informed of the selected blocksize. * Some hardware needs to be informed of the selected blocksize.
* *
* Input Parameters: * Input Parameters:
* dev - An instance of the SDIO device interface * dev - An instance of the SDIO device interface

2
arch/arm/src/samv7/Kconfig
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@ -1766,7 +1766,7 @@ config SAMV7_HSMCI_UNALIGNED
beginning of a sector and at least a whole sector is being read. beginning of a sector and at least a whole sector is being read.
This option is not recommended. There are better ways to handle This option is not recommended. There are better ways to handle
the unalaigned case: the unaligned case:
# CONFIG_SAMV7_HSMCI_UNALIGNED is not set # CONFIG_SAMV7_HSMCI_UNALIGNED is not set
Just return -EFAULT if unaligned Just return -EFAULT if unaligned

2
arch/arm/src/samv7/sam_hsmci.c
View File

@ -2072,7 +2072,7 @@ static int sam_sendcmd(FAR struct sdio_dev_s *dev,
* Name: sam_blocksetup * Name: sam_blocksetup
* *
* Description: * Description:
* Some hardward needs to be informed of the selected blocksize. * Some hardware needs to be informed of the selected blocksize.
* *
* Input Parameters: * Input Parameters:
* dev - An instance of the SDIO device interface * dev - An instance of the SDIO device interface

2
arch/arm/src/stm32/chip/stm32_dma2d.h
View File

@ -101,7 +101,7 @@
#define DMA2D_CR_START (1 << 0) /* Start Bit */ #define DMA2D_CR_START (1 << 0) /* Start Bit */
#define DMA2D_CR_SUSP (1 << 1) /* Suspend Bit */ #define DMA2D_CR_SUSP (1 << 1) /* Suspend Bit */
#define DMA2D_CR_ABORT (1 << 2) /* Abort Bit */ #define DMA2D_CR_ABORT (1 << 2) /* Abort Bit */
#define DMA2D_CR_TEIE (1 << 8) /* Transfer Error Interupt Enable Bit */ #define DMA2D_CR_TEIE (1 << 8) /* Transfer Error Interrupt Enable Bit */
#define DMA2D_CR_TCIE (1 << 9) /* Transfer Complete Interrupt Enable Bit */ #define DMA2D_CR_TCIE (1 << 9) /* Transfer Complete Interrupt Enable Bit */
#define DMA2D_CR_TWIE (1 << 10) /* Transfer Watermark Interrupt Enable Bit */ #define DMA2D_CR_TWIE (1 << 10) /* Transfer Watermark Interrupt Enable Bit */
#define DMA2D_CR_CAEIE (1 << 11) /* CLUT Access Error Interrupt Enable Bit */ #define DMA2D_CR_CAEIE (1 << 11) /* CLUT Access Error Interrupt Enable Bit */

6
arch/arm/src/stm32/chip/stm32f33xxx_hrtim.h
View File

@ -1096,7 +1096,7 @@
#define HRTIM_CR2_TDRST (1 << 12) /* Bit 12: Timer D Counter Software Reset*/ #define HRTIM_CR2_TDRST (1 << 12) /* Bit 12: Timer D Counter Software Reset*/
#define HRTIM_CR2_TERST (1 << 13) /* Bit 13: Timer E Counter Software Reset*/ #define HRTIM_CR2_TERST (1 << 13) /* Bit 13: Timer E Counter Software Reset*/
/* Common Interupt Status Register */ /* Common Interrupt Status Register */
#define HRTIM_ISR_FLT1 (1 << 0) /* Bit 0: Fault 1 Interrupt Flag */ #define HRTIM_ISR_FLT1 (1 << 0) /* Bit 0: Fault 1 Interrupt Flag */
#define HRTIM_ISR_FLT2 (1 << 1) /* Bit 1: Fault 2 Interrupt Flag */ #define HRTIM_ISR_FLT2 (1 << 1) /* Bit 1: Fault 2 Interrupt Flag */
@ -1107,7 +1107,7 @@
#define HRTIM_ISR_DLLRDY (1 << 16) /* Bit 16: DLL Ready Interrupt Flag */ #define HRTIM_ISR_DLLRDY (1 << 16) /* Bit 16: DLL Ready Interrupt Flag */
#define HRTIM_ISR_BMPER (1 << 17) /* Bit 17: Burst mode Period Interrupt Flag */ #define HRTIM_ISR_BMPER (1 << 17) /* Bit 17: Burst mode Period Interrupt Flag */
/* Common Interupt Clear Register */ /* Common Interrupt Clear Register */
#define HRTIM_ICR_FLT1C (1 << 0) /* Bit 0: Fault 1 Interrupt Flag Clear */ #define HRTIM_ICR_FLT1C (1 << 0) /* Bit 0: Fault 1 Interrupt Flag Clear */
#define HRTIM_ICR_FLT2C (1 << 1) /* Bit 1: Fault 2 Interrupt Flag Clear */ #define HRTIM_ICR_FLT2C (1 << 1) /* Bit 1: Fault 2 Interrupt Flag Clear */
@ -1118,7 +1118,7 @@
#define HRTIM_ICR_DLLRDYC (1 << 16) /* Bit 16: DLL Ready Interrupt Flag Clear */ #define HRTIM_ICR_DLLRDYC (1 << 16) /* Bit 16: DLL Ready Interrupt Flag Clear */
#define HRTIM_ICR_BMPERC (1 << 17) /* Bit 17: Burst mode Period Interrupt Flag Clear */ #define HRTIM_ICR_BMPERC (1 << 17) /* Bit 17: Burst mode Period Interrupt Flag Clear */
/* Common Interupt Enable Register */ /* Common Interrupt Enable Register */
#define HRTIM_IER_FLT1IE (1 << 0) /* Bit 0: Fault 1 Interrupt Enable */ #define HRTIM_IER_FLT1IE (1 << 0) /* Bit 0: Fault 1 Interrupt Enable */
#define HRTIM_IER_FLT2IE (1 << 1) /* Bit 1: Fault 2 Interrupt Enable */ #define HRTIM_IER_FLT2IE (1 << 1) /* Bit 1: Fault 2 Interrupt Enable */

2
arch/arm/src/stm32/stm32_ltdc.c
View File

@ -1977,7 +1977,7 @@ static void stm32_ltdc_lchromakeyenable(FAR struct stm32_ltdc_s *layer,
regval = getreg32(stm32_cr_layer_t[layer->layerno]); regval = getreg32(stm32_cr_layer_t[layer->layerno]);
/* Enable/Disble colorkey */ /* Enable/Disable colorkey */
if (enable == true) if (enable == true)
{ {

2
arch/arm/src/stm32f7/chip/stm32_dma2d.h
View File

@ -101,7 +101,7 @@
#define DMA2D_CR_START (1 << 0) /* Start Bit */ #define DMA2D_CR_START (1 << 0) /* Start Bit */
#define DMA2D_CR_SUSP (1 << 1) /* Suspend Bit */ #define DMA2D_CR_SUSP (1 << 1) /* Suspend Bit */
#define DMA2D_CR_ABORT (1 << 2) /* Abort Bit */ #define DMA2D_CR_ABORT (1 << 2) /* Abort Bit */
#define DMA2D_CR_TEIE (1 << 8) /* Transfer Error Interupt Enable Bit */ #define DMA2D_CR_TEIE (1 << 8) /* Transfer Error Interrupt Enable Bit */
#define DMA2D_CR_TCIE (1 << 9) /* Transfer Complete Interrupt Enable Bit */ #define DMA2D_CR_TCIE (1 << 9) /* Transfer Complete Interrupt Enable Bit */
#define DMA2D_CR_TWIE (1 << 10) /* Transfer Watermark Interrupt Enable Bit */ #define DMA2D_CR_TWIE (1 << 10) /* Transfer Watermark Interrupt Enable Bit */
#define DMA2D_CR_CAEIE (1 << 11) /* CLUT Access Error Interrupt Enable Bit */ #define DMA2D_CR_CAEIE (1 << 11) /* CLUT Access Error Interrupt Enable Bit */

2
arch/arm/src/stm32f7/stm32_ltdc.c
View File

@ -1979,7 +1979,7 @@ static void stm32_ltdc_lchromakeyenable(FAR struct stm32_ltdc_s *layer,
regval = getreg32(stm32_cr_layer_t[layer->layerno]); regval = getreg32(stm32_cr_layer_t[layer->layerno]);
/* Enable/Disble colorkey */ /* Enable/Disable colorkey */
if (enable == true) if (enable == true)
{ {

2
arch/arm/src/stm32l4/Kconfig
View File

@ -707,7 +707,7 @@ config STM32L4_SRAM2_INIT
avoided by first writing to all locations to force the parity into a valid avoided by first writing to all locations to force the parity into a valid
state. state.
However, if the SRAM2 is being used for it's battery-backed capability, However, if the SRAM2 is being used for it's battery-backed capability,
this may be undesireable (because it will destroy the contents). In that this may be undesirable (because it will destroy the contents). In that
case, the board should handle the initialization itself at the appropriate case, the board should handle the initialization itself at the appropriate
time. time.

4
arch/arm/src/str71x/str71x_eic.h
View File

@ -48,7 +48,7 @@
* Pre-processor Definitions * Pre-processor Definitions
************************************************************************************/ ************************************************************************************/
/* Enhanced Interupt Controller (EIC) register offsets ******************************/ /* Enhanced Interrupt Controller (EIC) register offsets *****************************/
#define STR71X_EIC_ICR_OFFSET (0x0000) /* 32-bits wide */ #define STR71X_EIC_ICR_OFFSET (0x0000) /* 32-bits wide */
#define STR71X_EIC_CICR_OFFSET (0x0004) /* 32-bits wide */ #define STR71X_EIC_CICR_OFFSET (0x0004) /* 32-bits wide */
@ -95,7 +95,7 @@
#define STR71X_EIC_NCHANNELS (32) #define STR71X_EIC_NCHANNELS (32)
#define STR71X_EIC_SIR_BASE (STR71X_EIC_BASE + STR71X_EIC_SIR_OFFSET) #define STR71X_EIC_SIR_BASE (STR71X_EIC_BASE + STR71X_EIC_SIR_OFFSET)
/* Enhanced Interupt Controller (EIC) registers *************************************/ /* Enhanced Interrupt Controller (EIC) registers ************************************/
#define STR71X_EIC_ICR (STR71X_EIC_BASE + STR71X_EIC_ICR_OFFSET) #define STR71X_EIC_ICR (STR71X_EIC_BASE + STR71X_EIC_ICR_OFFSET)
#define STR71X_EIC_CICR (STR71X_EIC_BASE + STR71X_EIC_CICR_OFFSET) #define STR71X_EIC_CICR (STR71X_EIC_BASE + STR71X_EIC_CICR_OFFSET)

2
arch/arm/src/str71x/str71x_xti.h
View File

@ -48,7 +48,7 @@
* Pre-processor Definitions * Pre-processor Definitions
************************************************************************************/ ************************************************************************************/
/* External Interupt Controller (XTI) registers *************************************/ /* External Interrupt Controller (XTI) registers ************************************/
#define STR71X_XTI_SR (STR71X_XTI_BASE + 0x001c) /* 8-bits wide */ #define STR71X_XTI_SR (STR71X_XTI_BASE + 0x001c) /* 8-bits wide */
#define STR71X_XTI_CTRL (STR71X_XTI_BASE + 0x0024) /* 8-bits wide */ #define STR71X_XTI_CTRL (STR71X_XTI_BASE + 0x0024) /* 8-bits wide */

2
arch/mips/src/pic32mx/Kconfig
View File

@ -1085,7 +1085,7 @@ config PIC32MX_ETH_PRIORITY
default 28 default 28
depends on PIC32MX_ETHERNET depends on PIC32MX_ETHERNET
---help--- ---help---
Ethernet interrupt priority. The is default is the higest priority. Ethernet interrupt priority. The is default is the highest priority.
config PIC32MX_MULTICAST config PIC32MX_MULTICAST
bool "Multicast" bool "Multicast"

2
arch/mips/src/pic32mz/Kconfig
View File

@ -412,7 +412,7 @@ config PIC32MZ_ETH_PRIORITY
default 28 default 28
depends on PIC32MZ_ETHERNET depends on PIC32MZ_ETHERNET
---help--- ---help---
Ethernet interrupt priority. The is default is the higest priority. Ethernet interrupt priority. The is default is the highest priority.
config PIC32MZ_MULTICAST config PIC32MZ_MULTICAST
bool "Multicast" bool "Multicast"

2
arch/renesas/src/sh1/sh1_703x.h
View File

@ -444,7 +444,7 @@
#define SH1_ICR_IRQ2S (0x0020) /* Bits 5: Interrupt on falling edge of IRQ2 input */ #define SH1_ICR_IRQ2S (0x0020) /* Bits 5: Interrupt on falling edge of IRQ2 input */
#define SH1_ICR_IRQ1S (0x0040) /* Bits 6: Interrupt on falling edge of IRQ1 input */ #define SH1_ICR_IRQ1S (0x0040) /* Bits 6: Interrupt on falling edge of IRQ1 input */
#define SH1_ICR_IRQ0S (0x0080) /* Bits 7: Interrupt on falling edge of IRQ0 input */ #define SH1_ICR_IRQ0S (0x0080) /* Bits 7: Interrupt on falling edge of IRQ0 input */
#define SH1_ICR_NMIE (0x0100) /* Bits 8: Interupt on rising edge of NMI input */ #define SH1_ICR_NMIE (0x0100) /* Bits 8: Interrupt on rising edge of NMI input */
#define SH1_ICR_NMIL (0x8000) /* Bits 15: NMI input level high */ #define SH1_ICR_NMIL (0x8000) /* Bits 15: NMI input level high */
/************************************************************************************ /************************************************************************************

2
arch/sim/Kconfig
View File

@ -210,7 +210,7 @@ config SIM_TOUCHSCREEN
config SIM_AJOYSTICK config SIM_AJOYSTICK
bool "X11 mouse-based analog joystick emulation" bool "X11 mouse-based analog joystick emulation"
---help--- ---help---
Support an X11 mouse-based anallog joystick emulation. Also needs INPUT=y` Support an X11 mouse-based analog joystick emulation. Also needs INPUT=y
config SIM_NOINPUT config SIM_NOINPUT
bool "No input device" bool "No input device"

12
audio/Kconfig
View File

@ -56,7 +56,7 @@ config AUDIO_DRIVER_SPECIFIC_BUFFERS
By default, the Audio system uses the same size and number of buffers By default, the Audio system uses the same size and number of buffers
regardless of the specific audio device in use. Specifying 'y' here regardless of the specific audio device in use. Specifying 'y' here
adds extra code which allows the lower-level audio device to specify adds extra code which allows the lower-level audio device to specify
a partucular size and number of buffers. a particular size and number of buffers.
endmenu # Audio Buffer Configuration endmenu # Audio Buffer Configuration
@ -149,7 +149,7 @@ config AUDIO_EXCLUDE_PAUSE_RESUME
---help--- ---help---
Exclude building support for pausing and resuming audio files Exclude building support for pausing and resuming audio files
once they are submitted. If the sound system is being used to play once they are submitted. If the sound system is being used to play
short system notification or error type sounds that typicaly only short system notification or error type sounds that typically only
last a second or two, then there is no need (or chance) to pause or last a second or two, then there is no need (or chance) to pause or
resume sound playback once it has started. resume sound playback once it has started.
@ -158,7 +158,7 @@ config AUDIO_EXCLUDE_STOP
default n default n
---help--- ---help---
Exclude building support for stopping audio files once they are Exclude building support for stopping audio files once they are
submitted. If the sound system is being used to play short sytem submitted. If the sound system is being used to play short system
notification or error type sounds that typically only last a second notification or error type sounds that typically only last a second
or two, then there is no need (or chance) to stop the sound or two, then there is no need (or chance) to stop the sound
playback once it has started. playback once it has started.
@ -225,16 +225,16 @@ config AUDIO_MIXER
to perform audio channel or device mixing. to perform audio channel or device mixing.
config AUDIO_MIDI_SYNTH config AUDIO_MIDI_SYNTH
bool "Planned - Enable support for the software-based MIDI synthisizer" bool "Planned - Enable support for the software-based MIDI synthesizer"
default n default n
---help--- ---help---
Builds a simple MIDI synthisizer. Builds a simple MIDI synthesizer.
config AUDIO_OUTPUT_JACK_CONTROL config AUDIO_OUTPUT_JACK_CONTROL
bool "Planned - Enable support for output jack control" bool "Planned - Enable support for output jack control"
default n default n
---help--- ---help---
Builds a simple MIDI synthisizer. Builds a simple MIDI synthesizer.
config AUDIO_FONT config AUDIO_FONT
bool "Planned - Enable support for the Audio Font" bool "Planned - Enable support for the Audio Font"

2
audio/README.txt
View File

@ -1,7 +1,7 @@
README README
^^^^^^ ^^^^^^
This directory contains the audio subsytem support for NuttX. The contents of this This directory contains the audio subsystem support for NuttX. The contents of this
directory are only built if CONFIG_AUDIO is defined in the NuttX configuration file. directory are only built if CONFIG_AUDIO is defined in the NuttX configuration file.
Contents Contents

2
binfmt/Kconfig
View File

@ -4,7 +4,7 @@
# #
config BINFMT_DISABLE config BINFMT_DISABLE
bool "Disble BINFMT support" bool "Disable BINFMT support"
default n default n
---help--- ---help---
By default, support for loadable binary formats is built. This logic By default, support for loadable binary formats is built. This logic

8
configs/Kconfig
View File

@ -61,7 +61,7 @@ config ARCH_BOARD_C5471EVM
This port is complete and verified. This port is complete and verified.
config ARCH_BOARD_CLICKER2_STM32 config ARCH_BOARD_CLICKER2_STM32
bool "Mikrow Clicker2 STM32" bool "Mikroe Clicker2 STM32"
depends on ARCH_CHIP_STM32F407VG depends on ARCH_CHIP_STM32F407VG
select ARCH_HAVE_LEDS select ARCH_HAVE_LEDS
select ARCH_HAVE_BUTTONS select ARCH_HAVE_BUTTONS
@ -289,7 +289,7 @@ config ARCH_BOARD_IMXRT1050_EVK
select ARCH_HAVE_BUTTONS select ARCH_HAVE_BUTTONS
select ARCH_HAVE_IRQBUTTONS select ARCH_HAVE_IRQBUTTONS
---help--- ---help---
This is the board configuratino for the port of NuttX to the NXP i.MXRT This is the board configuration for the port of NuttX to the NXP i.MXRT
evaluation kit, MIMXRT1050-EVKB. This board features the MIMXRT1052DVL6A MCU. evaluation kit, MIMXRT1050-EVKB. This board features the MIMXRT1052DVL6A MCU.
config ARCH_BOARD_LC823450_XGEVK config ARCH_BOARD_LC823450_XGEVK
@ -669,7 +669,7 @@ config ARCH_BOARD_OLIMEXINO_STM32
This port uses the Olimexino STM32 board and a GNU arm-nuttx-elf This port uses the Olimexino STM32 board and a GNU arm-nuttx-elf
toolchain under Linux or Cygwin. See the http://www.olimex.com for toolchain under Linux or Cygwin. See the http://www.olimex.com for
further information. This board features the STMicro STM32F103RBT6 MCU. further information. This board features the STMicro STM32F103RBT6 MCU.
Contribued by David Sidrane. Contributed by David Sidrane.
config ARCH_BOARD_OPEN1788 config ARCH_BOARD_OPEN1788
bool "Wave Share Open1788" bool "Wave Share Open1788"
@ -1519,7 +1519,7 @@ config ARCH_BOARD_Z16F2800100ZCOG
depends on ARCH_CHIP_Z16F2811 depends on ARCH_CHIP_Z16F2811
select ARCH_HAVE_LEDS select ARCH_HAVE_LEDS
---help--- ---help---
z16f Microcontroller. This port use the ZiLIG z16f2800100zcog z16f Microcontroller. This port uses the ZiLOG z16f2800100zcog
development kit and the Zilog ZDS-II Windows command line tools. The development kit and the Zilog ZDS-II Windows command line tools. The
development environment is Cygwin under WinXP. development environment is Cygwin under WinXP.

2
configs/README.txt
View File

@ -496,7 +496,7 @@ configs/olimex-stm32-p407
configs/olimexino-stm32 configs/olimexino-stm32
This port uses the Olimexino STM32 board (STM32F103RBT6) and a GNU arm-nuttx-elf This port uses the Olimexino STM32 board (STM32F103RBT6) and a GNU arm-nuttx-elf
toolchain* under Linux or Cygwin. See the http://www.olimex.com for further\ toolchain* under Linux or Cygwin. See the http://www.olimex.com for further\
information. Contribued by David Sidrane. information. Contributed by David Sidrane.
configs/olimex-strp711 configs/olimex-strp711
This port uses the Olimex STR-P711 board and a GNU arm-nuttx-elf toolchain* under This port uses the Olimex STR-P711 board and a GNU arm-nuttx-elf toolchain* under

2
configs/esp32-core/Kconfig
View File

@ -32,7 +32,7 @@ config ESP32CORE_RUN_IRAM
mapping code to run from SPI flash after initial boot. There are at mapping code to run from SPI flash after initial boot. There are at
least two possible approaches you could take: You can add the flash least two possible approaches you could take: You can add the flash
cache mapping code into nuttx directly, so it is self-contained - cache mapping code into nuttx directly, so it is self-contained -
early nuttx initialisation runs from IRAM and enables flash cache, early nuttx initialization runs from IRAM and enables flash cache,
and then off you go. Or you can use the esp-idf software bootloader and then off you go. Or you can use the esp-idf software bootloader
and partition table scheme and have nuttx be an esp-idf "app" which and partition table scheme and have nuttx be an esp-idf "app" which
allows interoperability with the esp-idf system but makes you allows interoperability with the esp-idf system but makes you

2
configs/freedom-kl25z/src/kl_adxl345.c
View File

@ -153,7 +153,7 @@ static struct kl_adxl345config_s g_adxl345config =
/**************************************************************************** /****************************************************************************
* Private Functions * Private Functions
****************************************************************************/ ****************************************************************************/
/* This is the ADXL345 Interupt handler */ /* This is the ADXL345 Interrupt handler */
int adxl345_interrupt(int irq, FAR void *context) int adxl345_interrupt(int irq, FAR void *context)
{ {

2
configs/mirtoo/README.txt
View File

@ -952,7 +952,7 @@ Where <subdir> is one of the following:
NOTES: NOTES:
a) It takes many seconds to boot the sytem using the NXFFS a) It takes many seconds to boot the system using the NXFFS
file system because the entire FLASH must be verified on power up file system because the entire FLASH must be verified on power up
(and longer the first time that NXFFS comes up and has to format the (and longer the first time that NXFFS comes up and has to format the
entire FLASH). entire FLASH).

2
configs/nucleo-144/scripts/f722-flash.ld
View File

@ -52,7 +52,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x0010:0000 * ST programmed value: System bootloader at 0x0010:0000
* *
* NuttX does not modify these option byes. On the unmodified NUCLEO-144 * NuttX does not modify these option bytes. On the unmodified NUCLEO-144
* board, the BOOT0 pin is at ground so by default, the STM32F722ZE will * board, the BOOT0 pin is at ground so by default, the STM32F722ZE will
* boot from address 0x0020:0000 in ITCM FLASH. * boot from address 0x0020:0000 in ITCM FLASH.
* *

2
configs/nucleo-144/scripts/f746-flash.ld
View File

@ -50,7 +50,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x0010:0000 * ST programmed value: System bootloader at 0x0010:0000
* *
* NuttX does not modify these option byes. On the unmodified NUCLEO-144 * NuttX does not modify these option bytes. On the unmodified NUCLEO-144
* board, the BOOT0 pin is at ground so by default, the STM32F746ZGT6 will * board, the BOOT0 pin is at ground so by default, the STM32F746ZGT6 will
* boot from address 0x0020:0000 in ITCM FLASH. * boot from address 0x0020:0000 in ITCM FLASH.
* *

2
configs/nucleo-144/scripts/f767-flash.ld
View File

@ -50,7 +50,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x0010:0000 * ST programmed value: System bootloader at 0x0010:0000
* *
* NuttX does not modify these option byes. On the unmodified NUCLEO-144 * NuttX does not modify these option bytes. On the unmodified NUCLEO-144
* board, the BOOT0 pin is at ground so by default, the STM32F767ZIT6 will * board, the BOOT0 pin is at ground so by default, the STM32F767ZIT6 will
* boot from address 0x0020:0000 in ITCM FLASH. * boot from address 0x0020:0000 in ITCM FLASH.
* *

2
configs/nucleo-144/scripts/memory.ld
View File

@ -49,7 +49,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x0010:0000 * ST programmed value: System bootloader at 0x0010:0000
* *
* NuttX does not modify these option byes. On the unmodified STM32F746G * NuttX does not modify these option bytes. On the unmodified STM32F746G
* DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot * DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot
* to address 0x0020:0000 in ITCM FLASH. * to address 0x0020:0000 in ITCM FLASH.
* *

2
configs/nucleo-h743zi/scripts/flash.ld
View File

@ -60,7 +60,7 @@
* *
* TODO: Check next paragraph with nucleo schematics * TODO: Check next paragraph with nucleo schematics
* *
* NuttX does not modify these option byes. On the unmodified NUCLEO-H743ZI * NuttX does not modify these option bytes. On the unmodified NUCLEO-H743ZI
* board, the BOOT0 pin is at ground so by default, the STM32 will boot * board, the BOOT0 pin is at ground so by default, the STM32 will boot
* to address 0x0800:0000 in FLASH. * to address 0x0800:0000 in FLASH.
* *

2
configs/nucleo-l496zg/scripts/memory.ld
View File

@ -49,7 +49,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x0010:0000 * ST programmed value: System bootloader at 0x0010:0000
* *
* NuttX does not modify these option byes. On the unmodified STM32F746G * NuttX does not modify these option bytes. On the unmodified STM32F746G
* DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot * DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot
* to address 0x0020:0000 in ITCM FLASH. * to address 0x0020:0000 in ITCM FLASH.
* *

4
configs/olimex-stm32-h405/README.txt
View File

@ -15,7 +15,7 @@ Make sure that '# CONFIG_NSH_CONDEV is not set' is in the .config file - it defa
to '/dev/console' which makes problems with the shell over USB. to '/dev/console' which makes problems with the shell over USB.
The following peripherals are enabled in this configuration. The following peripherals are enabled in this configuration.
- LED: Shows the sytem status - LED: Shows the system status
- Button: Built in app 'buttons' works. - Button: Built in app 'buttons' works.
@ -25,4 +25,4 @@ The following peripherals are enabled in this configuration.
have to press enter three times until NSH appears. have to press enter three times until NSH appears.
- CAN: Built in app 'can' is enabled but not tested, since no CAN transceiver - CAN: Built in app 'can' is enabled but not tested, since no CAN transceiver
is on board. is on board.

4
configs/olimex-stm32-p207/README.txt
View File

@ -13,7 +13,7 @@ loop.
The following peripherals are enabled in this configuration. The following peripherals are enabled in this configuration.
- LEDs: show the sytem status - LEDs: show the system status
- Buttons: TAMPER-button, WKUP-button, J1-Joystick (consists of RIGHT-, - Buttons: TAMPER-button, WKUP-button, J1-Joystick (consists of RIGHT-,
UP-, LEFT-, DOWN-, and CENTER-button). Built in app UP-, LEFT-, DOWN-, and CENTER-button). Built in app
@ -31,4 +31,4 @@ The following peripherals are enabled in this configuration.
- CAN: Built in app 'can' works, but appart from that not really tested. - CAN: Built in app 'can' works, but appart from that not really tested.
- Ethernet: Ping to other station on the network works. - Ethernet: Ping to other station on the network works.

2
configs/olimex-stm32-p407/README.txt
View File

@ -20,7 +20,7 @@ Board Support
The following peripherals are available in this configuration. The following peripherals are available in this configuration.
- LEDs: Show the sytem status - LEDs: Show the system status
- Buttons: TAMPER-button, WKUP-button, J1-Joystick (consists of RIGHT-, - Buttons: TAMPER-button, WKUP-button, J1-Joystick (consists of RIGHT-,
UP-, LEFT-, DOWN-, and CENTER-button). UP-, LEFT-, DOWN-, and CENTER-button).

2
configs/samv71-xult/src/sam_ili9488.c
View File

@ -620,7 +620,7 @@ static int sam_lcd_getreg(FAR struct sam_dev_s *priv, uint8_t cmd,
DEBUGASSERT(nbytes <= 4); DEBUGASSERT(nbytes <= 4);
/* Read the request number of byes (as 16-bit values) plus a leading /* Read the request number of bytes (as 16-bit values) plus a leading
* dummy read. * dummy read.
*/ */

2
configs/sim/README.txt
View File

@ -685,7 +685,7 @@ nx
This version has NO DISPLAY and is only useful for debugging NX This version has NO DISPLAY and is only useful for debugging NX
internals in environments where X11 is not supported. There is internals in environments where X11 is not supported. There is
and additonal configuration that may be added to include an X11- and additional configuration that may be added to include an X11-
based simulated framebuffer driver: based simulated framebuffer driver:
CONFIG_SIM_X11FB - Use X11 window for framebuffer CONFIG_SIM_X11FB - Use X11 window for framebuffer

2
configs/stm32f103-minimum/src/stm32_mcp2515.c
View File

@ -118,7 +118,7 @@ static struct stm32_mcp2515config_s g_mcp2515config =
* Private Functions * Private Functions
****************************************************************************/ ****************************************************************************/
/* This is the MCP2515 Interupt handler */ /* This is the MCP2515 Interrupt handler */
int mcp2515_interrupt(int irq, FAR void *context, FAR void *arg) int mcp2515_interrupt(int irq, FAR void *context, FAR void *arg)
{ {

2
configs/stm32f746-ws/scripts/flash.ld
View File

@ -51,7 +51,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x0010:0000 * ST programmed value: System bootloader at 0x0010:0000
* *
* NuttX does not modify these option byes. On the unmodified STM32F746G * NuttX does not modify these option bytes. On the unmodified STM32F746G
* DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot * DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot
* to address 0x0020:0000 in ITCM FLASH. * to address 0x0020:0000 in ITCM FLASH.
* *

2
configs/stm32f746-ws/scripts/memory.ld
View File

@ -49,7 +49,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x0010:0000 * ST programmed value: System bootloader at 0x0010:0000
* *
* NuttX does not modify these option byes. On the unmodified STM32F746G * NuttX does not modify these option bytes. On the unmodified STM32F746G
* DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot * DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot
* to address 0x0020:0000 in ITCM FLASH. * to address 0x0020:0000 in ITCM FLASH.
* *

2
configs/stm32f746g-disco/scripts/flash.ld
View File

@ -51,7 +51,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x0010:0000 * ST programmed value: System bootloader at 0x0010:0000
* *
* NuttX does not modify these option byes. On the unmodified STM32F746G * NuttX does not modify these option bytes. On the unmodified STM32F746G
* DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot * DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot
* to address 0x0020:0000 in ITCM FLASH. * to address 0x0020:0000 in ITCM FLASH.
* *

2
configs/stm32f746g-disco/scripts/memory.ld
View File

@ -49,7 +49,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x0010:0000 * ST programmed value: System bootloader at 0x0010:0000
* *
* NuttX does not modify these option byes. On the unmodified STM32F746G * NuttX does not modify these option bytes. On the unmodified STM32F746G
* DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot * DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot
* to address 0x0020:0000 in ITCM FLASH. * to address 0x0020:0000 in ITCM FLASH.
* *

2
crypto/Makefile
View File

@ -50,7 +50,7 @@ ifeq ($(CONFIG_CRYPTO_CRYPTODEV),y)
CRYPTO_CSRCS += cryptodev.c CRYPTO_CSRCS += cryptodev.c
endif endif
# Sofware AES library # Software AES library
ifeq ($(CONFIG_CRYPTO_SW_AES),y) ifeq ($(CONFIG_CRYPTO_SW_AES),y)
CRYPTO_CSRCS += aes.c CRYPTO_CSRCS += aes.c

4
drivers/Kconfig
View File

@ -42,7 +42,7 @@ config DEV_URANDOM
NOTE: This option may not be cryptographially secure and should not NOTE: This option may not be cryptographially secure and should not
be enabled if you are concerned about cyptographically secure be enabled if you are concerned about cyptographically secure
pseudo-random numbers (CPRNG) and do not know the characteristics pseudo-random numbers (CPRNG) and do not know the characteristics
of the software PRNG impelementation! of the software PRNG implementation!
if DEV_URANDOM if DEV_URANDOM
@ -60,7 +60,7 @@ config DEV_URANDOM_XORSHIFT128
NOTE: Not cyptographically secure NOTE: Not cyptographically secure
config DEV_URANDOM_CONGRUENTIAL config DEV_URANDOM_CONGRUENTIAL
bool "Conguential" bool "Congruential"
---help--- ---help---
Use the same congruential general used with srand(). This algorithm Use the same congruential general used with srand(). This algorithm
is computationally more intense and uses double precision floating is computationally more intense and uses double precision floating

2
drivers/analog/Kconfig
View File

@ -18,7 +18,7 @@ config ADC
MCU-specific, lower half drivers may be selected independently of MCU-specific, lower half drivers may be selected independently of
CONFIG_ADC. However, if CONFIG_ADC is selected, then it is assume CONFIG_ADC. However, if CONFIG_ADC is selected, then it is assume
that lower half ADC drivers will be used only with the commoun ADC that lower half ADC drivers will be used only with the common ADC
upper half driver. upper half driver.
if ADC if ADC

2
drivers/audio/Kconfig
View File

@ -62,7 +62,7 @@ config VS1053_DEVICE_COUNT
int "Number of VS1053 devices attached" int "Number of VS1053 devices attached"
default 1 default 1
---help--- ---help---
Sets the number of VS1053 type devices availalbe to the system. Sets the number of VS1053 type devices available to the system.
This is required to reserve global, static lower-half driver This is required to reserve global, static lower-half driver
context pointers for the DREQ ISR to use for lookup when it needs context pointers for the DREQ ISR to use for lookup when it needs
to signal that additional data is being requested. to signal that additional data is being requested.

6
drivers/input/Kconfig
View File

@ -159,7 +159,7 @@ config ADS7843E_SPIDEV
int "SPI bus number" int "SPI bus number"
default 0 default 0
---help--- ---help---
Selects the SPI bus number identying that SPI interface that Selects the SPI bus number identifying that SPI interface that
connects the ADS843E to the MCU. connects the ADS843E to the MCU.
config ADS7843E_DEVMINOR config ADS7843E_DEVMINOR
@ -378,7 +378,7 @@ config STMPE811_GPIOINT_DISABLE
default y default y
depends on !STMPE811_GPIO_DISABLE depends on !STMPE811_GPIO_DISABLE
---help--- ---help---
Disable driver GPIO interrupt functionlality (ignored if GPIO functionality is Disable driver GPIO interrupt functionality (ignored if GPIO functionality is
disabled). disabled).
config STMPE811_TEMP_DISABLE config STMPE811_TEMP_DISABLE
@ -446,7 +446,7 @@ config BUTTONS_LOWER
3. The board.h header file must provide the definition 3. The board.h header file must provide the definition
NUM_BUTTONS, and NUM_BUTTONS, and
4. The board.h header file must not include any other 4. The board.h header file must not include any other
header files that are not accessibble in this context header files that are not accessible in this context
(such as those in arch/<arch>/src/<chip>) UNLESS those (such as those in arch/<arch>/src/<chip>) UNLESS those
inclusions are conditioned on __KERNEL__. button_lower.c inclusions are conditioned on __KERNEL__. button_lower.c
will undefine __KERNEL__ before included board.h. will undefine __KERNEL__ before included board.h.

8
drivers/lcd/Kconfig
View File

@ -42,7 +42,7 @@ config LCD_FRAMEBUFFER
effeciency reasons but do not export a framebuffer interface. So effeciency reasons but do not export a framebuffer interface. So
those LCD cannot be used as framebuffer drivers. If the option is those LCD cannot be used as framebuffer drivers. If the option is
available, then such internal framebuffer support should be available, then such internal framebuffer support should be
disabled because this external commone framebuffer interface will disabled because this external common framebuffer interface will
provide the necessary buffering. provide the necessary buffering.
config LCD_EXTERNINIT config LCD_EXTERNINIT
@ -155,9 +155,9 @@ config P14201_FRAMEBUFFER
The latter limitation effectively reduces the 128x96 disply to 64x96. The latter limitation effectively reduces the 128x96 disply to 64x96.
NOTE: This option should not be used if CONFIG_LCD_FRAMBEBUFFER is NOTE: This option should not be used if CONFIG_LCD_FRAMBEBUFFER is
enabled. That options provides for a more geneneralized, external enabled. That options provides for a more generalized, external
LCD framebuffer. This internal framebuffer support should not be LCD framebuffer. This internal framebuffer support should not be
enabled with CONFIG_LCD_FRAMBEBUFFER because this external commone enabled with CONFIG_LCD_FRAMBEBUFFER because this external common
framebuffer interface will provide the necessary buffering. framebuffer interface will provide the necessary buffering.
endif endif
@ -845,7 +845,7 @@ config MEMLCD_EXTCOMIN_MODE_HW
default n default n
---help--- ---help---
If use hardware mode to toggle VCOM, we need to send specific If use hardware mode to toggle VCOM, we need to send specific
command at a constant frequency to trigger the LCD intenal command at a constant frequency to trigger the LCD internal
hardware logic. While use software mode, we set up a timer to hardware logic. While use software mode, we set up a timer to
toggle EXTCOMIN connected IO, basically, it is a hardware toggle EXTCOMIN connected IO, basically, it is a hardware
timer to ensure a constant frequency. timer to ensure a constant frequency.

2
drivers/lcd/memlcd.c
View File

@ -364,7 +364,7 @@ static inline void memlcd_clear(FAR struct memlcd_dev_s *mlcd)
* the Memory LCD. Which is always used within setpower() call. * the Memory LCD. Which is always used within setpower() call.
* Basically, the frequency shall be 1Hz~60Hz. * Basically, the frequency shall be 1Hz~60Hz.
* If use hardware mode to toggle VCOM, we need to send specific command at a * If use hardware mode to toggle VCOM, we need to send specific command at a
* constant frequency to trigger the LCD intenal hardware logic. * constant frequency to trigger the LCD internal hardware logic.
* While use software mode, we set up a timer to toggle EXTCOMIN connected IO, * While use software mode, we set up a timer to toggle EXTCOMIN connected IO,
* basically, it is a hardware timer to ensure a constant frequency. * basically, it is a hardware timer to ensure a constant frequency.
* *

2
drivers/leds/Kconfig
View File

@ -29,7 +29,7 @@ config USERLED_LOWER
2. The board.h header file must provide the definition 2. The board.h header file must provide the definition
BOARD_NLEDS, and BOARD_NLEDS, and
3. The board.h header file must not include any other 3. The board.h header file must not include any other
header files that are not accessibble in this context header files that are not accessible in this context
(such as those in arch/<arch>/src/<chip>) UNLESS those (such as those in arch/<arch>/src/<chip>) UNLESS those
inclusions are conditioned on __KERNEL__. button_lower.c inclusions are conditioned on __KERNEL__. button_lower.c
will undefine __KERNEL__ before included board.h. will undefine __KERNEL__ before included board.h.

2
drivers/mmcsd/Kconfig
View File

@ -125,7 +125,7 @@ config SDIO_BLOCKSETUP
bool "SDIO block setup" bool "SDIO block setup"
default n default n
---help--- ---help---
Some hardward needs to be informed of the selected blocksize and the Some hardware needs to be informed of the selected blocksize and the
number of blocks. Others just work on the byte stream. This option number of blocks. Others just work on the byte stream. This option
enables the block setup method in the SDIO vtable. enables the block setup method in the SDIO vtable.

4
drivers/mmcsd/mmcsd_spi.c
View File

@ -807,7 +807,7 @@ static void mmcsd_decodecsd(FAR struct mmcsd_slot_s *slot, uint8_t *csd)
/* SDHC ver2.x cards have fixed block transfer size of 512 bytes. SDC /* SDHC ver2.x cards have fixed block transfer size of 512 bytes. SDC
* ver1.x cards with capacity less than 1Gb, will have sector size * ver1.x cards with capacity less than 1Gb, will have sector size
* 512 byes. SDC ver1.x cards with capacity of 2Gb will report readbllen * 512 bytes. SDC ver1.x cards with capacity of 2Gb will report readbllen
* of 1024 but should use 512 bytes for block transfers. SDC ver1.x 4Gb * of 1024 but should use 512 bytes for block transfers. SDC ver1.x 4Gb
* cards will report readbllen of 2048 bytes -- are they also 512 bytes? * cards will report readbllen of 2048 bytes -- are they also 512 bytes?
*/ */
@ -1797,7 +1797,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
/* SDHC ver2.x cards have fixed block transfer size of 512 bytes. SDC /* SDHC ver2.x cards have fixed block transfer size of 512 bytes. SDC
* ver1.x cards with capacity less than 1Gb, will have sector size * ver1.x cards with capacity less than 1Gb, will have sector size
* 512 byes. SDC ver1.x cards with capacity of 2Gb will report readbllen * 512 bytes. SDC ver1.x cards with capacity of 2Gb will report readbllen
* of 1024 but should use 512 bytes for block transfers. SDC ver1.x 4Gb * of 1024 but should use 512 bytes for block transfers. SDC ver1.x 4Gb
* cards will report readbllen of 2048 bytes -- are they also 512 bytes? * cards will report readbllen of 2048 bytes -- are they also 512 bytes?
* I think that none of these high capacity cards support setting the * I think that none of these high capacity cards support setting the

4
drivers/mtd/Kconfig
View File

@ -210,7 +210,7 @@ config MTD_NAND_BLOCKCHECK
Enable support for ECC and bad block checking. Enable support for ECC and bad block checking.
config MTD_NAND_SWECC config MTD_NAND_SWECC
bool "Sofware ECC support" bool "Software ECC support"
default n if ARCH_NAND_HWECC default n if ARCH_NAND_HWECC
default y if !ARCH_NAND_HWECC default y if !ARCH_NAND_HWECC
---help--- ---help---
@ -444,7 +444,7 @@ config M25P_MEMORY_TYPE
The memory type for M25 "P" series is 0x20, but the driver also supports "F" series The memory type for M25 "P" series is 0x20, but the driver also supports "F" series
devices, such as the EON EN25F80 part which adds a 4K sector erase capability. The devices, such as the EON EN25F80 part which adds a 4K sector erase capability. The
memory type for "F" series parts from EON is 0x31. The 4K sector erase size will memory type for "F" series parts from EON is 0x31. The 4K sector erase size will
automatically be enabled when filesytems that can use it are enabled, such as SMART. automatically be enabled when filesystems that can use it are enabled, such as SMART.
config MT25Q_MEMORY_TYPE config MT25Q_MEMORY_TYPE
hex "MT25Q memory type ID" hex "MT25Q memory type ID"

8
drivers/net/Kconfig
View File

@ -23,7 +23,7 @@ config NETDEV_TELNET
---help--- ---help---
The Telnet driver generates a character driver instance to support a The Telnet driver generates a character driver instance to support a
Telnet session. This driver is used by the Telnet daemon. The Telnet session. This driver is used by the Telnet daemon. The
Telnet daeman will instantiate a new Telnet driver to support Telnet daemon will instantiate a new Telnet driver to support
standard I/O on the new Telnet session. standard I/O on the new Telnet session.
if NETDEV_TELNET if NETDEV_TELNET
@ -149,7 +149,7 @@ choice
default DM9X_MODE_AUTO default DM9X_MODE_AUTO
config DM9X_MODE_AUTO config DM9X_MODE_AUTO
bool "Autonegotion" bool "Autonegotiation"
config DM9X_MODE_10MHD config DM9X_MODE_10MHD
bool "10BaseT half duplex" bool "10BaseT half duplex"
@ -166,7 +166,7 @@ config DM9X_MODE_100MFD
endchoice # DM90x0 mode endchoice # DM90x0 mode
config DM9X_NINTERFACES config DM9X_NINTERFACES
int "Nubmer of DM90x0 interfaces" int "Number of DM90x0 interfaces"
default 1 default 1
depends on EXPERIMENTAL depends on EXPERIMENTAL
@ -314,7 +314,7 @@ config ENCX24J600_NRXDESCR
Defines how many descriptors are preallocated for the Defines how many descriptors are preallocated for the
transmission and reception queues. transmission and reception queues.
The ENC has a relative large packet buffer of 24kB which can The ENC has a relative large packet buffer of 24kB which can
be used to buffer multiple packets silmutaneously be used to buffer multiple packets simutaneously
choice choice
prompt "Work queue" prompt "Work queue"

2
drivers/net/enc28j60.h
View File

@ -88,7 +88,7 @@
*/ */
#define ENC_EIE (0x1b) /* Ethernet Interrupt Enable Register */ #define ENC_EIE (0x1b) /* Ethernet Interrupt Enable Register */
#define ENC_EIR (0x1c) /* Ethernet Interupt Request Register */ #define ENC_EIR (0x1c) /* Ethernet Interrupt Request Register */
#define ENC_ESTAT (0x1d) /* Ethernet Status Register */ #define ENC_ESTAT (0x1d) /* Ethernet Status Register */
#define ENC_ECON2 (0x1e) /* Ethernet Control 2 Register */ #define ENC_ECON2 (0x1e) /* Ethernet Control 2 Register */
#define ENC_ECON1 (0x1f) /* Ethernet Control 1 Register */ #define ENC_ECON1 (0x1f) /* Ethernet Control 1 Register */

2
drivers/spi/Kconfig
View File

@ -72,7 +72,7 @@ config SPI_HWFEATURES
default n default n
---help--- ---help---
Selected only if a specific H/W feature is selected. This is Selected only if a specific H/W feature is selected. This is
basically the OR of any specific hardware feature and eanbles basically the OR of any specific hardware feature and enables
the SPI hwfeatures() interface method. the SPI hwfeatures() interface method.
config SPI_CRCGENERATION config SPI_CRCGENERATION

4
drivers/syslog/Kconfig
View File

@ -169,11 +169,11 @@ config SYSLOG_NONE
endchoice endchoice
config SYSLOG_FILE config SYSLOG_FILE
bool "Sylog file output" bool "Syslog file output"
default n default n
select SYSLOG_WRITE select SYSLOG_WRITE
---help--- ---help---
Build in support to use a file to collect SYSOG output. File SYSLOG Build in support to use a file to collect SYSLOG output. File SYSLOG
channels differ from other SYSLOG channels in that they cannot be channels differ from other SYSLOG channels in that they cannot be
established until after fully booting and mounting the target file established until after fully booting and mounting the target file
system. The function syslog_file_channel() would need to be called system. The function syslog_file_channel() would need to be called

4
drivers/usbdev/Kconfig
View File

@ -350,14 +350,14 @@ config CDCACM_EPINTIN
endif endif
config CDCACM_EPINTIN_FSSIZE config CDCACM_EPINTIN_FSSIZE
int "Interupt IN full speed MAXPACKET size" int "Interrupt IN full speed MAXPACKET size"
default 64 default 64
---help--- ---help---
Max package size for the interrupt IN endpoint if full speed mode. Max package size for the interrupt IN endpoint if full speed mode.
Default 64. Default 64.
config CDCACM_EPINTIN_HSSIZE config CDCACM_EPINTIN_HSSIZE
int "Interupt IN high speed MAXPACKET size" int "Interrupt IN high speed MAXPACKET size"
default 64 default 64
---help--- ---help---
Max package size for the interrupt IN endpoint if high speed mode. Max package size for the interrupt IN endpoint if high speed mode.

4
drivers/wireless/Kconfig
View File

@ -18,7 +18,7 @@ config CC1101_SPIDEV
int "SPI bus number" int "SPI bus number"
default 2 default 2
---help--- ---help---
Selects the SPI bus number identying that SPI interface that Selects the SPI bus number identifying that SPI interface that
connects the CC1101 to the MCU. connects the CC1101 to the MCU.
endif endif
@ -79,7 +79,7 @@ config WL_NRF24L01_RXSUPPORT
bool "Support messages reception" bool "Support messages reception"
default y default y
---help--- ---help---
If this opion is disabled the driver supports only the transmission of messages. If this option is disabled the driver supports only the transmission of messages.
Reception of messages will be disabled (and corresponding functions removed). Reception of messages will be disabled (and corresponding functions removed).
Note: this option is intended to reduce driver code size for 'transmission Note: this option is intended to reduce driver code size for 'transmission
only' devices. only' devices.

6
drivers/wireless/spirit/Kconfig
View File

@ -4,11 +4,11 @@
# #
config WL_SPIRIT config WL_SPIRIT
bool "STMicro Spririt Radio Library" bool "STMicro Spirit Radio Library"
default n default n
select SPI select SPI
---help--- ---help---
Enable support for the STMicro Spririt Radio Library Enable support for the STMicro Spirit Radio Library
if WL_SPIRIT if WL_SPIRIT
@ -25,7 +25,7 @@ config WL_SPIRIT_REGDEBUG
default n default n
depends on DEBUG_WIRELESS_INFO depends on DEBUG_WIRELESS_INFO
---help--- ---help---
Enable logic to dump each value read from and written to the Sprit Enable logic to dump each value read from and written to the Spirit
registers. registers.
config WL_SPIRIT_FIFODUMP config WL_SPIRIT_FIFODUMP

2
fs/Kconfig
View File

@ -46,7 +46,7 @@ config PSEUDOFS_SOFTLINKS
default n default n
depends on !DISABLE_PSEUDOFS_OPERATIONS depends on !DISABLE_PSEUDOFS_OPERATIONS
---help--- ---help---
Enable support for soft links in the pseudeo file system. Soft Enable support for soft links in the pseudo file system. Soft
links are not supported within mounted volumes by any NuttX file links are not supported within mounted volumes by any NuttX file
system. However, if this option is selected, then soft links system. However, if this option is selected, then soft links
may be add in the pseudo file system. This might be useful, for may be add in the pseudo file system. This might be useful, for

2
fs/mmap/Kconfig
View File

@ -21,7 +21,7 @@ config FS_RAMMAP
into RAM. These copied files have some of the properties of into RAM. These copied files have some of the properties of
standard memory mapped files. standard memory mapped files.
See nuttx/fs/mmap/README.txt for additonal information. See nuttx/fs/mmap/README.txt for additional information.
if FS_RAMMAP if FS_RAMMAP
endif endif

2
fs/nfs/Kconfig
View File

@ -15,7 +15,7 @@ config NFS
#if NFS #if NFS
config NFS_STATISTICS config NFS_STATISTICS
bool "NFS Stastics" bool "NFS Statics"
default n default n
depends on NFS depends on NFS
---help--- ---help---

2
fs/nxffs/Kconfig
View File

@ -77,7 +77,7 @@ config NXFFS_PREALLOCATED
---help--- ---help---
If CONFIG_NXFSS_PREALLOCATED is defined, then this is the single, pre- If CONFIG_NXFSS_PREALLOCATED is defined, then this is the single, pre-
allocated NXFFS volume instance. Currently required because full, allocated NXFFS volume instance. Currently required because full,
dynamic allocation of NXFFS volumes in not yet supporte. dynamic allocation of NXFFS volumes in not yet supported.
config NXFFS_ERASEDSTATE config NXFFS_ERASEDSTATE
hex "FLASH erased state" hex "FLASH erased state"

2
fs/procfs/fs_procfs.c
View File

@ -1151,7 +1151,7 @@ int procfs_register(FAR const struct procfs_entry_s *entry)
* procfs entry table. If that table were actively in use, then that * procfs entry table. If that table were actively in use, then that
* could cause procfs logic to use a stale memory pointer! We avoid that * could cause procfs logic to use a stale memory pointer! We avoid that
* problem by requiring that the procfs file be unmounted when the new * problem by requiring that the procfs file be unmounted when the new
* entry is added. That requirment, however, is not enforced explicitly. * entry is added. That requirement, however, is not enforced explicitly.
* *
* Locking the scheduler as done below is insufficient. As would be just * Locking the scheduler as done below is insufficient. As would be just
* marking the entries as volatile. * marking the entries as volatile.

2
graphics/Kconfig
View File

@ -46,7 +46,7 @@ config NX_ANTIALIASING
default n default n
depends on (!NX_DISABLE_16BPP || !NX_DISABLE_24BPP || !NX_DISABLE_32BPP) && !NX_LCDDRIVER depends on (!NX_DISABLE_16BPP || !NX_DISABLE_24BPP || !NX_DISABLE_32BPP) && !NX_LCDDRIVER
---help--- ---help---
Enable support for ant-aliasing when rendering lines as various Enable support for anti-aliasing when rendering lines as various
orientations. orientations.
config NX_WRITEONLY config NX_WRITEONLY

2
graphics/vnc/server/Kconfig
View File

@ -133,7 +133,7 @@ config VNCSERVER_DEBUG
depends on DEBUG_FEATURES && !DEBUG_GRAPHICS depends on DEBUG_FEATURES && !DEBUG_GRAPHICS
---help--- ---help---
Normally VNC debug output is selected with DEBUG_GRAPHICS. The VNC Normally VNC debug output is selected with DEBUG_GRAPHICS. The VNC
server server suupport this special option to enable GRAPHICS debug server server support this special option to enable GRAPHICS debug
output for the VNC server while GRAPHICS debug is disabled. This output for the VNC server while GRAPHICS debug is disabled. This
provides an cleaner, less cluttered output when you only wish to provides an cleaner, less cluttered output when you only wish to
debug the VNC server versus enabling DEBUG_GRAPHICS globally. debug the VNC server versus enabling DEBUG_GRAPHICS globally.

2
graphics/vnc/server/vnc_fbdev.c
View File

@ -663,7 +663,7 @@ int up_fbinitialize(int display)
* are reported to the VNC framebuffer driver from the remote VNC client. * are reported to the VNC framebuffer driver from the remote VNC client.
* *
* In the standard graphics architecture, the keyboard/mouse inputs are * In the standard graphics architecture, the keyboard/mouse inputs are
* received by some appliation/board specific logic at the highest level * received by some application/board specific logic at the highest level
* in the architecture via input drivers. The received keyboard/mouse * in the architecture via input drivers. The received keyboard/mouse
* input data must then be "injected" into NX where it can they can be * input data must then be "injected" into NX where it can they can be
* assigned to the window that has focus. They will eventually be * assigned to the window that has focus. They will eventually be

2
graphics/vnc/server/vnc_negotiate.c
View File

@ -292,7 +292,7 @@ int vnc_negotiate(FAR struct vnc_session_s *session)
* *
* "Once the client and server are sure that they’re happy to talk to one * "Once the client and server are sure that they’re happy to talk to one
* another using the agreed security type, the protocol passes to the * another using the agreed security type, the protocol passes to the
* initialisation phase. The client sends a ClientInit message followed * initialization phase. The client sends a ClientInit message followed
* by the server sending a ServerInit message." * by the server sending a ServerInit message."
* *
* In this implementation, the sharing flag is ignored. * In this implementation, the sharing flag is ignored.

4
include/nuttx/fs/userfs.h
View File

@ -547,7 +547,7 @@ extern "C"
* Register the UserFS factory driver at dev/userfs. * Register the UserFS factory driver at dev/userfs.
* *
* NOTE: This is an OS internal function that should not be called from * NOTE: This is an OS internal function that should not be called from
* appliation logic. * application logic.
* *
* Input Parameters: * Input Parameters:
* None * None
@ -582,7 +582,7 @@ int userfs_register(void);
* LocalHost client socket. * LocalHost client socket.
* *
* NOTE: This is a user function that is implemented as part of the * NOTE: This is a user function that is implemented as part of the
* NuttX C library and is intended to be called by appliation logic. * NuttX C library and is intended to be called by application logic.
* *
* Input Parameters: * Input Parameters:
* mountpt - Mountpoint path * mountpt - Mountpoint path

2
include/nuttx/sensors/bmg160.h
View File

@ -245,7 +245,7 @@
#define BMG160_INT_RST_LATCH_REG_LATCH_INT_1_bm (1 << 1) /* Latch mode selection bit 1 */ #define BMG160_INT_RST_LATCH_REG_LATCH_INT_1_bm (1 << 1) /* Latch mode selection bit 1 */
#define BMG160_INT_RST_LATCH_REG_LATCH_INT_0_bm (1 << 0) /* Latch mode selection bit 0 */ #define BMG160_INT_RST_LATCH_REG_LATCH_INT_0_bm (1 << 0) /* Latch mode selection bit 0 */
/* Interupt High Rate Configuration Register Definitions ************************************/ /* Interrupt High Rate Configuration Register Definitions ************************************/
/* BMG160 HIGH_TH_X_REG Definitions */ /* BMG160 HIGH_TH_X_REG Definitions */

2
include/nuttx/signal.h
View File

@ -186,7 +186,7 @@ int nxsig_queue(int pid, int signo, void *sival_ptr);
* The nxsig_kill() system call can be used to send any signal to any task. * The nxsig_kill() system call can be used to send any signal to any task.
* *
* This is an internal OS interface. It is functionally equivalent to * This is an internal OS interface. It is functionally equivalent to
* the POSIX standard kill() function but does not modify the appliation * the POSIX standard kill() function but does not modify the application
* errno variable. * errno variable.
* *
* Limitation: Sending of signals to 'process groups' is not * Limitation: Sending of signals to 'process groups' is not

6
include/nuttx/video/rfb.h
View File

@ -174,7 +174,7 @@ struct rfb_sectype_result_s
uint8_t result[4]; /* U32 Security type result */ uint8_t result[4]; /* U32 Security type result */
}; };
/* "If successful, the protocol passes to the initialisation phase (section /* "If successful, the protocol passes to the initialization phase (section
* 6.3)." * 6.3)."
* *
* "Version 3.8 onwards If unsuccessful, the server sends a string * "Version 3.8 onwards If unsuccessful, the server sends a string
@ -201,7 +201,7 @@ struct rfb_sectype_fail_s
* "Version 3.8 onwards The protocol continues with the SecurityResult * "Version 3.8 onwards The protocol continues with the SecurityResult
* message." * message."
* *
* "Version 3.3 and 3.7 The protocol passes to the initialisation phase * "Version 3.3 and 3.7 The protocol passes to the initialization phase
* (section 6.3)." * (section 6.3)."
* *
* 6.2.2 VNC Authentication * 6.2.2 VNC Authentication
@ -232,7 +232,7 @@ struct rfb_response_s
* *
* "Once the client and server are sure that they’re happy to talk to one * "Once the client and server are sure that they’re happy to talk to one
* another using the agreed security type, the protocol passes to the * another using the agreed security type, the protocol passes to the
* initialisation phase. The client sends a ClientInit message followed by * initialization phase. The client sends a ClientInit message followed by
* the server sending a ServerInit message. * the server sending a ServerInit message.
* *
* "Shared-flag is non-zero (true) if the server should try to share the * "Shared-flag is non-zero (true) if the server should try to share the

2
include/nuttx/video/vnc.h
View File

@ -88,7 +88,7 @@ extern "C"
* are reported to the VNC framebuffer driver from the remote VNC client. * are reported to the VNC framebuffer driver from the remote VNC client.
* *
* In the standard graphics architecture, the keyboard/mouse inputs are * In the standard graphics architecture, the keyboard/mouse inputs are
* received by some appliation/board specific logic at the highest level * received by some application/board specific logic at the highest level
* in the architecture via input drivers. The received keyboard/mouse * in the architecture via input drivers. The received keyboard/mouse
* input data must then be "injected" into NX where it can they can be * input data must then be "injected" into NX where it can they can be
* assigned to the window that has focus. They will eventually be * assigned to the window that has focus. They will eventually be

2
libs/libc/machine/Kconfig
View File

@ -160,4 +160,4 @@ if ARCH_X86
source libs/libc/machine/x86/Kconfig source libs/libc/machine/x86/Kconfig
endif endif
endmenu # Architecture-Specific Spport endmenu # Architecture-Specific Support

4
libs/libc/misc/Kconfig
View File

@ -67,7 +67,7 @@ config LIB_KBDCODEC
In NuttX, a keyboard/keypad driver is simply a character driver that In NuttX, a keyboard/keypad driver is simply a character driver that
may have an (optional) encoding/decoding layer on the data returned may have an (optional) encoding/decoding layer on the data returned
by the character driver. A keyboard may return simple text data by the character driver. A keyboard may return simple text data
(alphabetic, numeric, and punctuaction) or control characters (alphabetic, numeric, and punctuation) or control characters
(enter, control-C, etc.). However, in addition, most keyboards (enter, control-C, etc.). However, in addition, most keyboards
support actions that cannot be represented as text data. Such support actions that cannot be represented as text data. Such
actions include things like cursor controls (home, up arrow, actions include things like cursor controls (home, up arrow,
@ -89,7 +89,7 @@ config LIB_SLCDCODEC
In NuttX, a character-oriented, segment LCD (SLCD) driver is simply In NuttX, a character-oriented, segment LCD (SLCD) driver is simply
a character device that may have an (optional) encoding/decoding a character device that may have an (optional) encoding/decoding
layer on the data provided to the SLCD driver. The application may layer on the data provided to the SLCD driver. The application may
provide simple text data (alphabetic, numeric, and punctuaction) or provide simple text data (alphabetic, numeric, and punctuation) or
control characters (enter, control-C, etc.). However, in addition, control characters (enter, control-C, etc.). However, in addition,
most SLCDs support actions that cannot be represented as text data. most SLCDs support actions that cannot be represented as text data.
Such actions include things like cursor controls (home, up arrow, Such actions include things like cursor controls (home, up arrow,

2
libs/libc/stdio/Kconfig
View File

@ -90,7 +90,7 @@ choice
This selection determines the line terminating character that is used. This selection determines the line terminating character that is used.
Some environments may return CR as end-of-line, others LF, and others Some environments may return CR as end-of-line, others LF, and others
both. If not specified, the default is either CR or LF (but not both) both. If not specified, the default is either CR or LF (but not both)
as the line terminating charactor. as the line terminating character.
config EOL_IS_CR config EOL_IS_CR
bool "EOL is CR" bool "EOL is CR"

4
libs/libc/time/Kconfig
View File

@ -28,8 +28,8 @@ config LIBC_TZ_MAX_TIMES
int "Maximum number of times in timezone" int "Maximum number of times in timezone"
default 370 default 370
---help--- ---help---
Timezone files with more than this number of times will not be usedi Timezone files with more than this number of times will not be used
(tmecnt). (timecnt).
Warning: Some files in IANA TZ database include many times. The current Warning: Some files in IANA TZ database include many times. The current
posixrules file, for example, has timecnt = 236. The value of posixrules file, for example, has timecnt = 236. The value of

2
libs/libc/userfs/lib_userfs.c
View File

@ -899,7 +899,7 @@ static inline int userfs_destroy_dispatch(FAR struct userfs_info_s *info,
* LocalHost client socket. * LocalHost client socket.
* *
* NOTE: This is a user function that is implemented as part of the * NOTE: This is a user function that is implemented as part of the
* NuttX C library and is intended to be called by appliation logic. * NuttX C library and is intended to be called by application logic.
* *
* Input Parameters: * Input Parameters:
* mountpt - Mountpoint path * mountpt - Mountpoint path

4
libs/libc/wchar/Kconfig
View File

@ -3,7 +3,7 @@
# see the file kconfig-language.txt in the NuttX tools repository. # see the file kconfig-language.txt in the NuttX tools repository.
# #
#menu "Wide character suppoort" #menu "Wide character support"
config LIBC_WCHAR config LIBC_WCHAR
bool "Enable wide-characters (Unicode) support" bool "Enable wide-characters (Unicode) support"
@ -11,4 +11,4 @@ config LIBC_WCHAR
---help--- ---help---
By default, wide-characters support is disabled. By default, wide-characters support is disabled.
#endmenu # Wide character suppoort #endmenu # Wide character support

2
mm/Kconfig
View File

@ -89,7 +89,7 @@ config GRAN
more losses of memory due to alignment and quantization waste. more losses of memory due to alignment and quantization waste.
NOTE: The current implementation also restricts the maximum NOTE: The current implementation also restricts the maximum
allocation size to 32 granaules. That restriction could be allocation size to 32 granules. That restriction could be
eliminated with some additional coding effort. eliminated with some additional coding effort.
config GRAN_INTR config GRAN_INTR

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