arch/risc-v: revise MMIO for rv64ilp32
This revises `getregXX` and `setregXX` for rv64ilp32 to overcome the limitation of compiler generated addresses and reach devices in a larger range. Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
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@ -125,14 +125,55 @@
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#ifndef __ASSEMBLY__
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#define getreg8(a) (*(volatile uint8_t *)(a))
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#define putreg8(v,a) (*(volatile uint8_t *)(a) = (v))
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#define getreg16(a) (*(volatile uint16_t *)(a))
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#define putreg16(v,a) (*(volatile uint16_t *)(a) = (v))
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#define getreg32(a) (*(volatile uint32_t *)(a))
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#define putreg32(v,a) (*(volatile uint32_t *)(a) = (v))
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#define getreg64(a) (*(volatile uint64_t *)(a))
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#define putreg64(v,a) (*(volatile uint64_t *)(a) = (v))
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/* Use ASM as rv64ilp32 compiler generated address is limited */
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static inline uint8_t getreg8(const volatile uintreg_t a)
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{
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uint8_t v;
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__asm__ __volatile__("lb %0, 0(%1)" : "=r" (v) : "r" (a));
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return v;
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}
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static inline void putreg8(uint8_t v, const volatile uintreg_t a)
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{
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__asm__ __volatile__("sb %0, 0(%1)" : : "r" (v), "r" (a));
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}
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static inline uint16_t getreg16(const volatile uintreg_t a)
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{
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uint16_t v;
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__asm__ __volatile__("lh %0, 0(%1)" : "=r" (v) : "r" (a));
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return v;
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}
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static inline void putreg16(uint16_t v, const volatile uintreg_t a)
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{
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__asm__ __volatile__("sh %0, 0(%1)" : : "r" (v), "r" (a));
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}
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static inline uint32_t getreg32(const volatile uintreg_t a)
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{
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uint32_t v;
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__asm__ __volatile__("lw %0, 0(%1)" : "=r" (v) : "r" (a));
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return v;
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}
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static inline void putreg32(uint32_t v, const volatile uintreg_t a)
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{
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__asm__ __volatile__("sw %0, 0(%1)" : : "r" (v), "r" (a));
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}
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static inline uint64_t getreg64(const volatile uintreg_t a)
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{
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uint64_t v;
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__asm__ __volatile__("ld %0, 0(%1)" : "=r" (v) : "r" (a));
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return v;
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}
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static inline void putreg64(uint64_t v, const volatile uintreg_t a)
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{
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__asm__ __volatile__("sd %0, 0(%1)" : : "r" (v), "r" (a));
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}
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#define READ_CSR(reg) \
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({ \
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@ -222,7 +263,7 @@ extern "C"
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#ifndef __ASSEMBLY__
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/* Atomic modification of registers */
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void modifyreg32(uintptr_t addr, uint32_t clearbits, uint32_t setbits);
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void modifyreg32(uintreg_t addr, uint32_t clearbits, uint32_t setbits);
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/* Memory allocation ********************************************************/
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@ -43,7 +43,7 @@
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*
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****************************************************************************/
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void modifyreg32(uintptr_t addr, uint32_t clearbits, uint32_t setbits)
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void modifyreg32(uintreg_t addr, uint32_t clearbits, uint32_t setbits)
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{
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irqstate_t flags;
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uint32_t regval;
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@ -39,5 +39,5 @@ void k210_fpioa_config(uint32_t io, uint32_t ioflags)
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{
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uint32_t *fpioa = (uint32_t *)K210_FPIOA_BASE;
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DEBUGASSERT(io < K210_IO_NUMBER);
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putreg32(ioflags, &fpioa[io]);
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putreg32(ioflags, (uintptr_t)&fpioa[io]);
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}
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@ -78,7 +78,7 @@
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int mpfs_read_dsn(uint8_t *dsn, size_t len)
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{
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uint32_t reg;
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uint8_t *p = (uint8_t *)MSS_SCBMAILBOX;
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uintptr_t p = MSS_SCBMAILBOX;
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irqstate_t flags = enter_critical_section();
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unsigned retries = RETRIES;
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@ -412,7 +412,7 @@ static void mpfs_interrupt_work(void *arg);
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static inline void mac_putreg(struct mpfs_ethmac_s *priv,
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uint32_t offset, uint32_t val)
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{
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uint32_t *addr = (uint32_t *)(priv->regbase + offset);
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uintptr_t addr = (uintptr_t)(priv->regbase + offset);
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#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_MPFS_ETHMAC_REGDEBUG)
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ninfo("0x%08x <- 0x%08x\n", addr, val);
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#endif
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@ -437,7 +437,7 @@ static inline void mac_putreg(struct mpfs_ethmac_s *priv,
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static inline uint32_t mac_getreg(struct mpfs_ethmac_s *priv,
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uint32_t offset)
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{
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uint32_t *addr = (uint32_t *)(priv->regbase + offset);
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uintptr_t addr = (uintptr_t)(priv->regbase + offset);
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uint32_t value = getreg32(addr);
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#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_MPFS_ETHMAC_REGDEBUG)
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ninfo("0x%08x -> 0x%08x\n", addr, value);
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