Merge remote-tracking branch 'origin/master' into armv7r
This commit is contained in:
commit
290e5058ea
@ -416,7 +416,7 @@ config ARCH_DPFPU
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Enable toolchain support for double precision (64-bit) floating
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point if both the toolchain and the hardware support it.
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config ARMV7M_MPU
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config ARM_MPU
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bool "MPU support"
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default n
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depends on ARCH_HAVE_MPU
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@ -426,11 +426,11 @@ config ARMV7M_MPU
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Check your chip specifications first; not all Cortex-M3/4 chips
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support the MPU.
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config ARMV7M_MPU_NREGIONS
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config ARM_MPU_NREGIONS
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int "Number of MPU regions"
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default 16 if ARCH_CORTEXM7
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default 8 if !ARCH_CORTEXM7
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depends on ARMV7M_MPU
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depends on ARM_MPU
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---help---
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This is the number of protection regions supported by the MPU.
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@ -50,8 +50,8 @@
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****************************************************************************/
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/* Configuration ************************************************************/
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#ifndef CONFIG_ARMV7M_MPU_NREGIONS
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# define CONFIG_ARMV7M_MPU_NREGIONS 8
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#ifndef CONFIG_ARM_MPU_NREGIONS
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# define CONFIG_ARM_MPU_NREGIONS 8
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#endif
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/****************************************************************************
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@ -210,7 +210,7 @@ static inline uint32_t mpu_subregion_ls(size_t offset, uint8_t l2size)
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unsigned int mpu_allocregion(void)
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{
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DEBUGASSERT(g_region < CONFIG_ARMV7M_MPU_NREGIONS);
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DEBUGASSERT(g_region < CONFIG_ARM_MPU_NREGIONS);
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return (unsigned int)g_region++;
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}
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@ -439,7 +439,7 @@ void up_irqinitialize(void)
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* Fault handler.
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*/
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#ifdef CONFIG_ARMV7M_MPU
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#ifdef CONFIG_ARM_MPU
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irq_attach(EFM32_IRQ_MEMFAULT, up_memfault);
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up_enable_irq(EFM32_IRQ_MEMFAULT);
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#endif
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@ -448,7 +448,7 @@ void up_irqinitialize(void)
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#ifdef CONFIG_DEBUG
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irq_attach(EFM32_IRQ_NMI, efm32_nmi);
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#ifndef CONFIG_ARMV7M_MPU
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#ifndef CONFIG_ARM_MPU
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irq_attach(EFM32_IRQ_MEMFAULT, up_memfault);
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#endif
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irq_attach(EFM32_IRQ_BUSFAULT, efm32_busfault);
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@ -411,7 +411,7 @@ void up_irqinitialize(void)
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* Fault handler.
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*/
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#ifdef CONFIG_ARMV7M_MPU
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#ifdef CONFIG_ARM_MPU
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irq_attach(KINETIS_IRQ_MEMFAULT, up_memfault);
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up_enable_irq(KINETIS_IRQ_MEMFAULT);
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#endif
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@ -420,7 +420,7 @@ void up_irqinitialize(void)
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#ifdef CONFIG_DEBUG
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irq_attach(KINETIS_IRQ_NMI, kinetis_nmi);
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#ifndef CONFIG_ARMV7M_MPU
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#ifndef CONFIG_ARM_MPU
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irq_attach(KINETIS_IRQ_MEMFAULT, up_memfault);
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#endif
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irq_attach(KINETIS_IRQ_BUSFAULT, kinetis_busfault);
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@ -46,7 +46,7 @@
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#include "mpu.h"
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#include "kinetis_mpuinit.h"
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARMV7M_MPU)
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARM_MPU)
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/****************************************************************************
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* Pre-processor Definitions
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@ -120,5 +120,5 @@ void kinetis_mpu_uheap(uintptr_t start, size_t size)
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mpu_user_intsram(start, size);
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}
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#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARMV7M_MPU */
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#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARM_MPU */
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@ -383,7 +383,7 @@ void up_irqinitialize(void)
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* Fault handler.
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*/
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#ifdef CONFIG_ARMV7M_MPU
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#ifdef CONFIG_ARM_MPU
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irq_attach(LPC17_IRQ_MEMFAULT, up_memfault);
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up_enable_irq(LPC17_IRQ_MEMFAULT);
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#endif
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@ -392,7 +392,7 @@ void up_irqinitialize(void)
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#ifdef CONFIG_DEBUG
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irq_attach(LPC17_IRQ_NMI, lpc17_nmi);
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#ifndef CONFIG_ARMV7M_MPU
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#ifndef CONFIG_ARM_MPU
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irq_attach(LPC17_IRQ_MEMFAULT, up_memfault);
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#endif
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irq_attach(LPC17_IRQ_BUSFAULT, lpc17_busfault);
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@ -46,7 +46,7 @@
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#include "mpu.h"
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#include "lpc17_mpuinit.h"
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARMV7M_MPU)
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARM_MPU)
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/****************************************************************************
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* Pre-processor Definitions
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@ -120,5 +120,5 @@ void lpc17_mpu_uheap(uintptr_t start, size_t size)
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mpu_user_intsram(start, size);
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}
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#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARMV7M_MPU */
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#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARM_MPU */
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@ -386,7 +386,7 @@ void up_irqinitialize(void)
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* Fault handler.
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*/
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#ifdef CONFIG_ARMV7M_MPU
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#ifdef CONFIG_ARM_MPU
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irq_attach(LPC43_IRQ_MEMFAULT, up_memfault);
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up_enable_irq(LPC43_IRQ_MEMFAULT);
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#endif
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@ -395,7 +395,7 @@ void up_irqinitialize(void)
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#ifdef CONFIG_DEBUG
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irq_attach(LPC43_IRQ_NMI, lpc43_nmi);
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#ifndef CONFIG_ARMV7M_MPU
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#ifndef CONFIG_ARM_MPU
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irq_attach(LPC43_IRQ_MEMFAULT, up_memfault);
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#endif
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irq_attach(LPC43_IRQ_BUSFAULT, lpc43_busfault);
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@ -46,7 +46,7 @@
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#include "mpu.h"
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#include "lpc43_mpuinit.h"
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARMV7M_MPU)
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARM_MPU)
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/****************************************************************************
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* Pre-processor Definitions
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@ -120,5 +120,5 @@ void lpc43_mpu_uheap(uintptr_t start, size_t size)
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mpu_user_intsram(start, size);
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}
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#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARMV7M_MPU */
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#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARM_MPU */
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@ -447,7 +447,7 @@ void up_irqinitialize(void)
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* Fault handler.
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*/
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#ifdef CONFIG_ARMV7M_MPU
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#ifdef CONFIG_ARM_MPU
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irq_attach(SAM_IRQ_MEMFAULT, up_memfault);
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up_enable_irq(SAM_IRQ_MEMFAULT);
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#endif
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@ -456,7 +456,7 @@ void up_irqinitialize(void)
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#ifdef CONFIG_DEBUG
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irq_attach(SAM_IRQ_NMI, sam_nmi);
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#ifndef CONFIG_ARMV7M_MPU
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#ifndef CONFIG_ARM_MPU
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irq_attach(SAM_IRQ_MEMFAULT, up_memfault);
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#endif
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irq_attach(SAM_IRQ_BUSFAULT, sam_busfault);
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@ -46,7 +46,7 @@
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#include "mpu.h"
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#include "sam_mpuinit.h"
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARMV7M_MPU)
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARM_MPU)
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/****************************************************************************
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* Pre-processor Definitions
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@ -120,5 +120,5 @@ void sam_mpu_uheap(uintptr_t start, size_t size)
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mpu_user_intsram(start, size);
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}
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#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARMV7M_MPU */
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#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARM_MPU */
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@ -384,7 +384,7 @@ config SAMV7_QSPI
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bool "Quad SPI (QSPI)"
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default n
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select ARCH_USE_MPU
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select ARMV7M_MPU
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select ARM_MPU
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config SAMV7_RTC
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bool "Real Time Clock (RTC)"
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@ -90,7 +90,7 @@ ifeq ($(CONFIG_ARCH_MEMCPY),y)
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CMN_ASRCS += up_memcpy.S
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endif
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ifeq ($(CONFIG_ARMV7M_MPU),y)
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ifeq ($(CONFIG_ARM_MPU),y)
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CMN_CSRCS += up_mpu.c
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CMN_CSRCS += up_task_start.c up_pthread_start.c
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@ -123,7 +123,7 @@ ifneq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += sam_timerisr.c
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endif
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ifeq ($(CONFIG_ARMV7M_MPU),y)
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ifeq ($(CONFIG_ARM_MPU),y)
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CHIP_CSRCS += sam_mpuinit.c
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CHIP_CSRCS += sam_userspace.c
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@ -447,7 +447,7 @@ void up_irqinitialize(void)
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* Fault handler.
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*/
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#ifdef CONFIG_ARMV7M_MPU
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#ifdef CONFIG_ARM_MPU
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irq_attach(SAM_IRQ_MEMFAULT, up_memfault);
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up_enable_irq(SAM_IRQ_MEMFAULT);
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#endif
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@ -456,7 +456,7 @@ void up_irqinitialize(void)
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#ifdef CONFIG_DEBUG
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irq_attach(SAM_IRQ_NMI, sam_nmi);
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#ifndef CONFIG_ARMV7M_MPU
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#ifndef CONFIG_ARM_MPU
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irq_attach(SAM_IRQ_MEMFAULT, up_memfault);
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#endif
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irq_attach(SAM_IRQ_BUSFAULT, sam_busfault);
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@ -49,7 +49,7 @@
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#include "sam_mpuinit.h"
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#ifdef CONFIG_ARMV7M_MPU
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#ifdef CONFIG_ARM_MPU
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/****************************************************************************
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* Pre-processor Definitions
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@ -146,5 +146,5 @@ void sam_mpu_uheap(uintptr_t start, size_t size)
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}
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#endif
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#endif /* CONFIG_ARMV7M_MPU */
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#endif /* CONFIG_ARM_MPU */
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@ -77,7 +77,7 @@ extern "C"
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*
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****************************************************************************/
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#ifdef CONFIG_ARMV7M_MPU
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#ifdef CONFIG_ARM_MPU
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void sam_mpu_initialize(void);
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#else
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# define sam_mpu_initialize()
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@ -367,7 +367,7 @@ void __start(void)
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sam_boardinitialize();
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#ifdef CONFIG_ARMV7M_MPU
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#ifdef CONFIG_ARM_MPU
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/* For the case of the separate user-/kernel-space build, perform whatever
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* platform specific initialization of the user memory is required.
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* Normally this just means initializing the user space .data and .bss
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@ -394,7 +394,7 @@ void up_irqinitialize(void)
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* Fault handler.
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*/
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#ifdef CONFIG_ARMV7M_MPU
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#ifdef CONFIG_ARM_MPU
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irq_attach(STM32_IRQ_MEMFAULT, up_memfault);
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up_enable_irq(STM32_IRQ_MEMFAULT);
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#endif
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@ -403,7 +403,7 @@ void up_irqinitialize(void)
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#ifdef CONFIG_DEBUG
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irq_attach(STM32_IRQ_NMI, stm32_nmi);
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#ifndef CONFIG_ARMV7M_MPU
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#ifndef CONFIG_ARM_MPU
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irq_attach(STM32_IRQ_MEMFAULT, up_memfault);
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#endif
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irq_attach(STM32_IRQ_BUSFAULT, stm32_busfault);
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@ -46,7 +46,7 @@
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#include "mpu.h"
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#include "stm32_mpuinit.h"
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARMV7M_MPU)
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARM_MPU)
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/****************************************************************************
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* Pre-processor Definitions
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@ -120,5 +120,5 @@ void stm32_mpu_uheap(uintptr_t start, size_t size)
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mpu_user_intsram(start, size);
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}
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#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARMV7M_MPU */
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#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARM_MPU */
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@ -481,7 +481,7 @@ void up_irqinitialize(void)
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* Fault handler.
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*/
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#ifdef CONFIG_ARMV7M_MPU
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#ifdef CONFIG_ARM_MPU
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irq_attach(STM32_IRQ_MEMFAULT, up_memfault);
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up_enable_irq(STM32_IRQ_MEMFAULT);
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#endif
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@ -490,7 +490,7 @@ void up_irqinitialize(void)
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#ifdef CONFIG_DEBUG
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irq_attach(STM32_IRQ_NMI, stm32_nmi);
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#ifndef CONFIG_ARMV7M_MPU
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#ifndef CONFIG_ARM_MPU
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irq_attach(STM32_IRQ_MEMFAULT, up_memfault);
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#endif
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irq_attach(STM32_IRQ_BUSFAULT, stm32_busfault);
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@ -46,7 +46,7 @@
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#include "mpu.h"
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#include "stm32_mpuinit.h"
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARMV7M_MPU)
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARM_MPU)
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/****************************************************************************
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* Pre-processor Definitions
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@ -112,5 +112,5 @@ void stm32_mpu_uheap(uintptr_t start, size_t size)
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mpu_user_intsram(start, size);
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}
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#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARMV7M_MPU */
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#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARM_MPU */
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@ -465,7 +465,7 @@ void up_irqinitialize(void)
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* Fault handler.
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*/
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#ifdef CONFIG_ARMV7M_MPU
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#ifdef CONFIG_ARM_MPU
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irq_attach(TIVA_IRQ_MEMFAULT, up_memfault);
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up_enable_irq(TIVA_IRQ_MEMFAULT);
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#endif
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@ -474,7 +474,7 @@ void up_irqinitialize(void)
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#ifdef CONFIG_DEBUG
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irq_attach(TIVA_IRQ_NMI, tiva_nmi);
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#ifndef CONFIG_ARMV7M_MPU
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#ifndef CONFIG_ARM_MPU
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irq_attach(TIVA_IRQ_MEMFAULT, up_memfault);
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#endif
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irq_attach(TIVA_IRQ_BUSFAULT, tiva_busfault);
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@ -46,7 +46,7 @@
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#include "mpu.h"
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#include "tiva_mpuinit.h"
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARMV7M_MPU)
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARM_MPU)
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/****************************************************************************
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* Pre-processor Definitions
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@ -120,5 +120,5 @@ void tiva_mpu_uheap(uintptr_t start, size_t size)
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mpu_user_intsram(start, size);
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}
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#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARMV7M_MPU */
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#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARM_MPU */
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