diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index abb3771baa..0d30d2d96b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -416,7 +416,7 @@ config ARCH_DPFPU
 		Enable toolchain support for double precision (64-bit) floating
 		point if both the toolchain and the hardware support it.
 
-config ARMV7M_MPU
+config ARM_MPU
 	bool "MPU support"
 	default n
 	depends on ARCH_HAVE_MPU
@@ -426,11 +426,11 @@ config ARMV7M_MPU
 		Check your chip specifications first; not all Cortex-M3/4 chips
 		support the MPU.
 
-config ARMV7M_MPU_NREGIONS
+config ARM_MPU_NREGIONS
 	int "Number of MPU regions"
 	default 16 if ARCH_CORTEXM7
 	default 8 if !ARCH_CORTEXM7
-	depends on ARMV7M_MPU
+	depends on ARM_MPU
 	---help---
 		This is the number of protection regions supported by the MPU.
 
diff --git a/arch/arm/src/armv7-m/up_mpu.c b/arch/arm/src/armv7-m/up_mpu.c
index 91113dc21b..05aadda4b6 100644
--- a/arch/arm/src/armv7-m/up_mpu.c
+++ b/arch/arm/src/armv7-m/up_mpu.c
@@ -50,8 +50,8 @@
  ****************************************************************************/
 /* Configuration ************************************************************/
 
-#ifndef CONFIG_ARMV7M_MPU_NREGIONS
-#  define CONFIG_ARMV7M_MPU_NREGIONS 8
+#ifndef CONFIG_ARM_MPU_NREGIONS
+#  define CONFIG_ARM_MPU_NREGIONS 8
 #endif
 
 /****************************************************************************
@@ -210,7 +210,7 @@ static inline uint32_t mpu_subregion_ls(size_t offset, uint8_t l2size)
 
 unsigned int mpu_allocregion(void)
 {
-  DEBUGASSERT(g_region < CONFIG_ARMV7M_MPU_NREGIONS);
+  DEBUGASSERT(g_region < CONFIG_ARM_MPU_NREGIONS);
   return (unsigned int)g_region++;
 }
 
diff --git a/arch/arm/src/efm32/efm32_irq.c b/arch/arm/src/efm32/efm32_irq.c
index e8830e4121..29999b0eb1 100644
--- a/arch/arm/src/efm32/efm32_irq.c
+++ b/arch/arm/src/efm32/efm32_irq.c
@@ -439,7 +439,7 @@ void up_irqinitialize(void)
    * Fault handler.
    */
 
-#ifdef CONFIG_ARMV7M_MPU
+#ifdef CONFIG_ARM_MPU
   irq_attach(EFM32_IRQ_MEMFAULT, up_memfault);
   up_enable_irq(EFM32_IRQ_MEMFAULT);
 #endif
@@ -448,7 +448,7 @@ void up_irqinitialize(void)
 
 #ifdef CONFIG_DEBUG
   irq_attach(EFM32_IRQ_NMI, efm32_nmi);
-#ifndef CONFIG_ARMV7M_MPU
+#ifndef CONFIG_ARM_MPU
   irq_attach(EFM32_IRQ_MEMFAULT, up_memfault);
 #endif
   irq_attach(EFM32_IRQ_BUSFAULT, efm32_busfault);
diff --git a/arch/arm/src/kinetis/kinetis_irq.c b/arch/arm/src/kinetis/kinetis_irq.c
index 0457957752..8a215f75bd 100644
--- a/arch/arm/src/kinetis/kinetis_irq.c
+++ b/arch/arm/src/kinetis/kinetis_irq.c
@@ -411,7 +411,7 @@ void up_irqinitialize(void)
    * Fault handler.
    */
 
-#ifdef CONFIG_ARMV7M_MPU
+#ifdef CONFIG_ARM_MPU
   irq_attach(KINETIS_IRQ_MEMFAULT, up_memfault);
   up_enable_irq(KINETIS_IRQ_MEMFAULT);
 #endif
@@ -420,7 +420,7 @@ void up_irqinitialize(void)
 
 #ifdef CONFIG_DEBUG
   irq_attach(KINETIS_IRQ_NMI, kinetis_nmi);
-#ifndef CONFIG_ARMV7M_MPU
+#ifndef CONFIG_ARM_MPU
   irq_attach(KINETIS_IRQ_MEMFAULT, up_memfault);
 #endif
   irq_attach(KINETIS_IRQ_BUSFAULT, kinetis_busfault);
diff --git a/arch/arm/src/kinetis/kinetis_mpuinit.c b/arch/arm/src/kinetis/kinetis_mpuinit.c
index 8e2bceb622..6c41f85bf4 100644
--- a/arch/arm/src/kinetis/kinetis_mpuinit.c
+++ b/arch/arm/src/kinetis/kinetis_mpuinit.c
@@ -46,7 +46,7 @@
 #include "mpu.h"
 #include "kinetis_mpuinit.h"
 
-#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARMV7M_MPU)
+#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARM_MPU)
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -120,5 +120,5 @@ void kinetis_mpu_uheap(uintptr_t start, size_t size)
   mpu_user_intsram(start, size);
 }
 
-#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARMV7M_MPU */
+#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARM_MPU */
 
diff --git a/arch/arm/src/lpc17xx/lpc17_irq.c b/arch/arm/src/lpc17xx/lpc17_irq.c
index 0f7149ec0a..1804f4193d 100644
--- a/arch/arm/src/lpc17xx/lpc17_irq.c
+++ b/arch/arm/src/lpc17xx/lpc17_irq.c
@@ -383,7 +383,7 @@ void up_irqinitialize(void)
    * Fault handler.
    */
 
-#ifdef CONFIG_ARMV7M_MPU
+#ifdef CONFIG_ARM_MPU
   irq_attach(LPC17_IRQ_MEMFAULT, up_memfault);
   up_enable_irq(LPC17_IRQ_MEMFAULT);
 #endif
@@ -392,7 +392,7 @@ void up_irqinitialize(void)
 
 #ifdef CONFIG_DEBUG
   irq_attach(LPC17_IRQ_NMI, lpc17_nmi);
-#ifndef CONFIG_ARMV7M_MPU
+#ifndef CONFIG_ARM_MPU
   irq_attach(LPC17_IRQ_MEMFAULT, up_memfault);
 #endif
   irq_attach(LPC17_IRQ_BUSFAULT, lpc17_busfault);
diff --git a/arch/arm/src/lpc17xx/lpc17_mpuinit.c b/arch/arm/src/lpc17xx/lpc17_mpuinit.c
index adc4bc918c..9cf561fcf2 100644
--- a/arch/arm/src/lpc17xx/lpc17_mpuinit.c
+++ b/arch/arm/src/lpc17xx/lpc17_mpuinit.c
@@ -46,7 +46,7 @@
 #include "mpu.h"
 #include "lpc17_mpuinit.h"
 
-#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARMV7M_MPU)
+#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARM_MPU)
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -120,5 +120,5 @@ void lpc17_mpu_uheap(uintptr_t start, size_t size)
   mpu_user_intsram(start, size);
 }
 
-#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARMV7M_MPU */
+#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARM_MPU */
 
diff --git a/arch/arm/src/lpc43xx/lpc43_irq.c b/arch/arm/src/lpc43xx/lpc43_irq.c
index 2752c50dbf..692bc2beaa 100644
--- a/arch/arm/src/lpc43xx/lpc43_irq.c
+++ b/arch/arm/src/lpc43xx/lpc43_irq.c
@@ -386,7 +386,7 @@ void up_irqinitialize(void)
    * Fault handler.
    */
 
-#ifdef CONFIG_ARMV7M_MPU
+#ifdef CONFIG_ARM_MPU
   irq_attach(LPC43_IRQ_MEMFAULT, up_memfault);
   up_enable_irq(LPC43_IRQ_MEMFAULT);
 #endif
@@ -395,7 +395,7 @@ void up_irqinitialize(void)
 
 #ifdef CONFIG_DEBUG
   irq_attach(LPC43_IRQ_NMI, lpc43_nmi);
-#ifndef CONFIG_ARMV7M_MPU
+#ifndef CONFIG_ARM_MPU
   irq_attach(LPC43_IRQ_MEMFAULT, up_memfault);
 #endif
   irq_attach(LPC43_IRQ_BUSFAULT, lpc43_busfault);
diff --git a/arch/arm/src/lpc43xx/lpc43_mpuinit.c b/arch/arm/src/lpc43xx/lpc43_mpuinit.c
index 499c38a977..3ed8d8a8c7 100644
--- a/arch/arm/src/lpc43xx/lpc43_mpuinit.c
+++ b/arch/arm/src/lpc43xx/lpc43_mpuinit.c
@@ -46,7 +46,7 @@
 #include "mpu.h"
 #include "lpc43_mpuinit.h"
 
-#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARMV7M_MPU)
+#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARM_MPU)
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -120,5 +120,5 @@ void lpc43_mpu_uheap(uintptr_t start, size_t size)
   mpu_user_intsram(start, size);
 }
 
-#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARMV7M_MPU */
+#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARM_MPU */
 
diff --git a/arch/arm/src/sam34/sam_irq.c b/arch/arm/src/sam34/sam_irq.c
index 55ce2d1bf9..314aff78e9 100644
--- a/arch/arm/src/sam34/sam_irq.c
+++ b/arch/arm/src/sam34/sam_irq.c
@@ -447,7 +447,7 @@ void up_irqinitialize(void)
    * Fault handler.
    */
 
-#ifdef CONFIG_ARMV7M_MPU
+#ifdef CONFIG_ARM_MPU
   irq_attach(SAM_IRQ_MEMFAULT, up_memfault);
   up_enable_irq(SAM_IRQ_MEMFAULT);
 #endif
@@ -456,7 +456,7 @@ void up_irqinitialize(void)
 
 #ifdef CONFIG_DEBUG
   irq_attach(SAM_IRQ_NMI, sam_nmi);
-#ifndef CONFIG_ARMV7M_MPU
+#ifndef CONFIG_ARM_MPU
   irq_attach(SAM_IRQ_MEMFAULT, up_memfault);
 #endif
   irq_attach(SAM_IRQ_BUSFAULT, sam_busfault);
diff --git a/arch/arm/src/sam34/sam_mpuinit.c b/arch/arm/src/sam34/sam_mpuinit.c
index a33788b7d1..f49bb68d10 100644
--- a/arch/arm/src/sam34/sam_mpuinit.c
+++ b/arch/arm/src/sam34/sam_mpuinit.c
@@ -46,7 +46,7 @@
 #include "mpu.h"
 #include "sam_mpuinit.h"
 
-#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARMV7M_MPU)
+#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARM_MPU)
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -120,5 +120,5 @@ void sam_mpu_uheap(uintptr_t start, size_t size)
   mpu_user_intsram(start, size);
 }
 
-#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARMV7M_MPU */
+#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARM_MPU */
 
diff --git a/arch/arm/src/samv7/Kconfig b/arch/arm/src/samv7/Kconfig
index 94cdc0a792..42479b5a8f 100644
--- a/arch/arm/src/samv7/Kconfig
+++ b/arch/arm/src/samv7/Kconfig
@@ -384,7 +384,7 @@ config SAMV7_QSPI
 	bool "Quad SPI (QSPI)"
 	default n
 	select ARCH_USE_MPU
-	select ARMV7M_MPU
+	select ARM_MPU
 
 config SAMV7_RTC
 	bool "Real Time Clock (RTC)"
diff --git a/arch/arm/src/samv7/Make.defs b/arch/arm/src/samv7/Make.defs
index c614bb95f6..0a9af083f3 100644
--- a/arch/arm/src/samv7/Make.defs
+++ b/arch/arm/src/samv7/Make.defs
@@ -90,7 +90,7 @@ ifeq ($(CONFIG_ARCH_MEMCPY),y)
 CMN_ASRCS += up_memcpy.S
 endif
 
-ifeq ($(CONFIG_ARMV7M_MPU),y)
+ifeq ($(CONFIG_ARM_MPU),y)
 CMN_CSRCS += up_mpu.c
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
 CMN_CSRCS += up_task_start.c up_pthread_start.c
@@ -123,7 +123,7 @@ ifneq ($(CONFIG_SCHED_TICKLESS),y)
 CHIP_CSRCS += sam_timerisr.c
 endif
 
-ifeq ($(CONFIG_ARMV7M_MPU),y)
+ifeq ($(CONFIG_ARM_MPU),y)
 CHIP_CSRCS += sam_mpuinit.c
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
 CHIP_CSRCS += sam_userspace.c
diff --git a/arch/arm/src/samv7/sam_irq.c b/arch/arm/src/samv7/sam_irq.c
index 5a0e6ff9c2..7db06249c5 100644
--- a/arch/arm/src/samv7/sam_irq.c
+++ b/arch/arm/src/samv7/sam_irq.c
@@ -447,7 +447,7 @@ void up_irqinitialize(void)
    * Fault handler.
    */
 
-#ifdef CONFIG_ARMV7M_MPU
+#ifdef CONFIG_ARM_MPU
   irq_attach(SAM_IRQ_MEMFAULT, up_memfault);
   up_enable_irq(SAM_IRQ_MEMFAULT);
 #endif
@@ -456,7 +456,7 @@ void up_irqinitialize(void)
 
 #ifdef CONFIG_DEBUG
   irq_attach(SAM_IRQ_NMI, sam_nmi);
-#ifndef CONFIG_ARMV7M_MPU
+#ifndef CONFIG_ARM_MPU
   irq_attach(SAM_IRQ_MEMFAULT, up_memfault);
 #endif
   irq_attach(SAM_IRQ_BUSFAULT, sam_busfault);
diff --git a/arch/arm/src/samv7/sam_mpuinit.c b/arch/arm/src/samv7/sam_mpuinit.c
index b2f730f40e..e9b0b37754 100644
--- a/arch/arm/src/samv7/sam_mpuinit.c
+++ b/arch/arm/src/samv7/sam_mpuinit.c
@@ -49,7 +49,7 @@
 
 #include "sam_mpuinit.h"
 
-#ifdef CONFIG_ARMV7M_MPU
+#ifdef CONFIG_ARM_MPU
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -146,5 +146,5 @@ void sam_mpu_uheap(uintptr_t start, size_t size)
 }
 #endif
 
-#endif /* CONFIG_ARMV7M_MPU */
+#endif /* CONFIG_ARM_MPU */
 
diff --git a/arch/arm/src/samv7/sam_mpuinit.h b/arch/arm/src/samv7/sam_mpuinit.h
index e8745f8e6b..ef5a9d037a 100644
--- a/arch/arm/src/samv7/sam_mpuinit.h
+++ b/arch/arm/src/samv7/sam_mpuinit.h
@@ -77,7 +77,7 @@ extern "C"
  *
  ****************************************************************************/
 
-#ifdef CONFIG_ARMV7M_MPU
+#ifdef CONFIG_ARM_MPU
 void sam_mpu_initialize(void);
 #else
 #  define sam_mpu_initialize()
diff --git a/arch/arm/src/samv7/sam_start.c b/arch/arm/src/samv7/sam_start.c
index 285e429b6b..9d5331721f 100644
--- a/arch/arm/src/samv7/sam_start.c
+++ b/arch/arm/src/samv7/sam_start.c
@@ -367,7 +367,7 @@ void __start(void)
 
   sam_boardinitialize();
 
-#ifdef CONFIG_ARMV7M_MPU
+#ifdef CONFIG_ARM_MPU
   /* For the case of the separate user-/kernel-space build, perform whatever
    * platform specific initialization of the user memory is required.
    * Normally this just means initializing the user space .data and .bss
diff --git a/arch/arm/src/stm32/stm32_irq.c b/arch/arm/src/stm32/stm32_irq.c
index 2d8f7b9f7d..cf9fe37c36 100644
--- a/arch/arm/src/stm32/stm32_irq.c
+++ b/arch/arm/src/stm32/stm32_irq.c
@@ -394,7 +394,7 @@ void up_irqinitialize(void)
    * Fault handler.
    */
 
-#ifdef CONFIG_ARMV7M_MPU
+#ifdef CONFIG_ARM_MPU
   irq_attach(STM32_IRQ_MEMFAULT, up_memfault);
   up_enable_irq(STM32_IRQ_MEMFAULT);
 #endif
@@ -403,7 +403,7 @@ void up_irqinitialize(void)
 
 #ifdef CONFIG_DEBUG
   irq_attach(STM32_IRQ_NMI, stm32_nmi);
-#ifndef CONFIG_ARMV7M_MPU
+#ifndef CONFIG_ARM_MPU
   irq_attach(STM32_IRQ_MEMFAULT, up_memfault);
 #endif
   irq_attach(STM32_IRQ_BUSFAULT, stm32_busfault);
diff --git a/arch/arm/src/stm32/stm32_mpuinit.c b/arch/arm/src/stm32/stm32_mpuinit.c
index e5f727ae38..552e75d1fd 100644
--- a/arch/arm/src/stm32/stm32_mpuinit.c
+++ b/arch/arm/src/stm32/stm32_mpuinit.c
@@ -46,7 +46,7 @@
 #include "mpu.h"
 #include "stm32_mpuinit.h"
 
-#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARMV7M_MPU)
+#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARM_MPU)
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -120,5 +120,5 @@ void stm32_mpu_uheap(uintptr_t start, size_t size)
   mpu_user_intsram(start, size);
 }
 
-#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARMV7M_MPU */
+#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARM_MPU */
 
diff --git a/arch/arm/src/stm32f7/stm32_irq.c b/arch/arm/src/stm32f7/stm32_irq.c
index 12446fc69b..481417a68f 100644
--- a/arch/arm/src/stm32f7/stm32_irq.c
+++ b/arch/arm/src/stm32f7/stm32_irq.c
@@ -481,7 +481,7 @@ void up_irqinitialize(void)
    * Fault handler.
    */
 
-#ifdef CONFIG_ARMV7M_MPU
+#ifdef CONFIG_ARM_MPU
   irq_attach(STM32_IRQ_MEMFAULT, up_memfault);
   up_enable_irq(STM32_IRQ_MEMFAULT);
 #endif
@@ -490,7 +490,7 @@ void up_irqinitialize(void)
 
 #ifdef CONFIG_DEBUG
   irq_attach(STM32_IRQ_NMI, stm32_nmi);
-#ifndef CONFIG_ARMV7M_MPU
+#ifndef CONFIG_ARM_MPU
   irq_attach(STM32_IRQ_MEMFAULT, up_memfault);
 #endif
   irq_attach(STM32_IRQ_BUSFAULT, stm32_busfault);
diff --git a/arch/arm/src/stm32f7/stm32_mpuinit.c b/arch/arm/src/stm32f7/stm32_mpuinit.c
index 60f0c69dc1..096742a0ec 100644
--- a/arch/arm/src/stm32f7/stm32_mpuinit.c
+++ b/arch/arm/src/stm32f7/stm32_mpuinit.c
@@ -46,7 +46,7 @@
 #include "mpu.h"
 #include "stm32_mpuinit.h"
 
-#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARMV7M_MPU)
+#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARM_MPU)
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -112,5 +112,5 @@ void stm32_mpu_uheap(uintptr_t start, size_t size)
   mpu_user_intsram(start, size);
 }
 
-#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARMV7M_MPU */
+#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARM_MPU */
 
diff --git a/arch/arm/src/tiva/tiva_irq.c b/arch/arm/src/tiva/tiva_irq.c
index 5ea559e4cd..4cc712dc6a 100644
--- a/arch/arm/src/tiva/tiva_irq.c
+++ b/arch/arm/src/tiva/tiva_irq.c
@@ -465,7 +465,7 @@ void up_irqinitialize(void)
    * Fault handler.
    */
 
-#ifdef CONFIG_ARMV7M_MPU
+#ifdef CONFIG_ARM_MPU
   irq_attach(TIVA_IRQ_MEMFAULT, up_memfault);
   up_enable_irq(TIVA_IRQ_MEMFAULT);
 #endif
@@ -474,7 +474,7 @@ void up_irqinitialize(void)
 
 #ifdef CONFIG_DEBUG
   irq_attach(TIVA_IRQ_NMI, tiva_nmi);
-#ifndef CONFIG_ARMV7M_MPU
+#ifndef CONFIG_ARM_MPU
   irq_attach(TIVA_IRQ_MEMFAULT, up_memfault);
 #endif
   irq_attach(TIVA_IRQ_BUSFAULT, tiva_busfault);
diff --git a/arch/arm/src/tiva/tiva_mpuinit.c b/arch/arm/src/tiva/tiva_mpuinit.c
index a1fe80d86e..a9a6aed9a2 100644
--- a/arch/arm/src/tiva/tiva_mpuinit.c
+++ b/arch/arm/src/tiva/tiva_mpuinit.c
@@ -46,7 +46,7 @@
 #include "mpu.h"
 #include "tiva_mpuinit.h"
 
-#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARMV7M_MPU)
+#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_ARM_MPU)
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -120,5 +120,5 @@ void tiva_mpu_uheap(uintptr_t start, size_t size)
   mpu_user_intsram(start, size);
 }
 
-#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARMV7M_MPU */
+#endif /* CONFIG_BUILD_PROTECTED && CONFIG_ARM_MPU */