Eliminate warnings
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e354853776
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@ -207,7 +207,7 @@
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*/
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#if defined(CONFIG_SAM34_RC80M) || defined(BOARD_SYSCLK_SOURCE_RC80M) || \
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defined(BOARD_DFLL0_SOURCE_RC80M) || BOARD_GLCK9_SOURCE_RC80M
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defined(BOARD_DFLL0_SOURCE_RC80M) || defined(BOARD_GLCK9_SOURCE_RC80M)
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# define NEED_RC80M 1
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#endif
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@ -668,7 +668,8 @@ void sam_wdtinitialize(FAR const char *devpath)
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/* Enable watchdog with 5 sec timeout */
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mr_val |= (WDT_MR_WDD((5) * WDT_FCLK) | WDT_MR_WDV((5) * WDT_FCLK) | WDT_MR_WDRSTEN);
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mr_val = (WDT_MR_WDD((5) * WDT_FCLK) | WDT_MR_WDV((5) * WDT_FCLK) |
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WDT_MR_WDRSTEN);
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sam34_putreg(mr_val, SAM_WDT_MR);
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wdvdbg("Entry: devpath=%s\n", devpath);
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@ -1919,7 +1919,6 @@ static int sam_async_setup(struct sam_rhport_s *rhport,
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uint32_t *flink;
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uint32_t *alt;
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uint32_t toggle;
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uint32_t regval;
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bool dirin = false;
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int ret;
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@ -4351,12 +4351,6 @@ static void sam_sw_setup(struct sam_usbdev_s *priv)
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priv->eplist[epno].ep.maxpacket = SAM_UDPHS_MAXPACKETSIZE(epno);
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}
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/* Select a smaller endpoint size for EP0 */
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#if SAM_EP0MAXPACKET < SAM_MAXPACKET_SIZE
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priv->eplist[EP0].ep.maxpacket = SAM_EP0MAXPACKET;
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#endif
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}
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/****************************************************************************
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@ -104,22 +104,22 @@
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# define CONSOLE_DEV g_uart0port /* UART0 is console */
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# endif
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# define TTYS0_DEV g_uart0port /* UART0 is tty0 */
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# if CONFIG_STR71X_UART1
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# if defined(CONFIG_STR71X_UART1)
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# define TTYS1_DEV g_uart1port /* UART1 is tty1 */
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# if CONFIG_STR71X_UART2
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# if defined(CONFIG_STR71X_UART2)
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# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
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# if CONFIG_STR71X_UART3
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# if defined(CONFIG_STR71X_UART3)
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# define TTYS3_DEV g_uart3port /* UART3 is tty3 */
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# endif
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# elif CONFIG_STR71X_UART3
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# elif defined(CONFIG_STR71X_UART3)
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# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
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# endif
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# elif CONFIG_STR71X_UART2
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# elif defined(CONFIG_STR71X_UART2)
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# define TTYS1_DEV g_uart2port /* UART2 is tty1 */
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# if CONFIG_STR71X_UART3
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# if defined(CONFIG_STR71X_UART3)
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# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
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# endif
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# elif CONFIG_STR71X_UART3
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# elif defined(CONFIG_STR71X_UART3)
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# define TTYS1_DEV g_uart3port /* UART3 is tty1 */
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# endif
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
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@ -132,18 +132,18 @@
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# define TTYS1_DEV g_uart0port /* UART0 is tty1 */
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# if CONFIG_STR71X_UART2
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# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
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# if CONFIG_STR71X_UART3
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# if defined(CONFIG_STR71X_UART3)
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# define TTYS3_DEV g_uart3port /* UART3 is tty3 */
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# endif
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# elif CONFIG_STR71X_UART3
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# elif defined(CONFIG_STR71X_UART3)
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# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
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# endif
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# elif CONFIG_STR71X_UART2
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# define TTYS1_DEV g_uart2port /* UART2 is tty1 */
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# if CONFIG_STR71X_UART3
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# if defined(CONFIG_STR71X_UART3)
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# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
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# endif
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# elif CONFIG_STR71X_UART3
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# elif defined(CONFIG_STR71X_UART3)
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# define TTYS1_DEV g_uart3port /* UART3 is tty1 */
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# endif
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#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
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@ -154,20 +154,20 @@
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# define TTYS0_DEV g_uart2port /* UART2 is tty0 */
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# if CONFIG_STR71X_UART0
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# define TTYS1_DEV g_uart0port /* UART0 is tty1 */
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# if CONFIG_STR71X_UART1
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# if defined(CONFIG_STR71X_UART1)
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# define TTYS2_DEV g_uart1port /* UART1 is tty2 */
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# if CONFIG_STR71X_UART3
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# if defined(CONFIG_STR71X_UART3)
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# define TTYS3_DEV g_uart3port /* UART3 is tty3 */
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# endif
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# elif CONFIG_STR71X_UART3
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# elif defined(CONFIG_STR71X_UART3)
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# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
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# endif
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# elif CONFIG_STR71X_UART1
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# elif defined(CONFIG_STR71X_UART1)
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# define TTYS1_DEV g_uart1port /* UART1 is tty1 */
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# if CONFIG_STR71X_UART3
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# if defined(CONFIG_STR71X_UART3)
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# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
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# endif
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# elif CONFIG_STR71X_UART3
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# elif defined(CONFIG_STR71X_UART3)
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# define TTYS1_DEV g_uart3port /* UART3 is tty1 */
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# endif
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#elif defined(CONFIG_UART3_SERIAL_CONSOLE)
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@ -178,20 +178,20 @@
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# define TTYS0_DEV g_uart3port /* UART3 is tty0 */
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# if CONFIG_STR71X_UART0
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# define TTYS1_DEV g_uart0port /* UART0 is tty1 */
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# if CONFIG_STR71X_UART1
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# if defined(CONFIG_STR71X_UART1)
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# define TTYS2_DEV g_uart1port /* UART1 is tty2 */
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# if CONFIG_STR71X_UART2
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# if defined(CONFIG_STR71X_UART2)
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# define TTYS3_DEV g_uart2port /* UART2 is tty3 */
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# endif
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# elif CONFIG_STR71X_UART2
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# elif defined(CONFIG_STR71X_UART2)
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# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
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# endif
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# elif CONFIG_STR71X_UART1
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# elif defined(CONFIG_STR71X_UART1)
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# define TTYS1_DEV g_uart1port /* UART1 is tty1 */
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# if CONFIG_STR71X_UART2
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# if defined(CONFIG_STR71X_UART2)
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# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
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# endif
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# elif CONFIG_STR71X_UART2
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# elif defined(CONFIG_STR71X_UART2)
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# define TTYS1_DEV g_uart2port /* UART2 is tty1 */
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# endif
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#else
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