Eliminate warnings

This commit is contained in:
Gregory Nutt 2015-09-08 10:20:06 -06:00
parent e354853776
commit 2913aac866
5 changed files with 26 additions and 32 deletions

View File

@ -207,7 +207,7 @@
*/
#if defined(CONFIG_SAM34_RC80M) || defined(BOARD_SYSCLK_SOURCE_RC80M) || \
defined(BOARD_DFLL0_SOURCE_RC80M) || BOARD_GLCK9_SOURCE_RC80M
defined(BOARD_DFLL0_SOURCE_RC80M) || defined(BOARD_GLCK9_SOURCE_RC80M)
# define NEED_RC80M 1
#endif

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@ -668,7 +668,8 @@ void sam_wdtinitialize(FAR const char *devpath)
/* Enable watchdog with 5 sec timeout */
mr_val |= (WDT_MR_WDD((5) * WDT_FCLK) | WDT_MR_WDV((5) * WDT_FCLK) | WDT_MR_WDRSTEN);
mr_val = (WDT_MR_WDD((5) * WDT_FCLK) | WDT_MR_WDV((5) * WDT_FCLK) |
WDT_MR_WDRSTEN);
sam34_putreg(mr_val, SAM_WDT_MR);
wdvdbg("Entry: devpath=%s\n", devpath);

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@ -1919,7 +1919,6 @@ static int sam_async_setup(struct sam_rhport_s *rhport,
uint32_t *flink;
uint32_t *alt;
uint32_t toggle;
uint32_t regval;
bool dirin = false;
int ret;

View File

@ -4351,12 +4351,6 @@ static void sam_sw_setup(struct sam_usbdev_s *priv)
priv->eplist[epno].ep.maxpacket = SAM_UDPHS_MAXPACKETSIZE(epno);
}
/* Select a smaller endpoint size for EP0 */
#if SAM_EP0MAXPACKET < SAM_MAXPACKET_SIZE
priv->eplist[EP0].ep.maxpacket = SAM_EP0MAXPACKET;
#endif
}
/****************************************************************************

View File

@ -104,22 +104,22 @@
# define CONSOLE_DEV g_uart0port /* UART0 is console */
# endif
# define TTYS0_DEV g_uart0port /* UART0 is tty0 */
# if CONFIG_STR71X_UART1
# if defined(CONFIG_STR71X_UART1)
# define TTYS1_DEV g_uart1port /* UART1 is tty1 */
# if CONFIG_STR71X_UART2
# if defined(CONFIG_STR71X_UART2)
# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
# if CONFIG_STR71X_UART3
# if defined(CONFIG_STR71X_UART3)
# define TTYS3_DEV g_uart3port /* UART3 is tty3 */
# endif
# elif CONFIG_STR71X_UART3
# elif defined(CONFIG_STR71X_UART3)
# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
# endif
# elif CONFIG_STR71X_UART2
# elif defined(CONFIG_STR71X_UART2)
# define TTYS1_DEV g_uart2port /* UART2 is tty1 */
# if CONFIG_STR71X_UART3
# if defined(CONFIG_STR71X_UART3)
# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
# endif
# elif CONFIG_STR71X_UART3
# elif defined(CONFIG_STR71X_UART3)
# define TTYS1_DEV g_uart3port /* UART3 is tty1 */
# endif
#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
@ -132,18 +132,18 @@
# define TTYS1_DEV g_uart0port /* UART0 is tty1 */
# if CONFIG_STR71X_UART2
# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
# if CONFIG_STR71X_UART3
# if defined(CONFIG_STR71X_UART3)
# define TTYS3_DEV g_uart3port /* UART3 is tty3 */
# endif
# elif CONFIG_STR71X_UART3
# elif defined(CONFIG_STR71X_UART3)
# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
# endif
# elif CONFIG_STR71X_UART2
# define TTYS1_DEV g_uart2port /* UART2 is tty1 */
# if CONFIG_STR71X_UART3
# if defined(CONFIG_STR71X_UART3)
# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
# endif
# elif CONFIG_STR71X_UART3
# elif defined(CONFIG_STR71X_UART3)
# define TTYS1_DEV g_uart3port /* UART3 is tty1 */
# endif
#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
@ -154,20 +154,20 @@
# define TTYS0_DEV g_uart2port /* UART2 is tty0 */
# if CONFIG_STR71X_UART0
# define TTYS1_DEV g_uart0port /* UART0 is tty1 */
# if CONFIG_STR71X_UART1
# if defined(CONFIG_STR71X_UART1)
# define TTYS2_DEV g_uart1port /* UART1 is tty2 */
# if CONFIG_STR71X_UART3
# if defined(CONFIG_STR71X_UART3)
# define TTYS3_DEV g_uart3port /* UART3 is tty3 */
# endif
# elif CONFIG_STR71X_UART3
# elif defined(CONFIG_STR71X_UART3)
# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
# endif
# elif CONFIG_STR71X_UART1
# elif defined(CONFIG_STR71X_UART1)
# define TTYS1_DEV g_uart1port /* UART1 is tty1 */
# if CONFIG_STR71X_UART3
# if defined(CONFIG_STR71X_UART3)
# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
# endif
# elif CONFIG_STR71X_UART3
# elif defined(CONFIG_STR71X_UART3)
# define TTYS1_DEV g_uart3port /* UART3 is tty1 */
# endif
#elif defined(CONFIG_UART3_SERIAL_CONSOLE)
@ -178,20 +178,20 @@
# define TTYS0_DEV g_uart3port /* UART3 is tty0 */
# if CONFIG_STR71X_UART0
# define TTYS1_DEV g_uart0port /* UART0 is tty1 */
# if CONFIG_STR71X_UART1
# if defined(CONFIG_STR71X_UART1)
# define TTYS2_DEV g_uart1port /* UART1 is tty2 */
# if CONFIG_STR71X_UART2
# if defined(CONFIG_STR71X_UART2)
# define TTYS3_DEV g_uart2port /* UART2 is tty3 */
# endif
# elif CONFIG_STR71X_UART2
# elif defined(CONFIG_STR71X_UART2)
# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
# endif
# elif CONFIG_STR71X_UART1
# elif defined(CONFIG_STR71X_UART1)
# define TTYS1_DEV g_uart1port /* UART1 is tty1 */
# if CONFIG_STR71X_UART2
# if defined(CONFIG_STR71X_UART2)
# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
# endif
# elif CONFIG_STR71X_UART2
# elif defined(CONFIG_STR71X_UART2)
# define TTYS1_DEV g_uart2port /* UART2 is tty1 */
# endif
#else