More fixes to problems noted by cppcheck. Some are kind of risky; some are real bugs.
This commit is contained in:
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e0fc5a86c8
commit
2994448d85
@ -84,20 +84,20 @@ struct uart_regs_s
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struct up_dev_s
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struct up_dev_s
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{
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{
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unsigned int uartbase; /* Base address of UART registers */
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unsigned int uartbase; /* Base address of UART registers */
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unsigned int baud_base; /* Base baud for conversions */
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unsigned int baud_base; /* Base baud for conversions */
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unsigned int baud; /* Configured baud */
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unsigned int baud; /* Configured baud */
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uint8_t xmit_fifo_size; /* Size of transmit FIFO */
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uint8_t xmit_fifo_size; /* Size of transmit FIFO */
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uint8_t irq; /* IRQ associated with this UART */
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uint8_t irq; /* IRQ associated with this UART */
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uint8_t parity; /* 0=none, 1=odd, 2=even */
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uint8_t parity; /* 0=none, 1=odd, 2=even */
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uint8_t bits; /* Number of bits (7 or 8) */
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uint8_t bits; /* Number of bits (7 or 8) */
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#ifdef CONFIG_UART_HWFLOWCONTROL
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#ifdef CONFIG_UART_HWFLOWCONTROL
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bool flowcontrol; /* true: Hardware flow control
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bool flowcontrol; /* true: Hardware flow control
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* is enabled. */
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* is enabled. */
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#endif
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#endif
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bool stopbits2; /* true: Configure with 2
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bool stopbits2; /* true: Configure with 2
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* stop bits instead of 1 */
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* stop bits instead of 1 */
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struct uart_regs_s regs; /* Shadow copy of readonly regs */
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struct uart_regs_s regs; /* Shadow copy of readonly regs */
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};
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};
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/****************************************************************************
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/****************************************************************************
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@ -94,23 +94,23 @@ struct uart_regs_s
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struct up_dev_s
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struct up_dev_s
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{
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{
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unsigned int uartbase; /* Base address of UART registers */
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unsigned int uartbase; /* Base address of UART registers */
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unsigned int baud_base; /* Base baud for conversions */
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unsigned int baud_base; /* Base baud for conversions */
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unsigned int baud; /* Configured baud */
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unsigned int baud; /* Configured baud */
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uint8_t xmit_fifo_size; /* Size of transmit FIFO */
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uint8_t xmit_fifo_size; /* Size of transmit FIFO */
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uint8_t irq; /* IRQ associated with this UART */
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uint8_t irq; /* IRQ associated with this UART */
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uint8_t parity; /* 0=none, 1=odd, 2=even */
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uint8_t parity; /* 0=none, 1=odd, 2=even */
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uint8_t bits; /* Number of bits (7 or 8) */
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uint8_t bits; /* Number of bits (7 or 8) */
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#ifdef CONFIG_UART_HWFLOWCONTROL
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#ifdef CONFIG_UART_HWFLOWCONTROL
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bool flowcontrol; /* true: Hardware flow control
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bool flowcontrol; /* true: Hardware flow control
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* is enabled. */
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* is enabled. */
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#endif
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#endif
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bool stopbits2; /* true: Configure with 2
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bool stopbits2; /* true: Configure with 2
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* stop bits instead of 1 */
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* stop bits instead of 1 */
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struct uart_regs_s regs; /* Shadow copy of readonly regs */
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struct uart_regs_s regs; /* Shadow copy of readonly regs */
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#ifdef CONFIG_SERCOMM_CONSOLE
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#ifdef CONFIG_SERCOMM_CONSOLE
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bool sercomm; /* Call sercomm in interrupt if true */
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bool sercomm; /* Call sercomm in interrupt if true */
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#endif
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#endif
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};
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};
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@ -717,7 +717,7 @@ void efm32_dmastop(DMA_HANDLE handle)
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uint32_t regval;
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uint32_t regval;
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uint32_t bit;
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uint32_t bit;
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DEBUGASSERT(dmach && dmach);
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DEBUGASSERT(dmach);
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bit = 1 << dmach->chan;
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bit = 1 << dmach->chan;
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/* Disable the channel */
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/* Disable the channel */
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@ -631,8 +631,8 @@ static int up_attach(struct uart_dev_s *dev)
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/* Set the uart interrupt priority (the default value is one) */
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/* Set the uart interrupt priority (the default value is one) */
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up_prioritize_irq(priv->irq, CONFIG_UART_PRI);
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up_prioritize_irq(priv->irq, CONFIG_UART_PRI);
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}
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#endif
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#endif
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}
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return ret;
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return ret;
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}
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}
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@ -951,7 +951,6 @@ static int ssi_interrupt(int irq, void *context)
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{
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{
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struct tiva_ssidev_s *priv = ssi_mapirq(irq);
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struct tiva_ssidev_s *priv = ssi_mapirq(irq);
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uint32_t regval;
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uint32_t regval;
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int ntxd;
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DEBUGASSERT(priv != NULL);
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DEBUGASSERT(priv != NULL);
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@ -975,7 +974,7 @@ static int ssi_interrupt(int irq, void *context)
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/* Handle outgoing Tx FIFO transfers */
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/* Handle outgoing Tx FIFO transfers */
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ntxd = ssi_performtx(priv);
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(void)ssi_performtx(priv);
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/* Handle incoming Rx FIFO transfers */
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/* Handle incoming Rx FIFO transfers */
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@ -267,6 +267,8 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
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actual = BOARD_CPU_CLOCK / 128;
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actual = BOARD_CPU_CLOCK / 128;
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}
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}
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#warning REVIST: spcr/spsr are never used
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/* Save the frequency setting */
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/* Save the frequency setting */
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#ifndef CONFIG_SPI_OWNBUS
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#ifndef CONFIG_SPI_OWNBUS
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@ -531,6 +533,8 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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#ifndef CONFIG_SPI_OWNBUS
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#ifndef CONFIG_SPI_OWNBUS
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sem_init(&priv->exclsem, 0, 1);
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sem_init(&priv->exclsem, 0, 1);
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#endif
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#endif
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irqrestore(flags);
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return &priv->spidev;
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return &priv->spidev;
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}
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}
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#endif /* CONFIG_AVR_SPI */
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#endif /* CONFIG_AVR_SPI */
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@ -359,13 +359,12 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
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size_t buflen)
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size_t buflen)
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{
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{
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FAR const uint8_t *ptr = (FAR const uint8_t*)buffer;
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FAR const uint8_t *ptr = (FAR const uint8_t*)buffer;
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uint8_t response;
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/* Loop while there are bytes remaining to be sent */
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/* Loop while there are bytes remaining to be sent */
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while (buflen-- > 0)
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while (buflen-- > 0)
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{
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{
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response = spi_transfer(*ptr++);
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(void)spi_transfer(*ptr++);
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}
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}
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}
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}
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@ -76,16 +76,14 @@
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int up_timerisr(int irq, chipreg_t *regs)
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int up_timerisr(int irq, chipreg_t *regs)
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{
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{
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volatile uint8_t reg;
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/* Read the appropriate timer0 register to clear the interrupt */
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/* Read the appropropriate timer0 registr to clear the interrupt */
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#ifdef _EZ80F91
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#ifdef _EZ80F91
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reg = inp(EZ80_TMR0_IIR);
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(void)inp(EZ80_TMR0_IIR);
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#else
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#else
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/* _EZ80190, _EZ80L92, _EZ80F92, _EZ80F93 */
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/* _EZ80190, _EZ80L92, _EZ80F92, _EZ80F93 */
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reg = inp(EZ80_TMR0_CTL);
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(void)inp(EZ80_TMR0_CTL);
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#endif
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#endif
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/* Process timer interrupt */
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/* Process timer interrupt */
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@ -113,7 +111,6 @@ int up_timerisr(int irq, chipreg_t *regs)
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void up_timer_initialize(void)
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void up_timer_initialize(void)
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{
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{
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uint16_t reload;
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uint16_t reload;
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uint8_t reg;
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/* Disable the timer */
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/* Disable the timer */
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@ -149,9 +146,9 @@ void up_timer_initialize(void)
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/* Clear any pending timer interrupts */
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/* Clear any pending timer interrupts */
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#if defined(_EZ80F91)
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#if defined(_EZ80F91)
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reg = inp(EZ80_TMR0_IIR);
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(void)inp(EZ80_TMR0_IIR);
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#elif defined(_EZ80L92) || defined(_EZ80F92) ||defined(_EZ80F93)
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#elif defined(_EZ80L92) || defined(_EZ80F92) ||defined(_EZ80F93)
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reg = inp(EZ80_TMR0_CTL);
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(void)inp(EZ80_TMR0_CTL);
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#endif
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#endif
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/* Configure and enable the timer */
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/* Configure and enable the timer */
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@ -575,8 +575,6 @@ static bool z180_txempty(struct uart_dev_s *dev)
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void up_serialinit(void)
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void up_serialinit(void)
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{
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{
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uint8_t regval;
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/* Make sure that all UART interrupts are disabled */
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/* Make sure that all UART interrupts are disabled */
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#warning "Missing logic"
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#warning "Missing logic"
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@ -94,16 +94,14 @@
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int up_timerisr(int irq, chipreg_t *regs)
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int up_timerisr(int irq, chipreg_t *regs)
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{
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{
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volatile uint8_t regval;
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/* "When TMDR0 decrements to 0, TIF0 is set to 1. This generates an interrupt
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/* "When TMDR0 decrements to 0, TIF0 is set to 1. This generates an interrupt
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* request if enabled by TIE0 = 1. TIF0 is reset to 0 when TCR is read and
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* request if enabled by TIE0 = 1. TIF0 is reset to 0 when TCR is read and
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* the higher or lower byte of TMDR0 is read."
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* the higher or lower byte of TMDR0 is read."
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*/
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*/
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regval = inp(Z180_PRT_TCR);
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(void)inp(Z180_PRT_TCR);
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regval = inp(Z180_PRT0_DRL);
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(void)inp(Z180_PRT0_DRL);
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regval = inp(Z180_PRT0_DRH);
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(void)inp(Z180_PRT0_DRH);
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/* Process timer interrupt */
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/* Process timer interrupt */
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@ -75,9 +75,12 @@ extern uint32_t get_freq(void);
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void up_lowserialinit(void)
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void up_lowserialinit(void)
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{
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{
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#if defined(CONFIG_UART0_SERIAL_CONSOLE) || \
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(defined(EZ8_UART1) && defined(CONFIG_UART1_SERIAL_CONSOLE))
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uint32_t freq = get_freq();
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uint32_t freq = get_freq();
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uint16_t brg;
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uint16_t brg;
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uint8_t val;
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uint8_t val;
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#endif
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#ifdef CONFIG_UART0_SERIAL_CONSOLE
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#ifdef CONFIG_UART0_SERIAL_CONSOLE
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/* Set the baudrate */
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/* Set the baudrate */
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@ -442,8 +442,8 @@ static void pcm_subsample_configure(FAR struct pcm_decode_s *priv,
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if (priv->subsample == AUDIO_SUBSAMPLE_NONE)
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if (priv->subsample == AUDIO_SUBSAMPLE_NONE)
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{
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{
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/* Ignore request to stop fast forwarding if we are already
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/* Ignore request to stop fast forwarding if we are already playing
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* fast forwarding.
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* normally.
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*/
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*/
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if (subsample != AUDIO_SUBSAMPLE_NONE)
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if (subsample != AUDIO_SUBSAMPLE_NONE)
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@ -460,24 +460,11 @@ static void pcm_subsample_configure(FAR struct pcm_decode_s *priv,
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}
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}
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}
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}
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/* 2. Were already fast forwarding and we have been asked to change the
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/* 2. We were already fast forwarding and we have been asked to return to
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* sub-sampling rate.
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*/
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else if (subsample != AUDIO_SUBSAMPLE_NONE)
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{
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/* Just save the current subsample setting. It will take effect
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* on the next audio buffer that we receive.
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*/
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priv->subsample = subsample;
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}
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/* 3. We were already fast forwarding and we have been asked to return to
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* normal play.
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* normal play.
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*/
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*/
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else if (subsample != AUDIO_SUBSAMPLE_NONE)
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else if (subsample == AUDIO_SUBSAMPLE_NONE)
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{
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{
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audvdbg("Stop sub-sampling\n");
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audvdbg("Stop sub-sampling\n");
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@ -489,6 +476,19 @@ static void pcm_subsample_configure(FAR struct pcm_decode_s *priv,
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priv->skip = 0;
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priv->skip = 0;
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priv->subsample = AUDIO_SUBSAMPLE_NONE;
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priv->subsample = AUDIO_SUBSAMPLE_NONE;
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}
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}
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/* 3. Were already fast forwarding and we have been asked to change the
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* sub-sampling rate.
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*/
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else if (priv->subsample != subsample)
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{
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/* Just save the new subsample setting. It will take effect on the
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* next audio buffer that we receive.
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*/
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priv->subsample = subsample;
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}
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}
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}
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#endif
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#endif
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static void lpc31_sdraminitialize(void)
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static void lpc31_sdraminitialize(void)
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{
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{
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uint32_t tmp;
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uint32_t regval;
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uint32_t regval;
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/* These run-time calculations can be reduced dramatically if hclk is
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/* These run-time calculations can be reduced dramatically if hclk is
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@ -266,7 +265,7 @@ static void lpc31_sdraminitialize(void)
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* 16bit mode
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* 16bit mode
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*/
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*/
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tmp = getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 13));
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(void)getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 13));
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putreg32((MPMC_DYNCONFIG0_MDSDRAM|MPMC_DYNCONFIG_HP16_32MX16),
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putreg32((MPMC_DYNCONFIG0_MDSDRAM|MPMC_DYNCONFIG_HP16_32MX16),
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LPC31_MPMC_DYNCONFIG0);
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LPC31_MPMC_DYNCONFIG0);
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@ -157,7 +157,6 @@
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static void lpc31_sdraminitialize(void)
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static void lpc31_sdraminitialize(void)
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{
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{
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uint32_t tmp;
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uint32_t regval;
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uint32_t regval;
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/* These run-time calculations can be reduced dramatically if hclk is
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/* These run-time calculations can be reduced dramatically if hclk is
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@ -266,7 +265,7 @@ static void lpc31_sdraminitialize(void)
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* 16bit mode
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* 16bit mode
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*/
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*/
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tmp = getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 13));
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(void)getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 13));
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putreg32((MPMC_DYNCONFIG0_MDSDRAM|MPMC_DYNCONFIG_HP16_32MX16),
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putreg32((MPMC_DYNCONFIG0_MDSDRAM|MPMC_DYNCONFIG_HP16_32MX16),
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LPC31_MPMC_DYNCONFIG0);
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LPC31_MPMC_DYNCONFIG0);
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@ -146,5 +146,5 @@ void stm32_board_clockconfig(void)
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while ((getreg32(STM32_RCC_CFGR) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_PLL)
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while ((getreg32(STM32_RCC_CFGR) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_PLL)
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;
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;
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#endif
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}
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}
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#endif
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@ -169,7 +169,11 @@ int nsh_archinitialize(void)
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FAR struct spi_dev_s *spi;
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FAR struct spi_dev_s *spi;
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FAR struct mtd_dev_s *mtd;
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FAR struct mtd_dev_s *mtd;
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#endif
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#endif
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#if defined(NSH_HAVEMMCSD) || defined(HAVE_USBHOST) || \
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defined(HAVE_USBMONITOR) || defined(CONFIG_LCD_MIO283QT2) || \
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defined(CONFIG_LCD_MIO283QT9A)
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int ret;
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int ret;
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#endif
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/* Configure SPI-based devices */
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/* Configure SPI-based devices */
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@ -435,7 +435,6 @@ static void tc_adc_init(void)
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regval = tc_adc_getreg(STM32_ADC_SQR3_OFFSET) & ADC_SQR3_RESERVED;
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regval = tc_adc_getreg(STM32_ADC_SQR3_OFFSET) & ADC_SQR3_RESERVED;
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regval |= LCD_YD_CHANNEL;
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regval |= LCD_YD_CHANNEL;
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tc_adc_putreg(STM32_ADC_SQR3_OFFSET, regval);
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tc_adc_putreg(STM32_ADC_SQR3_OFFSET, regval);
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regval = tc_adc_getreg(STM32_ADC_SQR3_OFFSET);
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|
||||||
/* Set the number of conversions = 1 */
|
/* Set the number of conversions = 1 */
|
||||||
|
|
||||||
|
@ -101,7 +101,7 @@ void imx_boardinitialize(void)
|
|||||||
imxgpio_configprimary(GPIOA, 21);
|
imxgpio_configprimary(GPIOA, 21);
|
||||||
imxgpio_configprimary(GPIOA, 22);
|
imxgpio_configprimary(GPIOA, 22);
|
||||||
|
|
||||||
regval = getreg32(IMX_CS4_VSECTION + 0x0c);
|
(void)getreg32(IMX_CS4_VSECTION + 0x0c);
|
||||||
regval = getreg32(IMX_CS4_VSECTION + 0x0c);
|
(void)getreg32(IMX_CS4_VSECTION + 0x0c);
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
@ -137,7 +137,6 @@ static uint32_t lpc31_ns2clk(uint32_t ns, uint32_t hclk2)
|
|||||||
|
|
||||||
static inline void lpc31_sdraminitialize(void)
|
static inline void lpc31_sdraminitialize(void)
|
||||||
{
|
{
|
||||||
uint32_t tmp;
|
|
||||||
uint32_t regval;
|
uint32_t regval;
|
||||||
|
|
||||||
/* These run-time calculations can be reduced dramatically if hclk is
|
/* These run-time calculations can be reduced dramatically if hclk is
|
||||||
@ -254,7 +253,7 @@ static inline void lpc31_sdraminitialize(void)
|
|||||||
* 16bit mode
|
* 16bit mode
|
||||||
*/
|
*/
|
||||||
|
|
||||||
tmp = getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 12));
|
(void)getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 12));
|
||||||
|
|
||||||
/* Select normal operating mode */
|
/* Select normal operating mode */
|
||||||
|
|
||||||
|
@ -59,6 +59,10 @@
|
|||||||
* Pre-Processor Definitions
|
* Pre-Processor Definitions
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
|
#if !defined(CONFIG_STM32_CAN1) && !defined(CONFIG_STM32_CAN2)
|
||||||
|
# undef CONFIG_CAN
|
||||||
|
#endif
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Public Functions
|
* Public Functions
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
@ -84,7 +88,7 @@ int nsh_archinitialize(void)
|
|||||||
int ret;
|
int ret;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
|
#ifdef CONFIG_CAN
|
||||||
/* Configure on-board CAN if CAN support has been selected. */
|
/* Configure on-board CAN if CAN support has been selected. */
|
||||||
|
|
||||||
ret = stm32_can_initialize();
|
ret = stm32_can_initialize();
|
||||||
|
@ -109,11 +109,6 @@
|
|||||||
void open1788_sdram_initialize(void)
|
void open1788_sdram_initialize(void)
|
||||||
{
|
{
|
||||||
uint32_t regval;
|
uint32_t regval;
|
||||||
#ifdef CONFIG_LPC17_SDRAM_16BIT
|
|
||||||
volatile uint16_t dummy;
|
|
||||||
#else
|
|
||||||
volatile uint32_t dummy;
|
|
||||||
#endif
|
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
/* Reconfigure delays:
|
/* Reconfigure delays:
|
||||||
@ -211,9 +206,9 @@ void open1788_sdram_initialize(void)
|
|||||||
LPC17_EMC_DYNAMICCONTROL);
|
LPC17_EMC_DYNAMICCONTROL);
|
||||||
|
|
||||||
#ifdef CONFIG_LPC17_SDRAM_16BIT
|
#ifdef CONFIG_LPC17_SDRAM_16BIT
|
||||||
dummy = getreg16(SDRAM_BASE | (0x33 << 12)); /* 8 burst, 3 CAS latency */
|
(void)getreg16(SDRAM_BASE | (0x33 << 12)); /* 8 burst, 3 CAS latency */
|
||||||
#elif defined CONFIG_LPC17_SDRAM_32BIT
|
#elif defined CONFIG_LPC17_SDRAM_32BIT
|
||||||
dummy = getreg32(SDRAM_BASE | (0x32 << 13)); /* 4 burst, 3 CAS latency */
|
(void)getreg32(SDRAM_BASE | (0x32 << 13)); /* 4 burst, 3 CAS latency */
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Issue NORMAL command */
|
/* Issue NORMAL command */
|
||||||
|
@ -1197,14 +1197,14 @@ static int stm32_setpower(struct lcd_dev_s *dev, int power)
|
|||||||
else
|
else
|
||||||
#endif
|
#endif
|
||||||
#ifndef CONFIG_STM32_ILI9320_DISABLE
|
#ifndef CONFIG_STM32_ILI9320_DISABLE
|
||||||
if (priv->type == LCD_TYPE_ILI9300)
|
if (priv->type == LCD_TYPE_ILI9320)
|
||||||
{
|
{
|
||||||
stm32_writereg(priv, LCD_REG_7, 0x0173);
|
stm32_writereg(priv, LCD_REG_7, 0x0173);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
#endif
|
#endif
|
||||||
#ifndef CONFIG_STM32_ILI9321_DISABLE
|
#ifndef CONFIG_STM32_ILI9321_DISABLE
|
||||||
if (priv->type == LCD_TYPE_ILI9300)
|
if (priv->type == LCD_TYPE_ILI9321)
|
||||||
{
|
{
|
||||||
stm32_writereg(priv, LCD_REG_7, 0x0173);
|
stm32_writereg(priv, LCD_REG_7, 0x0173);
|
||||||
}
|
}
|
||||||
|
@ -170,7 +170,10 @@ void stm32_usbinitialize(void)
|
|||||||
int stm32_usbhost_initialize(void)
|
int stm32_usbhost_initialize(void)
|
||||||
{
|
{
|
||||||
int pid;
|
int pid;
|
||||||
|
#if defined(CONFIG_USBHOST_MSC) || defined(CONFIG_USBHOST_HIDKBD) || \
|
||||||
|
defined(CONFIG_USBHOST_HIDMOUSE)
|
||||||
int ret;
|
int ret;
|
||||||
|
#endif
|
||||||
|
|
||||||
/* First, register all of the class drivers needed to support the drivers
|
/* First, register all of the class drivers needed to support the drivers
|
||||||
* that we care about:
|
* that we care about:
|
||||||
|
@ -577,7 +577,8 @@ int sif_main(int argc, char *argv[])
|
|||||||
}
|
}
|
||||||
else if (status != 0) {
|
else if (status != 0) {
|
||||||
if (stpage != 0xFFFF) {
|
if (stpage != 0xFFFF) {
|
||||||
printf("Free Range:\t%d\t-\t%d\n", stpage, page-2);
|
printf("Free Range:\t%lu\t-\t%lu\n",
|
||||||
|
(unsigned long)stpage, (unsigned long)(page-2));
|
||||||
stpage = 0xFFFF;
|
stpage = 0xFFFF;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -594,8 +595,8 @@ int sif_main(int argc, char *argv[])
|
|||||||
size_t page = atoi(argv[2]);
|
size_t page = atoi(argv[2]);
|
||||||
size_t addr = page * up_progmem_pagesize(page);
|
size_t addr = page * up_progmem_pagesize(page);
|
||||||
|
|
||||||
printf("Write result: %d (writing to address %xh)\n",
|
printf("Write result: %d (writing to address %lxh)\n",
|
||||||
up_progmem_write(addr, "Test", 4), addr);
|
up_progmem_write(addr, "Test", 4), (unsigned long)addr);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
else if (!strcmp(argv[1], "i2c") && argc == 3) {
|
else if (!strcmp(argv[1], "i2c") && argc == 3) {
|
||||||
|
@ -66,21 +66,31 @@
|
|||||||
|
|
||||||
void up_cryptoinitialize(void)
|
void up_cryptoinitialize(void)
|
||||||
{
|
{
|
||||||
int res = OK;
|
#if defined(CONFIG_CRYPTO_AES) || defined(CONFIG_CRYPTO_ALGTEST)
|
||||||
|
int res;
|
||||||
|
|
||||||
#if defined(CONFIG_CRYPTO_AES)
|
#ifdef CONFIG_CRYPTO_AES
|
||||||
res = up_aesinitialize();
|
res = up_aesinitialize();
|
||||||
if (res)
|
if (res)
|
||||||
return res;
|
{
|
||||||
|
return res;
|
||||||
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_CRYPTO_ALGTEST)
|
#if CONFIG_CRYPTO_ALGTEST
|
||||||
res = crypto_test();
|
res = crypto_test();
|
||||||
if (res)
|
if (res)
|
||||||
cryptlldbg("crypto test failed\n");
|
{
|
||||||
|
cryptlldbg("crypto test failed\n");
|
||||||
|
}
|
||||||
else
|
else
|
||||||
cryptllvdbg("crypto test OK\n");
|
{
|
||||||
|
cryptllvdbg("crypto test OK\n");
|
||||||
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
return res;
|
return res;
|
||||||
}
|
#else
|
||||||
|
return OK;
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
@ -168,23 +168,25 @@ static uint8_t getspsreg(uint16_t sps)
|
|||||||
{
|
{
|
||||||
static const unsigned short sps_tab[]=
|
static const unsigned short sps_tab[]=
|
||||||
{
|
{
|
||||||
3,7,12,20,27,40,55,80,300,750,1500,3000,5000,10000,20000,65535,
|
3, 7, 12, 20, 27, 40, 55, 80,
|
||||||
|
300, 750, 1500, 3000, 5000, 10000, 20000, 65535,
|
||||||
};
|
};
|
||||||
static const unsigned char sps_reg[]=
|
static const unsigned char sps_reg[]=
|
||||||
{
|
{
|
||||||
0x03,0x13,0x23,0x33,0x43,0x53,0x63,0x72,0x82,0x92,0xa1,0xb0,0xc0,0xd0,0xe0,0xf0,
|
0x03, 0x13, 0x23, 0x33, 0x43, 0x53, 0x63, 0x72,
|
||||||
|
0x82, 0x92, 0xa1, 0xb0, 0xc0, 0xd0, 0xe0, 0xf0,
|
||||||
};
|
};
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
for (i=0; i<16; i++)
|
for (i = 0; i < 16; i++)
|
||||||
{
|
{
|
||||||
if (sps<sps_tab[i])
|
if (sps < sps_tab[i])
|
||||||
{
|
{
|
||||||
break;
|
return sps_reg[i];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
return sps_reg[i];
|
return sps_reg[15];
|
||||||
}
|
}
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
|
@ -1685,7 +1685,7 @@ static int wm8904_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
|
|||||||
{
|
{
|
||||||
FAR struct wm8904_dev_s *priv = (FAR struct wm8904_dev_s *)dev;
|
FAR struct wm8904_dev_s *priv = (FAR struct wm8904_dev_s *)dev;
|
||||||
struct audio_msg_s term_msg;
|
struct audio_msg_s term_msg;
|
||||||
int ret = -EAGAIN;
|
int ret;
|
||||||
|
|
||||||
audvdbg("Enqueueing: apb=%p curbyte=%d nbytes=%d flags=%04x\n",
|
audvdbg("Enqueueing: apb=%p curbyte=%d nbytes=%d flags=%04x\n",
|
||||||
apb, apb->curbyte, apb->nbytes, apb->flags);
|
apb, apb->curbyte, apb->nbytes, apb->flags);
|
||||||
|
@ -750,6 +750,8 @@ static void mxt_button_event(FAR struct mxt_dev_s *priv,
|
|||||||
button = (msg->body[0] & mask) == 0;
|
button = (msg->body[0] & mask) == 0;
|
||||||
|
|
||||||
/* Now what? */
|
/* Now what? */
|
||||||
|
|
||||||
|
UNUSED(button);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -719,11 +719,13 @@ static int mio283qt9a_setcontrast(FAR struct lcd_dev_s *dev, unsigned int contra
|
|||||||
static inline int mio283qt9a_hwinitialize(FAR struct mio283qt9a_dev_s *priv)
|
static inline int mio283qt9a_hwinitialize(FAR struct mio283qt9a_dev_s *priv)
|
||||||
{
|
{
|
||||||
FAR struct mio283qt9a_lcd_s *lcd = priv->lcd;
|
FAR struct mio283qt9a_lcd_s *lcd = priv->lcd;
|
||||||
#ifndef CONFIG_LCD_NOGETRUN
|
#if !defined(CONFIG_LCD_NOGETRUN) || defined(CONFIG_DEBUG_LCD)
|
||||||
uint16_t id_a;
|
uint16_t id_a;
|
||||||
uint16_t id_b;
|
uint16_t id_b;
|
||||||
uint16_t id_c;
|
uint16_t id_c;
|
||||||
uint16_t id_d;
|
uint16_t id_d;
|
||||||
|
#endif
|
||||||
|
#ifdef CONFIG_DEBUG_LCD
|
||||||
uint16_t id_e;
|
uint16_t id_e;
|
||||||
#endif
|
#endif
|
||||||
int ret;
|
int ret;
|
||||||
@ -741,6 +743,8 @@ static inline int mio283qt9a_hwinitialize(FAR struct mio283qt9a_dev_s *priv)
|
|||||||
id_d = lcd->read(lcd);
|
id_d = lcd->read(lcd);
|
||||||
|
|
||||||
lcdvdbg("LCD ID: %04x %04x %04x %04x\n", id_a, id_b, id_c, id_d);
|
lcdvdbg("LCD ID: %04x %04x %04x %04x\n", id_a, id_b, id_c, id_d);
|
||||||
|
UNUSED(id_a);
|
||||||
|
UNUSED(id_b);
|
||||||
|
|
||||||
/* Check if the ID is for the ILI9341 */
|
/* Check if the ID is for the ILI9341 */
|
||||||
|
|
||||||
@ -773,6 +777,7 @@ static inline int mio283qt9a_hwinitialize(FAR struct mio283qt9a_dev_s *priv)
|
|||||||
mio283qt9a_putreg(lcd, 0x11, 0); /* Sleep out mode */
|
mio283qt9a_putreg(lcd, 0x11, 0); /* Sleep out mode */
|
||||||
up_mdelay(25);
|
up_mdelay(25);
|
||||||
|
|
||||||
|
#ifdef CONFIG_DEBUG_LCD
|
||||||
/* Read back some info from the panel */
|
/* Read back some info from the panel */
|
||||||
|
|
||||||
id_a = mio283qt9a_readreg(lcd, 0x04); /* Read display information */
|
id_a = mio283qt9a_readreg(lcd, 0x04); /* Read display information */
|
||||||
@ -811,6 +816,7 @@ static inline int mio283qt9a_hwinitialize(FAR struct mio283qt9a_dev_s *priv)
|
|||||||
id_a = mio283qt9a_readreg(lcd, 0x0f); /* read self diag */
|
id_a = mio283qt9a_readreg(lcd, 0x0f); /* read self diag */
|
||||||
id_b = lcd->read(lcd);
|
id_b = lcd->read(lcd);
|
||||||
lcdvdbg("Self diag %02x, %02x\n", id_a, id_b);
|
lcdvdbg("Self diag %02x, %02x\n", id_a, id_b);
|
||||||
|
#endif
|
||||||
ret = OK;
|
ret = OK;
|
||||||
}
|
}
|
||||||
#ifndef CONFIG_LCD_NOGETRUN
|
#ifndef CONFIG_LCD_NOGETRUN
|
||||||
|
@ -453,7 +453,7 @@ FAR struct mtd_dev_s *rammtd_initialize(FAR uint8_t *start, size_t size)
|
|||||||
/* Force the size to be an even number of the erase block size */
|
/* Force the size to be an even number of the erase block size */
|
||||||
|
|
||||||
nblocks = size / CONFIG_RAMMTD_ERASESIZE;
|
nblocks = size / CONFIG_RAMMTD_ERASESIZE;
|
||||||
if (nblocks <= 0)
|
if (nblocks < 1)
|
||||||
{
|
{
|
||||||
fdbg("Need to provide at least one full erase block\n");
|
fdbg("Need to provide at least one full erase block\n");
|
||||||
return NULL;
|
return NULL;
|
||||||
|
@ -836,11 +836,11 @@ static int smart_scan(struct smart_struct_s *dev)
|
|||||||
|
|
||||||
rootdirdev->dev = dev;
|
rootdirdev->dev = dev;
|
||||||
rootdirdev->rootdirnum = x;
|
rootdirdev->rootdirnum = x;
|
||||||
ret = register_blockdriver(dev->rwbuffer, &g_bops, 0, rootdirdev);
|
(void)register_blockdriver(dev->rwbuffer, &g_bops, 0, rootdirdev);
|
||||||
|
|
||||||
/* Inode private data is a reference to the SMART device structure */
|
/* Inode private data is a reference to the SMART device structure */
|
||||||
|
|
||||||
ret = register_blockdriver(devname, &g_bops, 0, rootdirdev);
|
(void)register_blockdriver(devname, &g_bops, 0, rootdirdev);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
@ -1359,7 +1359,7 @@ static int smart_garbagecollect(struct smart_struct_s *dev)
|
|||||||
|
|
||||||
/* Write the data to the new physical sector location */
|
/* Write the data to the new physical sector location */
|
||||||
|
|
||||||
ret = MTD_BWRITE(dev->mtd, newsector * dev->mtdBlksPerSector,
|
(void)MTD_BWRITE(dev->mtd, newsector * dev->mtdBlksPerSector,
|
||||||
dev->mtdBlksPerSector, (uint8_t *) dev->rwbuffer);
|
dev->mtdBlksPerSector, (uint8_t *) dev->rwbuffer);
|
||||||
|
|
||||||
/* Commit the sector */
|
/* Commit the sector */
|
||||||
|
@ -714,7 +714,7 @@ static void sst25_wordwrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
|
|||||||
* we are finished.
|
* we are finished.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
if (nwords <= 0)
|
if (nwords < 1)
|
||||||
{
|
{
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
@ -891,8 +891,6 @@ static void dm9x_receive(struct dm9x_driver_s *dm9x)
|
|||||||
{
|
{
|
||||||
union rx_desc_u rx;
|
union rx_desc_u rx;
|
||||||
bool bchecksumready;
|
bool bchecksumready;
|
||||||
uint8_t mdrah;
|
|
||||||
uint8_t mdral;
|
|
||||||
uint8_t rxbyte;
|
uint8_t rxbyte;
|
||||||
|
|
||||||
nvdbg("Packet received\n");
|
nvdbg("Packet received\n");
|
||||||
@ -901,8 +899,8 @@ static void dm9x_receive(struct dm9x_driver_s *dm9x)
|
|||||||
{
|
{
|
||||||
/* Store the value of memory data read address register */
|
/* Store the value of memory data read address register */
|
||||||
|
|
||||||
mdrah = getreg(DM9X_MDRAH);
|
(void)getreg(DM9X_MDRAH);
|
||||||
mdral = getreg(DM9X_MDRAL);
|
(void)getreg(DM9X_MDRAL);
|
||||||
|
|
||||||
getreg(DM9X_MRCMDX); /* Dummy read */
|
getreg(DM9X_MRCMDX); /* Dummy read */
|
||||||
rxbyte = (uint8_t)DM9X_DATA; /* Get the most up-to-date data */
|
rxbyte = (uint8_t)DM9X_DATA; /* Get the most up-to-date data */
|
||||||
|
@ -270,7 +270,7 @@ void e1000_turn_off(struct e1000_dev *dev)
|
|||||||
|
|
||||||
void e1000_init(struct e1000_dev *dev)
|
void e1000_init(struct e1000_dev *dev)
|
||||||
{
|
{
|
||||||
uint32_t rxd_phy;
|
uint32_t rxd_phys;
|
||||||
uint32_t txd_phys;
|
uint32_t txd_phys;
|
||||||
uint32_t kmem_phys;
|
uint32_t kmem_phys;
|
||||||
uint32_t rx_control;
|
uint32_t rx_control;
|
||||||
@ -570,35 +570,33 @@ static void e1000_receive(struct e1000_dev *e1000)
|
|||||||
#ifdef CONFIG_NET_IPv6
|
#ifdef CONFIG_NET_IPv6
|
||||||
if (BUF->type == HTONS(ETHTYPE_IP6))
|
if (BUF->type == HTONS(ETHTYPE_IP6))
|
||||||
#else
|
#else
|
||||||
{
|
if (BUF->type == HTONS(ETHTYPE_IP))
|
||||||
if (BUF->type == HTONS(ETHTYPE_IP))
|
|
||||||
#endif
|
#endif
|
||||||
|
{
|
||||||
|
arp_ipin(&e1000->netdev);
|
||||||
|
devif_input(&e1000->netdev);
|
||||||
|
|
||||||
|
/* If the above function invocation resulted in data that should be
|
||||||
|
* sent out on the network, the field d_len will set to a value > 0.
|
||||||
|
*/
|
||||||
|
|
||||||
|
if (e1000->netdev.d_len > 0)
|
||||||
{
|
{
|
||||||
arp_ipin(&e1000->netdev);
|
arp_out(&e1000->netdev);
|
||||||
devif_input(&e1000->netdev);
|
e1000_transmit(e1000);
|
||||||
|
|
||||||
/* If the above function invocation resulted in data that should be
|
|
||||||
* sent out on the network, the field d_len will set to a value > 0.
|
|
||||||
*/
|
|
||||||
|
|
||||||
if (e1000->netdev.d_len > 0)
|
|
||||||
{
|
|
||||||
arp_out(&e1000->netdev);
|
|
||||||
e1000_transmit(e1000);
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
else if (BUF->type == htons(ETHTYPE_ARP))
|
}
|
||||||
|
else if (BUF->type == htons(ETHTYPE_ARP))
|
||||||
|
{
|
||||||
|
arp_arpin(&e1000->netdev);
|
||||||
|
|
||||||
|
/* If the above function invocation resulted in data that should be
|
||||||
|
* sent out on the network, the field d_len will set to a value > 0.
|
||||||
|
*/
|
||||||
|
|
||||||
|
if (e1000->netdev.d_len > 0)
|
||||||
{
|
{
|
||||||
arp_arpin(&e1000->netdev);
|
e1000_transmit(e1000);
|
||||||
|
|
||||||
/* If the above function invocation resulted in data that should be
|
|
||||||
* sent out on the network, the field d_len will set to a value > 0.
|
|
||||||
*/
|
|
||||||
|
|
||||||
if (e1000->netdev.d_len > 0)
|
|
||||||
{
|
|
||||||
e1000_transmit(e1000);
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -271,7 +271,6 @@ static int max1704x_getreg16(FAR struct max1704x_dev_s *priv, uint8_t regaddr,
|
|||||||
/* Return the 16-bit value */
|
/* Return the 16-bit value */
|
||||||
|
|
||||||
return (uint16_t)buffer[0] << 8 | (uint16_t)buffer[1];
|
return (uint16_t)buffer[0] << 8 | (uint16_t)buffer[1];
|
||||||
return OK;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
|
@ -156,7 +156,7 @@ void pm_activity(int priority)
|
|||||||
* controlled priority.
|
* controlled priority.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
(void)pm_update(accum);
|
(void)pm_update(tmp);
|
||||||
}
|
}
|
||||||
|
|
||||||
irqrestore(flags);
|
irqrestore(flags);
|
||||||
|
@ -365,7 +365,7 @@ static void usbmsc_putle32(uint8_t *buf, uint32_t val)
|
|||||||
|
|
||||||
static void usbmsc_scsi_wait(FAR struct usbmsc_dev_s *priv)
|
static void usbmsc_scsi_wait(FAR struct usbmsc_dev_s *priv)
|
||||||
{
|
{
|
||||||
irqstate_t flags = irqsave();
|
irqstate_t flags;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
/* We must hold the SCSI lock to call this function */
|
/* We must hold the SCSI lock to call this function */
|
||||||
@ -2802,7 +2802,7 @@ int usbmsc_scsi_main(int argc, char *argv[])
|
|||||||
|
|
||||||
void usbmsc_scsi_signal(FAR struct usbmsc_dev_s *priv)
|
void usbmsc_scsi_signal(FAR struct usbmsc_dev_s *priv)
|
||||||
{
|
{
|
||||||
irqstate_t flags = irqsave();
|
irqstate_t flags;
|
||||||
|
|
||||||
/* A flag is used to prevent driving up the semaphore count. This function
|
/* A flag is used to prevent driving up the semaphore count. This function
|
||||||
* is called (primarily) from interrupt level logic so we must disable
|
* is called (primarily) from interrupt level logic so we must disable
|
||||||
|
Loading…
Reference in New Issue
Block a user