From 29cae80533eec67e4837029a9c3142f07d5297a6 Mon Sep 17 00:00:00 2001 From: Gustavo Henrique Nihei Date: Wed, 26 May 2021 10:27:53 -0300 Subject: [PATCH] risc-v/esp32c3: Fix DMA TX Burst being set to input register --- arch/risc-v/src/esp32c3/esp32c3_dma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/risc-v/src/esp32c3/esp32c3_dma.c b/arch/risc-v/src/esp32c3/esp32c3_dma.c index 4d744e4bbd..e1639fd9f0 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_dma.c +++ b/arch/risc-v/src/esp32c3/esp32c3_dma.c @@ -157,12 +157,12 @@ int32_t esp32c3_dma_request(enum esp32c3_dma_periph_e periph, { /* Enable DMA TX/RX channels burst sending data */ - SET_BITS(DMA_IN_CONF0_CH0_REG, chan, DMA_OUT_DATA_BURST_EN_CH0_M); + SET_BITS(DMA_OUT_CONF0_CH0_REG, chan, DMA_OUT_DATA_BURST_EN_CH0_M); SET_BITS(DMA_IN_CONF0_CH0_REG, chan, DMA_IN_DATA_BURST_EN_CH0_M); /* Enable DMA TX/RX channels burst reading descriptor link */ - SET_BITS(DMA_IN_CONF0_CH0_REG, chan, DMA_OUTDSCR_BURST_EN_CH0_M); + SET_BITS(DMA_OUT_CONF0_CH0_REG, chan, DMA_OUTDSCR_BURST_EN_CH0_M); SET_BITS(DMA_IN_CONF0_CH0_REG, chan, DMA_INDSCR_BURST_EN_CH0_M); }