Kinetis:Add OSC_DIV to the kinetis_osc header
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@ -1,7 +1,7 @@
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/********************************************************************************************
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* arch/arm/src/kinetis/chip/kinetis_osc.h
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*
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* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
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* Copyright (C) 2011, 2016-2017 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -51,10 +51,12 @@
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/* Register Offsets *************************************************************************/
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#define KINETIS_OSC_CR_OFFSET 0x0000 /* OSC Control Register */
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#define KINETIS_OSC_DIV_OFFSET 0x0002 /* OSC CLock divider register */
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/* Register Addresses ***********************************************************************/
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#define KINETIS_OSC_CR (KINETIS_OSC_BASE+KINETIS_OSC_CR_OFFSET)
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#define KINETIS_OSC_DIV (KINETIS_OSC_BASE+KINETIS_OSC_DIV_OFFSET)
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/* Register Bit Definitions *****************************************************************/
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@ -69,6 +71,15 @@
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#define OSC_CR_SC8P (1 << 1) /* Bit 1: Oscillator 8 pF Capacitor Load Configure */
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#define OSC_CR_SC16P (1 << 0) /* Bit 0: Oscillator 16 pF Capacitor Load Configure */
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/* OSC Control Register (8-bit) */
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/* Bits 0-5: Reserved */
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#define OSC_DIV_ERPS_SHIFT 6 /* Bits 6-7: ERCLK prescaler */
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#define OSC_DIV_ERPS_MASK (3 << OSC_DIV_ERPS_SHIFT)
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# define OSC_DIV_ERPS_DIV1 (0 << OSC_DIV_ERPS_SHIFT) /* The divisor ratio is 1 */
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# define OSC_DIV_ERPS_DIV2 (1 << OSC_DIV_ERPS_SHIFT) /* The divisor ratio is 2 */
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# define OSC_DIV_ERPS_DIV3 (2 << OSC_DIV_ERPS_SHIFT) /* The divisor ratio is 4 */
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# define OSC_DIV_ERPS_DIV8 (3 << OSC_DIV_ERPS_SHIFT) /* The divisor ratio is 8 */
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/********************************************************************************************
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* Public Types
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********************************************************************************************/
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