Add STM32G43XX Analog Comparator driver.
This commit is contained in:
Daniel P. Carvalho
Alan Carvalho de Assis
parent
76cdd5c329
commit
2a21c45e0a
@ -1933,6 +1933,7 @@ config STM32_STM32G4XXX
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select STM32_HAVE_DMAMUX
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select STM32_HAVE_DMAMUX
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select STM32_HAVE_IP_DBGMCU_V3
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select STM32_HAVE_IP_DBGMCU_V3
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select STM32_HAVE_IP_ADC_V2
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select STM32_HAVE_IP_ADC_V2
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select STM32_HAVE_IP_COMP_V2
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select STM32_HAVE_IP_DMA_V1
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select STM32_HAVE_IP_DMA_V1
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select STM32_HAVE_IP_I2C_V2
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select STM32_HAVE_IP_I2C_V2
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select STM32_HAVE_IP_TIMERS_V3
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select STM32_HAVE_IP_TIMERS_V3
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@ -2621,6 +2622,10 @@ config STM32_HAVE_IP_COMP_V1
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bool
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bool
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default n
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default n
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config STM32_HAVE_IP_COMP_V2
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bool
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default n
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# These are the peripheral selections proper
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# These are the peripheral selections proper
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config STM32_ADC1
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config STM32_ADC1
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@ -3352,7 +3357,7 @@ config STM32_PWM
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config STM32_COMP
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config STM32_COMP
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bool
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bool
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default n
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default n
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depends on STM32_STM32L15XX || STM32_STM32F33XX
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depends on STM32_STM32L15XX || STM32_STM32F33XX || STM32_STM32G4XXX
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config STM32_OPAMP
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config STM32_OPAMP
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bool
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bool
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@ -8505,6 +8510,403 @@ config STM32_ADC5_JEXTSEL
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endmenu
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endmenu
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menu "COMP Configuration"
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depends on STM32_COMP && STM32_HAVE_IP_COMP_V2
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config STM32_COMP1_OUT
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bool "COMP1 GPIO Output"
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depends on STM32_COMP1
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default n
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---help---
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Enables COMP1 output.
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config STM32_COMP1_INM
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int "COMP1 inverting input assignment"
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depends on STM32_COMP1
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range 0 7
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default 0
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---help---
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Selects COMP1 inverting input pin.
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config STM32_COMP1_INP
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int "COMP1 non-inverting input assignment"
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depends on STM32_COMP1
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range 0 1
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default 0
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---help---
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Selects COMP1 non-inverting input pin.
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config STM32_COMP1_POL
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int "COMP1 polarity"
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depends on STM32_COMP1
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range 0 1
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default 0
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---help---
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Selects COMP1 output polarity.
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config STM32_COMP1_HYST
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int "COMP1 hysteresis"
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depends on STM32_STM32G4XXX && STM32_COMP1
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range 0 7
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default 0
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---help---
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Selects the hysteresis of the COMP1.
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config STM32_COMP1_BLANKSEL
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int "COMP1 blanking signal select"
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depends on STM32_COMP1
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range 0 7
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default 0
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---help---
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Selects the blanking signal for comparator COMP1.
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config STM32_COMP1_LOCK
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int "COMP1 COMP_CxCSR register lock"
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depends on STM32_COMP1
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range 0 1
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default 0
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---help---
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Locks COMP_CxCSR register.
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0 - Unlock 1 - Lock
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config STM32_COMP2_OUT
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bool "COMP2 GPIO Output"
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depends on STM32_COMP2
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default n
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---help---
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Enables COMP2 output.
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config STM32_COMP2_INM
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int "COMP2 inverting input assignment"
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depends on STM32_COMP2
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range 0 7
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default 0
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---help---
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Selects COMP2 inverting input pin.
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config STM32_COMP2_INP
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int "COMP2 non-inverting input assignment"
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depends on STM32_COMP2
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range 0 1
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default 0
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---help---
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Selects COMP2 non-inverting input pin.
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config STM32_COMP2_POL
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int "COMP2 polarity"
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depends on STM32_COMP2
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range 0 1
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default 0
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---help---
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Selects COMP2 output polarity.
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config STM32_COMP2_HYST
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int "COMP2 hysteresis"
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depends on STM32_STM32G4XXX && STM32_COMP2
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range 0 7
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default 0
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---help---
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Selects the hysteresis of the COMP2.
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config STM32_COMP2_BLANKSEL
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int "COMP2 blanking signal select"
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depends on STM32_COMP2
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range 0 7
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default 0
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---help---
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Selects the blanking signal for comparator COMP2.
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config STM32_COMP2_LOCK
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int "COMP2 COMP_CxCSR register lock"
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depends on STM32_COMP2
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range 0 1
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default 0
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---help---
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Locks COMP_CxCSR register.
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0 - Unlock 1 - Lock
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config STM32_COMP3_OUT
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bool "COMP3 GPIO Output"
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depends on STM32_COMP3
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default n
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---help---
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Enables COMP3 output.
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config STM32_COMP3_INM
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int "COMP3 inverting input assignment"
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depends on STM32_COMP3
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range 0 7
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default 0
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---help---
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Selects COMP3 inverting input pin.
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config STM32_COMP3_INP
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int "COMP3 non-inverting input assignment"
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depends on STM32_COMP3
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range 0 1
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default 0
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---help---
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Selects COMP3 non-inverting input pin.
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config STM32_COMP3_POL
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int "COMP3 polarity"
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depends on STM32_COMP3
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range 0 1
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default 0
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---help---
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Selects COMP3 output polarity.
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config STM32_COMP3_HYST
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int "COMP3 hysteresis"
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depends on STM32_STM32G4XXX && STM32_COMP3
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range 0 7
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default 0
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---help---
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Selects the hysteresis of the COMP3.
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config STM32_COMP3_BLANKSEL
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int "COMP3 blanking signal select"
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depends on STM32_COMP3
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range 0 7
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default 0
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---help---
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Selects the blanking signal for comparator COMP3.
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config STM32_COMP3_LOCK
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int "COMP3 COMP_CxCSR register lock"
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depends on STM32_COMP3
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range 0 1
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default 0
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---help---
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Locks COMP_CxCSR register.
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0 - Unlock 1 - Lock
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config STM32_COMP4_OUT
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bool "COMP4 GPIO Output"
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depends on STM32_COMP4
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default n
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---help---
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Enables COMP4 output.
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config STM32_COMP4_INM
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int "COMP4 inverting input assignment"
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depends on STM32_COMP4
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range 0 7
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default 0
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---help---
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Selects COMP4 inverting input pin.
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config STM32_COMP4_INP
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int "COMP4 non-inverting input assignment"
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depends on STM32_COMP4
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range 0 1
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default 0
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---help---
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Selects COMP4 non-inverting input pin.
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config STM32_COMP4_POL
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int "COMP4 polarity"
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depends on STM32_COMP4
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range 0 1
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default 0
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---help---
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Selects COMP4 output polarity.
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config STM32_COMP4_HYST
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int "COMP4 hysteresis"
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depends on STM32_STM32G4XXX && STM32_COMP4
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range 0 7
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default 0
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---help---
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Selects the hysteresis of the COMP4.
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config STM32_COMP4_BLANKSEL
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int "COMP4 blanking signal select"
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depends on STM32_COMP4
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range 0 7
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default 0
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---help---
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Selects the blanking signal for comparator COMP4.
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config STM32_COMP4_LOCK
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int "COMP4 COMP_CxCSR register lock"
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depends on STM32_COMP4
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range 0 1
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default 0
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---help---
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Locks COMP_CxCSR register.
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0 - Unlock 1 - Lock
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config STM32_COMP5_OUT
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bool "COMP5 GPIO Output"
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depends on STM32_COMP5
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default n
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---help---
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Enables COMP5 output.
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config STM32_COMP5_INM
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int "COMP5 inverting input assignment"
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depends on STM32_COMP5
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range 0 7
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default 0
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---help---
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Selects COMP5 inverting input pin.
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config STM32_COMP5_INP
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int "COMP5 non-inverting input assignment"
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depends on STM32_COMP5
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range 0 1
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default 0
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---help---
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Selects COMP5 non-inverting input pin.
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config STM32_COMP5_POL
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int "COMP5 polarity"
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depends on STM32_COMP5
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range 0 1
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default 0
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---help---
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Selects COMP5 output polarity.
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config STM32_COMP5_HYST
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int "COMP5 hysteresis"
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depends on STM32_STM32G4XXX && STM32_COMP5
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range 0 7
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default 0
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---help---
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Selects the hysteresis of the COMP5.
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config STM32_COMP5_BLANKSEL
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int "COMP5 blanking signal select"
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depends on STM32_COMP5
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range 0 7
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default 0
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---help---
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Selects the blanking signal for comparator COMP5.
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config STM32_COMP5_LOCK
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int "COMP5 COMP_CxCSR register lock"
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depends on STM32_COMP5
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range 0 1
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default 0
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---help---
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Locks COMP_CxCSR register.
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0 - Unlock 1 - Lock
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config STM32_COMP6_OUT
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bool "COMP6 GPIO Output"
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depends on STM32_COMP6
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default n
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---help---
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Enables COMP6 output.
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config STM32_COMP6_INM
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int "COMP6 inverting input assignment"
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depends on STM32_COMP6
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range 0 7
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default 0
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---help---
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Selects COMP6 inverting input pin.
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config STM32_COMP6_INP
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int "COMP6 non-inverting input assignment"
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depends on STM32_COMP6
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range 0 1
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default 0
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---help---
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Selects COMP6 non-inverting input pin.
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config STM32_COMP6_POL
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int "COMP6 polarity"
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depends on STM32_COMP6
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range 0 1
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default 0
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---help---
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Selects COMP6 output polarity.
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config STM32_COMP6_HYST
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int "COMP6 hysteresis"
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depends on STM32_STM32G4XXX && STM32_COMP6
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range 0 7
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default 0
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---help---
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Selects the hysteresis of the COMP6.
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config STM32_COMP6_BLANKSEL
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int "COMP6 blanking signal select"
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depends on STM32_COMP6
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range 0 7
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default 0
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---help---
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Selects the blanking signal for comparator COMP6.
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config STM32_COMP6_LOCK
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int "COMP6 COMP_CxCSR register lock"
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depends on STM32_COMP6
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range 0 1
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default 0
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---help---
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Locks COMP_CxCSR register.
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0 - Unlock 1 - Lock
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config STM32_COMP7_OUT
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bool "COMP7 GPIO Output"
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depends on STM32_COMP7
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default n
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---help---
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Enables COMP7 output.
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config STM32_COMP7_INM
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int "COMP7 inverting input assignment"
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depends on STM32_COMP7
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range 0 7
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default 0
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---help---
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Selects COMP7 inverting input pin.
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config STM32_COMP7_INP
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int "COMP7 non-inverting input assignment"
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depends on STM32_COMP7
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range 0 1
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default 0
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---help---
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Selects COMP7 non-inverting input pin.
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config STM32_COMP7_POL
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int "COMP7 polarity"
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depends on STM32_COMP7
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range 0 1
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default 0
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---help---
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Selects COMP7 output polarity.
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config STM32_COMP7_HYST
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int "COMP7 hysteresis"
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depends on STM32_STM32G4XXX && STM32_COMP7
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range 0 7
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default 0
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---help---
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Selects the hysteresis of the COMP7.
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config STM32_COMP7_BLANKSEL
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int "COMP7 blanking signal select"
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depends on STM32_COMP7
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range 0 7
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default 0
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---help---
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Selects the blanking signal for comparator COMP7.
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config STM32_COMP7_LOCK
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int "COMP7 COMP_CxCSR register lock"
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depends on STM32_COMP7
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range 0 1
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default 0
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---help---
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Locks COMP_CxCSR register.
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0 - Unlock 1 - Lock
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endmenu
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menu "SDADC Configuration"
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menu "SDADC Configuration"
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depends on STM32_SDADC
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depends on STM32_SDADC
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|
|||||||
@ -43,6 +43,12 @@
|
|||||||
# else
|
# else
|
||||||
# error "Device not supported."
|
# error "Device not supported."
|
||||||
# endif
|
# endif
|
||||||
|
#elif defined(CONFIG_STM32_HAVE_IP_COMP_V2)
|
||||||
|
# if defined(CONFIG_STM32_STM32G4XXX)
|
||||||
|
# include "stm32g4xxxx_comp.h"
|
||||||
|
# else
|
||||||
|
# error "Device not supported."
|
||||||
|
# endif
|
||||||
#else
|
#else
|
||||||
# error "STM32 COMP IP not supported."
|
# error "STM32 COMP IP not supported."
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -65,6 +65,8 @@
|
|||||||
|
|
||||||
/* COMP - Comparator ********************************************************/
|
/* COMP - Comparator ********************************************************/
|
||||||
|
|
||||||
|
/* Comparator Outputs */
|
||||||
|
|
||||||
#define GPIO_COMP1_OUT_1 (GPIO_ALT | GPIO_AF8 | GPIO_PORTA | GPIO_PIN0)
|
#define GPIO_COMP1_OUT_1 (GPIO_ALT | GPIO_AF8 | GPIO_PORTA | GPIO_PIN0)
|
||||||
#define GPIO_COMP1_OUT_2 (GPIO_ALT | GPIO_AF8 | GPIO_PORTA | GPIO_PIN6)
|
#define GPIO_COMP1_OUT_2 (GPIO_ALT | GPIO_AF8 | GPIO_PORTA | GPIO_PIN6)
|
||||||
#define GPIO_COMP1_OUT_3 (GPIO_ALT | GPIO_AF8 | GPIO_PORTA | GPIO_PIN11)
|
#define GPIO_COMP1_OUT_3 (GPIO_ALT | GPIO_AF8 | GPIO_PORTA | GPIO_PIN11)
|
||||||
@ -74,9 +76,25 @@
|
|||||||
#define GPIO_COMP2_OUT_2 (GPIO_ALT | GPIO_AF8 | GPIO_PORTA | GPIO_PIN7)
|
#define GPIO_COMP2_OUT_2 (GPIO_ALT | GPIO_AF8 | GPIO_PORTA | GPIO_PIN7)
|
||||||
#define GPIO_COMP2_OUT_3 (GPIO_ALT | GPIO_AF8 | GPIO_PORTA | GPIO_PIN12)
|
#define GPIO_COMP2_OUT_3 (GPIO_ALT | GPIO_AF8 | GPIO_PORTA | GPIO_PIN12)
|
||||||
|
|
||||||
#define GPIO_COMP3_OUT (GPIO_ALT | GPIO_AF8 | GPIO_PORTB | GPIO_PIN7)
|
#define GPIO_COMP3_OUT_1 (GPIO_ALT | GPIO_AF8 | GPIO_PORTB | GPIO_PIN7)
|
||||||
|
|
||||||
#define GPIO_COMP4_OUT (GPIO_ALT | GPIO_AF8 | GPIO_PORTB | GPIO_PIN6)
|
#define GPIO_COMP4_OUT_2 (GPIO_ALT | GPIO_AF8 | GPIO_PORTB | GPIO_PIN6)
|
||||||
|
|
||||||
|
/* Comparator Inputs non inverting */
|
||||||
|
|
||||||
|
#define GPIO_COMP1_INP_1 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN1)
|
||||||
|
#define GPIO_COMP1_INP_2 (GPIO_ANALOG | GPIO_PORTB | GPIO_PIN1)
|
||||||
|
|
||||||
|
#define GPIO_COMP2_INP_1 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN3)
|
||||||
|
#define GPIO_COMP2_INP_2 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN7)
|
||||||
|
|
||||||
|
/* Comparator Inputs non inverting */
|
||||||
|
|
||||||
|
#define GPIO_COMP1_INM_1 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN4)
|
||||||
|
#define GPIO_COMP1_INM_2 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN0)
|
||||||
|
|
||||||
|
#define GPIO_COMP2_INM_1 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN2)
|
||||||
|
#define GPIO_COMP2_INM_2 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN5)
|
||||||
|
|
||||||
/* DAC **********************************************************************/
|
/* DAC **********************************************************************/
|
||||||
|
|
||||||
|
|||||||
167
arch/arm/src/stm32/hardware/stm32g4xxxx_comp.h
Normal file
167
arch/arm/src/stm32/hardware/stm32g4xxxx_comp.h
Normal file
@ -0,0 +1,167 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* arch/arm/src/stm32/hardware/stm32g4xxxx_comp.h
|
||||||
|
*
|
||||||
|
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||||
|
* contributor license agreements. See the NOTICE file distributed with
|
||||||
|
* this work for additional information regarding copyright ownership. The
|
||||||
|
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||||
|
* "License"); you may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at
|
||||||
|
*
|
||||||
|
* http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
*
|
||||||
|
* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||||
|
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||||
|
* License for the specific language governing permissions and limitations
|
||||||
|
* under the License.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_COMP_H
|
||||||
|
#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_COMP_H
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
#include "chip.h"
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Pre-processor Definitions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/* Register Addresses *******************************************************/
|
||||||
|
|
||||||
|
#define STM32_COMP1_CSR STM32_COMP1_BASE
|
||||||
|
#define STM32_COMP2_CSR STM32_COMP2_BASE
|
||||||
|
#define STM32_COMP3_CSR STM32_COMP3_BASE
|
||||||
|
#define STM32_COMP4_CSR STM32_COMP4_BASE
|
||||||
|
#define STM32_COMP5_CSR STM32_COMP5_BASE
|
||||||
|
#define STM32_COMP6_CSR STM32_COMP6_BASE
|
||||||
|
#define STM32_COMP7_CSR STM32_COMP7_BASE
|
||||||
|
|
||||||
|
/* Register Bitfield Definitions ********************************************/
|
||||||
|
|
||||||
|
/* COMP control and status register */
|
||||||
|
|
||||||
|
#define COMP_CSR_COMPEN (1 << 0) /* Bit 0: Comparator enable */
|
||||||
|
/* Bits 3-1: Reserved */
|
||||||
|
#define COMP_CSR_INMSEL_SHIFT (4) /* Bits 7-4: Comparator inverting input selection */
|
||||||
|
#define COMP_CSR_INMSEL_MASK (15 << COMP_CSR_INMSEL_SHIFT)
|
||||||
|
# define COMP_CSR_INMSEL_1P4VREF (0 << COMP_CSR_INMSEL_SHIFT) /* 0000: 1/4 of Vrefint */
|
||||||
|
# define COMP_CSR_INMSEL_1P2VREF (1 << COMP_CSR_INMSEL_SHIFT) /* 0001: 1/2 of Vrefint */
|
||||||
|
# define COMP_CSR_INMSEL_3P4VREF (2 << COMP_CSR_INMSEL_SHIFT) /* 0010: 3/4 of Vrefint */
|
||||||
|
# define COMP_CSR_INMSEL_VREF (3 << COMP_CSR_INMSEL_SHIFT) /* 0011: Vrefint */
|
||||||
|
# define COMP_CSR_INMSEL_DAC3CH1 (4 << COMP_CSR_INMSEL_SHIFT) /* 0100: DAC3_CH1 (COMP1 and COMP3 only) */
|
||||||
|
# define COMP_CSR_INMSEL_DAC3CH2 (4 << COMP_CSR_INMSEL_SHIFT) /* 0100: DAC3_CH2 (COMP2 and COMP4 only) */
|
||||||
|
# define COMP_CSR_INMSEL_DAC4CH1 (4 << COMP_CSR_INMSEL_SHIFT) /* 0100: DAC4_CH1 (COMP5 and COMP7 only) */
|
||||||
|
# define COMP_CSR_INMSEL_DAC4CH2 (4 << COMP_CSR_INMSEL_SHIFT) /* 0100: DAC4_CH2 (COMP6 only) */
|
||||||
|
# define COMP_CSR_INMSEL_DAC1CH1 (5 << COMP_CSR_INMSEL_SHIFT) /* 0101: DAC1_CH1 (COMP1, COMP3 and COMP4 only) */
|
||||||
|
# define COMP_CSR_INMSEL_DAC1CH2 (5 << COMP_CSR_INMSEL_SHIFT) /* 0101: DAC1_CH2 (COMP2 and COMP5 only) */
|
||||||
|
# define COMP_CSR_INMSEL_DAC2CH1 (5 << COMP_CSR_INMSEL_SHIFT) /* 0101: DAC2_CH1 (COMP6 and COMP7 only) */
|
||||||
|
# define COMP_CSR_INMSEL_PA4 (6 << COMP_CSR_INMSEL_SHIFT) /* 0110: PA4 (COMP1 only) */
|
||||||
|
# define COMP_CSR_INMSEL_PA5 (6 << COMP_CSR_INMSEL_SHIFT) /* 0110: PA5 (COMP2 only) */
|
||||||
|
# define COMP_CSR_INMSEL_PF1 (6 << COMP_CSR_INMSEL_SHIFT) /* 0110: PF1 (COMP3 only) */
|
||||||
|
# define COMP_CSR_INMSEL_PE8 (6 << COMP_CSR_INMSEL_SHIFT) /* 0110: PE8 (COMP4 only) */
|
||||||
|
# define COMP_CSR_INMSEL_PB10 (6 << COMP_CSR_INMSEL_SHIFT) /* 0110: PB10 (COMP5 only) */
|
||||||
|
# define COMP_CSR_INMSEL_PD10 (6 << COMP_CSR_INMSEL_SHIFT) /* 0110: PD10 (COMP6 only) */
|
||||||
|
# define COMP_CSR_INMSEL_PD15 (6 << COMP_CSR_INMSEL_SHIFT) /* 0110: PD15 (COMP7 only) */
|
||||||
|
# define COMP_CSR_INMSEL_PA0 (7 << COMP_CSR_INMSEL_SHIFT) /* 0111: PA0 (COMP1 only) */
|
||||||
|
# define COMP_CSR_INMSEL_PA2 (7 << COMP_CSR_INMSEL_SHIFT) /* 0111: PA2 (COMP2 only) */
|
||||||
|
# define COMP_CSR_INMSEL_PC0 (7 << COMP_CSR_INMSEL_SHIFT) /* 0111: PC0 (COMP3 only) */
|
||||||
|
# define COMP_CSR_INMSEL_PB2 (7 << COMP_CSR_INMSEL_SHIFT) /* 0111: PB2 (COMP4 only) */
|
||||||
|
# define COMP_CSR_INMSEL_PD13 (7 << COMP_CSR_INMSEL_SHIFT) /* 0111: PD13 (COMP5 only) */
|
||||||
|
# define COMP_CSR_INMSEL_PB15 (7 << COMP_CSR_INMSEL_SHIFT) /* 0111: PB15 (COMP6 only) */
|
||||||
|
# define COMP_CSR_INMSEL_PB12 (7 << COMP_CSR_INMSEL_SHIFT) /* 0111: PB12 (COMP7 only) */
|
||||||
|
|
||||||
|
#define COMP_CSR_INPSEL_SHIFT (8) /* Bit 8: Comparator non-inverting input selection */
|
||||||
|
# define COMP_CSR_INPSEL_PA1 (0 << COMP_CSR_INPSEL_SHIFT) /* PA1 (COMP1 only) */
|
||||||
|
# define COMP_CSR_INPSEL_PB1 (1 << COMP_CSR_INPSEL_SHIFT) /* PB1 (COMP1 only) */
|
||||||
|
# define COMP_CSR_INPSEL_PA7 (0 << COMP_CSR_INPSEL_SHIFT) /* PA7 (COMP2 only) */
|
||||||
|
# define COMP_CSR_INPSEL_PA3 (1 << COMP_CSR_INPSEL_SHIFT) /* PA3 (COMP2 only) */
|
||||||
|
# define COMP_CSR_INPSEL_PA0 (0 << COMP_CSR_INPSEL_SHIFT) /* PA0 (COMP3 only) */
|
||||||
|
# define COMP_CSR_INPSEL_PC1 (1 << COMP_CSR_INPSEL_SHIFT) /* PC1 (COMP3 only) */
|
||||||
|
# define COMP_CSR_INPSEL_PB0 (0 << COMP_CSR_INPSEL_SHIFT) /* PB0 (COMP4 only) */
|
||||||
|
# define COMP_CSR_INPSEL_PE7 (1 << COMP_CSR_INPSEL_SHIFT) /* PE7 (COMP4 only) */
|
||||||
|
# define COMP_CSR_INPSEL_PB13 (0 << COMP_CSR_INPSEL_SHIFT) /* PB13 (COMP5 only) */
|
||||||
|
# define COMP_CSR_INPSEL_PD12 (1 << COMP_CSR_INPSEL_SHIFT) /* PD12 (COMP5 only) */
|
||||||
|
# define COMP_CSR_INPSEL_PB11 (0 << COMP_CSR_INPSEL_SHIFT) /* PB11 (COMP6 only) */
|
||||||
|
# define COMP_CSR_INPSEL_PD11 (1 << COMP_CSR_INPSEL_SHIFT) /* PD11 (COMP6 only) */
|
||||||
|
# define COMP_CSR_INPSEL_PB14 (0 << COMP_CSR_INPSEL_SHIFT) /* PB14 (COMP7 only) */
|
||||||
|
# define COMP_CSR_INPSEL_PD14 (1 << COMP_CSR_INPSEL_SHIFT) /* PD14 (COMP7 only) */
|
||||||
|
/* Bits 14-9: Reserved */
|
||||||
|
#define COMP_CSR_POL (1 << 15) /* Bit 15: comparator output polarity */
|
||||||
|
|
||||||
|
#define COMP_CSR_HYST_SHIFT (16) /* Bits 18-16: Comparator hysteresis */
|
||||||
|
#define COMP_CSR_HYST_MASK (7 << COMP_CSR_HYST_SHIFT)
|
||||||
|
# define COMP_CSR_HYST_0MV (0 << COMP_CSR_HYST_SHIFT) /* No hysteresis */
|
||||||
|
# define COMP_CSR_HYST_10MV (1 << COMP_CSR_HYST_SHIFT) /* 10mV hysteresis */
|
||||||
|
# define COMP_CSR_HYST_20MV (2 << COMP_CSR_HYST_SHIFT) /* 20mV hysteresis */
|
||||||
|
# define COMP_CSR_HYST_30MV (3 << COMP_CSR_HYST_SHIFT) /* 30mV hysteresis */
|
||||||
|
# define COMP_CSR_HYST_40MV (4 << COMP_CSR_HYST_SHIFT) /* 40mV hysteresis */
|
||||||
|
# define COMP_CSR_HYST_50MV (5 << COMP_CSR_HYST_SHIFT) /* 50mV hysteresis */
|
||||||
|
# define COMP_CSR_HYST_60MV (6 << COMP_CSR_HYST_SHIFT) /* 60mV hysteresis */
|
||||||
|
# define COMP_CSR_HYST_70MV (7 << COMP_CSR_HYST_SHIFT) /* 70mV hysteresis */
|
||||||
|
|
||||||
|
#define COMP_CSR_BLANKING_SHIFT (19) /* Bit 21-19: Comparator blanking signal select */
|
||||||
|
#define COMP_CSR_BLANKING_MASK (7 << COMP_CSR_BLANKING_SHIFT)
|
||||||
|
# define COMP_CSR_BLANKING_DIS (0 << COMP_CSR_BLANKING_SHIFT) /* 000: No blanking */
|
||||||
|
# define COMP1_CSR_BLANKING_T1OC5 (1 << COMP_CSR_BLANKING_SHIFT) /* 001: TIM1_OC5 */
|
||||||
|
# define COMP2_CSR_BLANKING_T1OC5 (1 << COMP_CSR_BLANKING_SHIFT) /* 001: TIM1_OC5 */
|
||||||
|
# define COMP3_CSR_BLANKING_T1OC5 (1 << COMP_CSR_BLANKING_SHIFT) /* 001: TIM1_OC5 */
|
||||||
|
# define COMP4_CSR_BLANKING_T3OC4 (1 << COMP_CSR_BLANKING_SHIFT) /* 001: TIM3_OC4 */
|
||||||
|
# define COMP5_CSR_BLANKING_T2OC3 (1 << COMP_CSR_BLANKING_SHIFT) /* 001: TIM2_OC3 */
|
||||||
|
# define COMP6_CSR_BLANKING_T8OC5 (1 << COMP_CSR_BLANKING_SHIFT) /* 001: TIM8_OC5 */
|
||||||
|
# define COMP7_CSR_BLANKING_T1OC5 (1 << COMP_CSR_BLANKING_SHIFT) /* 001: TIM1_OC5 */
|
||||||
|
# define COMP1_CSR_BLANKING_T2OC3 (2 << COMP_CSR_BLANKING_SHIFT) /* 010: TIM2_OC3 */
|
||||||
|
# define COMP2_CSR_BLANKING_T2OC3 (2 << COMP_CSR_BLANKING_SHIFT) /* 010: TIM2_OC3 */
|
||||||
|
# define COMP3_CSR_BLANKING_T3OC3 (2 << COMP_CSR_BLANKING_SHIFT) /* 010: TIM3_OC3 */
|
||||||
|
# define COMP4_CSR_BLANKING_T8OC5 (2 << COMP_CSR_BLANKING_SHIFT) /* 010: TIM8_OC5 */
|
||||||
|
# define COMP5_CSR_BLANKING_T8OC5 (2 << COMP_CSR_BLANKING_SHIFT) /* 010: TIM8_OC5 */
|
||||||
|
# define COMP6_CSR_BLANKING_T2OC4 (2 << COMP_CSR_BLANKING_SHIFT) /* 010: TIM2_OC4 */
|
||||||
|
# define COMP7_CSR_BLANKING_T8OC5 (2 << COMP_CSR_BLANKING_SHIFT) /* 010: TIM8_OC5 */
|
||||||
|
# define COMP1_CSR_BLANKING_T3OC3 (3 << COMP_CSR_BLANKING_SHIFT) /* 011: TIM3_OC3 */
|
||||||
|
# define COMP2_CSR_BLANKING_T3OC3 (3 << COMP_CSR_BLANKING_SHIFT) /* 011: TIM3_OC3 */
|
||||||
|
# define COMP3_CSR_BLANKING_T2OC4 (3 << COMP_CSR_BLANKING_SHIFT) /* 011: TIM2_OC4 */
|
||||||
|
# define COMP4_CSR_BLANKING_T15OC1 (3 << COMP_CSR_BLANKING_SHIFT) /* 011 or 110: TIM15_OC1 */
|
||||||
|
# define COMP5_CSR_BLANKING_T3OC3 (3 << COMP_CSR_BLANKING_SHIFT) /* 011: TIM3_OC3 */
|
||||||
|
# define COMP6_CSR_BLANKING_T15OC2 (3 << COMP_CSR_BLANKING_SHIFT) /* 011: TIM15_OC2 */
|
||||||
|
# define COMP7_CSR_BLANKING_T3OC3 (3 << COMP_CSR_BLANKING_SHIFT) /* 011: TIM3_OC3 */
|
||||||
|
# define COMP1_CSR_BLANKING_T8OC5 (4 << COMP_CSR_BLANKING_SHIFT) /* 100: TIM8_OC5 */
|
||||||
|
# define COMP2_CSR_BLANKING_T8OC5 (4 << COMP_CSR_BLANKING_SHIFT) /* 100: TIM8_OC5 */
|
||||||
|
# define COMP3_CSR_BLANKING_T8OC5 (4 << COMP_CSR_BLANKING_SHIFT) /* 100: TIM8_OC5 */
|
||||||
|
# define COMP4_CSR_BLANKING_T1OC5 (4 << COMP_CSR_BLANKING_SHIFT) /* 100: TIM1_OC5 */
|
||||||
|
# define COMP5_CSR_BLANKING_T1OC5 (4 << COMP_CSR_BLANKING_SHIFT) /* 100: TIM1_OC5 */
|
||||||
|
# define COMP6_CSR_BLANKING_T1OC5 (4 << COMP_CSR_BLANKING_SHIFT) /* 100: TIM1_OC5 */
|
||||||
|
# define COMP7_CSR_BLANKING_T15OC2 (4 << COMP_CSR_BLANKING_SHIFT) /* 100: TIM15_OC2 */
|
||||||
|
# define COMP1_CSR_BLANKING_T20OC5 (5 << COMP_CSR_BLANKING_SHIFT) /* 101: TIM20_OC5 */
|
||||||
|
# define COMP2_CSR_BLANKING_T20OC5 (5 << COMP_CSR_BLANKING_SHIFT) /* 101: TIM20_OC5 */
|
||||||
|
# define COMP3_CSR_BLANKING_T20OC5 (5 << COMP_CSR_BLANKING_SHIFT) /* 101: TIM20_OC5 */
|
||||||
|
# define COMP4_CSR_BLANKING_T20OC5 (5 << COMP_CSR_BLANKING_SHIFT) /* 101: TIM20_OC5 */
|
||||||
|
# define COMP5_CSR_BLANKING_T20OC5 (5 << COMP_CSR_BLANKING_SHIFT) /* 101: TIM20_OC5 */
|
||||||
|
# define COMP6_CSR_BLANKING_T20OC5 (5 << COMP_CSR_BLANKING_SHIFT) /* 101: TIM20_OC5 */
|
||||||
|
# define COMP7_CSR_BLANKING_T20OC5 (5 << COMP_CSR_BLANKING_SHIFT) /* 101: TIM20_OC5 */
|
||||||
|
# define COMP1_CSR_BLANKING_T15OC1 (6 << COMP_CSR_BLANKING_SHIFT) /* 110: TIM15_OC1 */
|
||||||
|
# define COMP2_CSR_BLANKING_T15OC1 (6 << COMP_CSR_BLANKING_SHIFT) /* 110: TIM15_OC1 */
|
||||||
|
# define COMP3_CSR_BLANKING_T15OC1 (6 << COMP_CSR_BLANKING_SHIFT) /* 110: TIM15_OC1 */
|
||||||
|
# define COMP5_CSR_BLANKING_T15OC1 (6 << COMP_CSR_BLANKING_SHIFT) /* 110: TIM15_OC1 */
|
||||||
|
# define COMP6_CSR_BLANKING_T15OC1 (6 << COMP_CSR_BLANKING_SHIFT) /* 110: TIM15_OC1 */
|
||||||
|
# define COMP7_CSR_BLANKING_T15OC1 (6 << COMP_CSR_BLANKING_SHIFT) /* 110: TIM15_OC1 */
|
||||||
|
# define COMP1_CSR_BLANKING_T4OC3 (6 << COMP_CSR_BLANKING_SHIFT) /* 111: TIM4_OC3 */
|
||||||
|
# define COMP2_CSR_BLANKING_T4OC3 (6 << COMP_CSR_BLANKING_SHIFT) /* 111: TIM4_OC3 */
|
||||||
|
# define COMP3_CSR_BLANKING_T4OC3 (6 << COMP_CSR_BLANKING_SHIFT) /* 111: TIM4_OC3 */
|
||||||
|
# define COMP4_CSR_BLANKING_T4OC3 (6 << COMP_CSR_BLANKING_SHIFT) /* 111: TIM4_OC3 */
|
||||||
|
# define COMP5_CSR_BLANKING_T4OC3 (6 << COMP_CSR_BLANKING_SHIFT) /* 111: TIM4_OC3 */
|
||||||
|
# define COMP6_CSR_BLANKING_T4OC3 (6 << COMP_CSR_BLANKING_SHIFT) /* 111: TIM4_OC3 */
|
||||||
|
# define COMP7_CSR_BLANKING_T4OC3 (6 << COMP_CSR_BLANKING_SHIFT) /* 111: TIM4_OC3 */
|
||||||
|
|
||||||
|
#define COMP_CSR_BRGEN (1 << 22) /* Bit 22: Scaler resistor bridge enable */
|
||||||
|
#define COMP_CSR_SCALEN (1 << 23) /* Bit 22: scaler enable */
|
||||||
|
/* Bits 29-24: Reserved */
|
||||||
|
#define COMP_CSR_VALUE (1 << 30) /* Bit 30: Comparator output status */
|
||||||
|
#define COMP_CSR_LOCK (1 << 31) /* Bit 31: Register lock */
|
||||||
|
|
||||||
|
#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_COMP_H */
|
||||||
@ -24,7 +24,19 @@
|
|||||||
|
|
||||||
#include <nuttx/config.h>
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <errno.h>
|
||||||
|
#include <assert.h>
|
||||||
|
#include <debug.h>
|
||||||
|
|
||||||
|
#include <arch/board/board.h>
|
||||||
|
#include <nuttx/analog/comp.h>
|
||||||
|
#include <nuttx/analog/ioctl.h>
|
||||||
|
|
||||||
|
#include "arm_arch.h"
|
||||||
#include "chip.h"
|
#include "chip.h"
|
||||||
|
#include "stm32_comp.h"
|
||||||
|
#include "stm32_gpio.h"
|
||||||
|
|
||||||
/* This file is only a thin shell that includes the correct COMP
|
/* This file is only a thin shell that includes the correct COMP
|
||||||
* implementation. At this moment only STM32 COMP IP version 1 device is
|
* implementation. At this moment only STM32 COMP IP version 1 device is
|
||||||
@ -34,6 +46,8 @@
|
|||||||
|
|
||||||
#if defined(CONFIG_STM32_HAVE_IP_COMP_V1)
|
#if defined(CONFIG_STM32_HAVE_IP_COMP_V1)
|
||||||
# include "stm32_comp_v1.c"
|
# include "stm32_comp_v1.c"
|
||||||
|
#elif defined(CONFIG_STM32_HAVE_IP_COMP_V2)
|
||||||
|
# include "stm32_comp_v2.c"
|
||||||
#else
|
#else
|
||||||
# error "STM32 COMP IP version not supported."
|
# error "STM32 COMP IP version not supported."
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -31,128 +31,20 @@
|
|||||||
|
|
||||||
#include "hardware/stm32_comp.h"
|
#include "hardware/stm32_comp.h"
|
||||||
|
|
||||||
#ifdef CONFIG_STM32_COMP
|
#if defined(CONFIG_STM32_HAVE_IP_COMP_V1)
|
||||||
|
# include "stm32_comp_v1.h"
|
||||||
|
#elif defined(CONFIG_STM32_HAVE_IP_COMP_V2)
|
||||||
|
# include "stm32_comp_v2.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Pre-processor definitions
|
* Pre-processor definitions
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
#define COMP_BLANKING_DEFAULT COMP_BLANKING_DIS /* No blanking */
|
|
||||||
#define COMP_POL_DEFAULT COMP_POL_NONINVERT /* Output is not inverted */
|
|
||||||
#define COMP_INM_DEFAULT COMP_INMSEL_1P4VREF /* 1/4 of Vrefint as INM */
|
|
||||||
#define COMP_OUTSEL_DEFAULT COMP_OUTSEL_NOSEL /* Output not selected */
|
|
||||||
#define COMP_LOCK_DEFAULT COMP_LOCK_RW /* Do not lock CSR register */
|
|
||||||
|
|
||||||
#ifndef CONFIG_STM32_STM32F33XX
|
|
||||||
#define COMP_MODE_DEFAULT
|
|
||||||
#define COMP_HYST_DEFAULT
|
|
||||||
#define COMP_WINMODE_DEFAULT
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Public Types
|
* Public Types
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
/* Blanking source */
|
|
||||||
|
|
||||||
enum stm32_comp_blanking_e
|
|
||||||
{
|
|
||||||
COMP_BLANKING_DIS,
|
|
||||||
#if defined(CONFIG_STM32_STM32F33XX)
|
|
||||||
COMP_BLANKING_T1OC5,
|
|
||||||
COMP_BLANKING_T3OC4,
|
|
||||||
COMP_BLANKING_T2OC3,
|
|
||||||
COMP_BLANKING_T3OC3,
|
|
||||||
COMP_BLANKING_T15OC1,
|
|
||||||
COMP_BLANKING_T2OC4,
|
|
||||||
COMP_BLANKING_T15OC2,
|
|
||||||
#endif
|
|
||||||
};
|
|
||||||
|
|
||||||
/* Output polarisation */
|
|
||||||
|
|
||||||
enum stm32_comp_pol_e
|
|
||||||
{
|
|
||||||
COMP_POL_NONINVERT,
|
|
||||||
COMP_POL_INVERTED
|
|
||||||
};
|
|
||||||
|
|
||||||
/* Inverting input */
|
|
||||||
|
|
||||||
enum stm32_comp_inm_e
|
|
||||||
{
|
|
||||||
COMP_INMSEL_1P4VREF,
|
|
||||||
COMP_INMSEL_1P2VREF,
|
|
||||||
COMP_INMSEL_3P4VREF,
|
|
||||||
COMP_INMSEL_VREF,
|
|
||||||
COMP_INMSEL_DAC1CH1,
|
|
||||||
COMP_INMSEL_DAC1CH2,
|
|
||||||
COMP_INMSEL_PIN
|
|
||||||
};
|
|
||||||
|
|
||||||
/* Output selection */
|
|
||||||
|
|
||||||
enum stm32_comp_outsel_e
|
|
||||||
{
|
|
||||||
COMP_OUTSEL_NOSEL,
|
|
||||||
#if defined(CONFIG_STM32_STM32F33XX)
|
|
||||||
COMP_OUTSEL_BRKACTH,
|
|
||||||
COMP_OUTSEL_BRK2,
|
|
||||||
COMP_OUTSEL_T1OCC, /* COMP2 only */
|
|
||||||
COMP_OUTSEL_T3CAP3, /* COMP4 only */
|
|
||||||
COMP_OUTSEL_T2CAP2, /* COMP6 only */
|
|
||||||
COMP_OUTSEL_T1CAP1, /* COMP2 only */
|
|
||||||
COMP_OUTSEL_T2CAP4, /* COMP2 only */
|
|
||||||
COMP_OUTSEL_T15CAP2, /* COMP4 only */
|
|
||||||
COMP_OUTSEL_T2OCC, /* COMP6 only */
|
|
||||||
COMP_OUTSEL_T16OCC, /* COMP2 only */
|
|
||||||
COMP_OUTSEL_T3CAP1, /* COMP2 only */
|
|
||||||
COMP_OUTSEL_T15OCC, /* COMP4 only */
|
|
||||||
COMP_OUTSEL_T16CAP1, /* COMP6 only */
|
|
||||||
COMP_OUTSEL_T3OCC, /* COMP2 and COMP4 only */
|
|
||||||
#endif
|
|
||||||
};
|
|
||||||
|
|
||||||
/* CSR register lock state */
|
|
||||||
|
|
||||||
enum stm32_comp_lock_e
|
|
||||||
{
|
|
||||||
COMP_LOCK_RW,
|
|
||||||
COMP_LOCK_RO
|
|
||||||
};
|
|
||||||
|
|
||||||
#ifndef CONFIG_STM32_STM32F33XX
|
|
||||||
|
|
||||||
/* Hysteresis */
|
|
||||||
|
|
||||||
enum stm32_comp_hyst_e
|
|
||||||
{
|
|
||||||
COMP_HYST_DIS,
|
|
||||||
COMP_HYST_LOW,
|
|
||||||
COMP_HYST_MEDIUM,
|
|
||||||
COMP_HYST_HIGH
|
|
||||||
};
|
|
||||||
|
|
||||||
/* Power/Speed Modes */
|
|
||||||
|
|
||||||
enum stm32_comp_mode_e
|
|
||||||
{
|
|
||||||
COMP_MODE_HIGHSPEED,
|
|
||||||
COMP_MODE_MEDIUMSPEED,
|
|
||||||
COMP_MODE_LOWPOWER,
|
|
||||||
COMP_MODE_ULTRALOWPOWER
|
|
||||||
};
|
|
||||||
|
|
||||||
/* Window mode */
|
|
||||||
|
|
||||||
enum stm32_comp_winmode_e
|
|
||||||
{
|
|
||||||
COMP_WINMODE_DIS,
|
|
||||||
COMP_WINMODE_EN
|
|
||||||
};
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Public Function Prototypes
|
* Public Function Prototypes
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
@ -192,5 +84,4 @@ FAR struct comp_dev_s *stm32_compinitialize(int intf);
|
|||||||
#endif
|
#endif
|
||||||
#endif /* __ASSEMBLY__ */
|
#endif /* __ASSEMBLY__ */
|
||||||
|
|
||||||
#endif /* CONFIG_STM23_COMP */
|
|
||||||
#endif /* __ARCH_ARM_SRC_STM32_STM32_COMP_H */
|
#endif /* __ARCH_ARM_SRC_STM32_STM32_COMP_H */
|
||||||
@ -22,20 +22,9 @@
|
|||||||
* Included Files
|
* Included Files
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
#include <nuttx/config.h>
|
/****************************************************************************
|
||||||
|
* Pre-processor Definitions
|
||||||
#include <stdint.h>
|
****************************************************************************/
|
||||||
#include <errno.h>
|
|
||||||
#include <assert.h>
|
|
||||||
#include <debug.h>
|
|
||||||
|
|
||||||
#include <arch/board/board.h>
|
|
||||||
#include <nuttx/analog/comp.h>
|
|
||||||
#include <nuttx/analog/ioctl.h>
|
|
||||||
|
|
||||||
#include "chip.h"
|
|
||||||
#include "stm32_gpio.h"
|
|
||||||
#include "stm32_comp.h"
|
|
||||||
|
|
||||||
/* Some COMP peripheral must be enabled */
|
/* Some COMP peripheral must be enabled */
|
||||||
|
|
||||||
@ -68,10 +57,6 @@
|
|||||||
# endif
|
# endif
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/****************************************************************************
|
|
||||||
* Pre-processor Definitions
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
/* COMP2 default configuration **********************************************/
|
/* COMP2 default configuration **********************************************/
|
||||||
|
|
||||||
#ifdef CONFIG_STM32_COMP2
|
#ifdef CONFIG_STM32_COMP2
|
||||||
|
|||||||
151
arch/arm/src/stm32/stm32_comp_v1.h
Normal file
151
arch/arm/src/stm32/stm32_comp_v1.h
Normal file
@ -0,0 +1,151 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* arch/arm/src/stm32/stm32_comp_v1.h
|
||||||
|
*
|
||||||
|
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||||
|
* contributor license agreements. See the NOTICE file distributed with
|
||||||
|
* this work for additional information regarding copyright ownership. The
|
||||||
|
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||||
|
* "License"); you may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at
|
||||||
|
*
|
||||||
|
* http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
*
|
||||||
|
* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||||
|
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||||
|
* License for the specific language governing permissions and limitations
|
||||||
|
* under the License.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_SRC_STM32_STM32_COMP_V1_H
|
||||||
|
#define __ARCH_ARM_SRC_STM32_STM32_COMP_V1_H
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifdef CONFIG_STM32_COMP
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Pre-processor definitions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#define COMP_BLANKING_DEFAULT COMP_BLANKING_DIS /* No blanking */
|
||||||
|
#define COMP_POL_DEFAULT COMP_POL_NONINVERT /* Output is not inverted */
|
||||||
|
#define COMP_INM_DEFAULT COMP_INMSEL_1P4VREF /* 1/4 of Vrefint as INM */
|
||||||
|
#define COMP_OUTSEL_DEFAULT COMP_OUTSEL_NOSEL /* Output not selected */
|
||||||
|
#define COMP_LOCK_DEFAULT COMP_LOCK_RW /* Do not lock CSR register */
|
||||||
|
|
||||||
|
#ifndef CONFIG_STM32_STM32F33XX
|
||||||
|
#define COMP_MODE_DEFAULT
|
||||||
|
#define COMP_HYST_DEFAULT
|
||||||
|
#define COMP_WINMODE_DEFAULT
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Types
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/* Blanking source */
|
||||||
|
|
||||||
|
enum stm32_comp_blanking_e
|
||||||
|
{
|
||||||
|
COMP_BLANKING_DIS,
|
||||||
|
#if defined(CONFIG_STM32_STM32F33XX)
|
||||||
|
COMP_BLANKING_T1OC5,
|
||||||
|
COMP_BLANKING_T3OC4,
|
||||||
|
COMP_BLANKING_T2OC3,
|
||||||
|
COMP_BLANKING_T3OC3,
|
||||||
|
COMP_BLANKING_T15OC1,
|
||||||
|
COMP_BLANKING_T2OC4,
|
||||||
|
COMP_BLANKING_T15OC2,
|
||||||
|
#endif
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Output polarisation */
|
||||||
|
|
||||||
|
enum stm32_comp_pol_e
|
||||||
|
{
|
||||||
|
COMP_POL_NONINVERT,
|
||||||
|
COMP_POL_INVERTED
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Inverting input */
|
||||||
|
|
||||||
|
enum stm32_comp_inm_e
|
||||||
|
{
|
||||||
|
COMP_INMSEL_1P4VREF,
|
||||||
|
COMP_INMSEL_1P2VREF,
|
||||||
|
COMP_INMSEL_3P4VREF,
|
||||||
|
COMP_INMSEL_VREF,
|
||||||
|
COMP_INMSEL_DAC1CH1,
|
||||||
|
COMP_INMSEL_DAC1CH2,
|
||||||
|
COMP_INMSEL_PIN
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Output selection */
|
||||||
|
|
||||||
|
enum stm32_comp_outsel_e
|
||||||
|
{
|
||||||
|
COMP_OUTSEL_NOSEL,
|
||||||
|
#if defined(CONFIG_STM32_STM32F33XX)
|
||||||
|
COMP_OUTSEL_BRKACTH,
|
||||||
|
COMP_OUTSEL_BRK2,
|
||||||
|
COMP_OUTSEL_T1OCC, /* COMP2 only */
|
||||||
|
COMP_OUTSEL_T3CAP3, /* COMP4 only */
|
||||||
|
COMP_OUTSEL_T2CAP2, /* COMP6 only */
|
||||||
|
COMP_OUTSEL_T1CAP1, /* COMP2 only */
|
||||||
|
COMP_OUTSEL_T2CAP4, /* COMP2 only */
|
||||||
|
COMP_OUTSEL_T15CAP2, /* COMP4 only */
|
||||||
|
COMP_OUTSEL_T2OCC, /* COMP6 only */
|
||||||
|
COMP_OUTSEL_T16OCC, /* COMP2 only */
|
||||||
|
COMP_OUTSEL_T3CAP1, /* COMP2 only */
|
||||||
|
COMP_OUTSEL_T15OCC, /* COMP4 only */
|
||||||
|
COMP_OUTSEL_T16CAP1, /* COMP6 only */
|
||||||
|
COMP_OUTSEL_T3OCC, /* COMP2 and COMP4 only */
|
||||||
|
#endif
|
||||||
|
};
|
||||||
|
|
||||||
|
/* CSR register lock state */
|
||||||
|
|
||||||
|
enum stm32_comp_lock_e
|
||||||
|
{
|
||||||
|
COMP_LOCK_RW,
|
||||||
|
COMP_LOCK_RO
|
||||||
|
};
|
||||||
|
|
||||||
|
#ifndef CONFIG_STM32_STM32F33XX
|
||||||
|
|
||||||
|
/* Hysteresis */
|
||||||
|
|
||||||
|
enum stm32_comp_hyst_e
|
||||||
|
{
|
||||||
|
COMP_HYST_DIS,
|
||||||
|
COMP_HYST_LOW,
|
||||||
|
COMP_HYST_MEDIUM,
|
||||||
|
COMP_HYST_HIGH
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Power/Speed Modes */
|
||||||
|
|
||||||
|
enum stm32_comp_mode_e
|
||||||
|
{
|
||||||
|
COMP_MODE_HIGHSPEED,
|
||||||
|
COMP_MODE_MEDIUMSPEED,
|
||||||
|
COMP_MODE_LOWPOWER,
|
||||||
|
COMP_MODE_ULTRALOWPOWER
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Window mode */
|
||||||
|
|
||||||
|
enum stm32_comp_winmode_e
|
||||||
|
{
|
||||||
|
COMP_WINMODE_DIS,
|
||||||
|
COMP_WINMODE_EN
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* CONFIG_STM23_COMP */
|
||||||
|
#endif /* __ARCH_ARM_SRC_STM32_STM32_COMP_V1_H */
|
||||||
1005
arch/arm/src/stm32/stm32_comp_v2.c
Normal file
1005
arch/arm/src/stm32/stm32_comp_v2.c
Normal file
File diff suppressed because it is too large
Load Diff
97
arch/arm/src/stm32/stm32_comp_v2.h
Normal file
97
arch/arm/src/stm32/stm32_comp_v2.h
Normal file
@ -0,0 +1,97 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* arch/arm/src/stm32/stm32_comp_v2.h
|
||||||
|
*
|
||||||
|
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||||
|
* contributor license agreements. See the NOTICE file distributed with
|
||||||
|
* this work for additional information regarding copyright ownership. The
|
||||||
|
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||||
|
* "License"); you may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at
|
||||||
|
*
|
||||||
|
* http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
*
|
||||||
|
* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||||
|
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||||
|
* License for the specific language governing permissions and limitations
|
||||||
|
* under the License.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_SRC_STM32_STM32_COMP_V2_H
|
||||||
|
#define __ARCH_ARM_SRC_STM32_STM32_COMP_V2_H
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifdef CONFIG_STM32_COMP
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Pre-processor definitions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Types
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/* Inverting input. See Table 196 in RM0440 */
|
||||||
|
|
||||||
|
enum stm32_comp_inm_e
|
||||||
|
{
|
||||||
|
COMP_INM_1_4_VREF,
|
||||||
|
COMP_INM_1_2_VREF,
|
||||||
|
COMP_INM_3_4_VREF,
|
||||||
|
COMP_INM_VREF,
|
||||||
|
COMP_INM_DAC_1,
|
||||||
|
COMP_INM_DAC_2,
|
||||||
|
COMP_INM_PIN_1,
|
||||||
|
COMP_INM_PIN_2,
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Non-inverting input. See Table 195 in RM0440 */
|
||||||
|
|
||||||
|
enum stm32_comp_inp_e
|
||||||
|
{
|
||||||
|
COMP_INP_PIN_1,
|
||||||
|
COMP_INP_PIN_2,
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Output polarity */
|
||||||
|
|
||||||
|
enum stm32_comp_pol_e
|
||||||
|
{
|
||||||
|
COMP_POL_NONINVERT,
|
||||||
|
COMP_POL_INVERTED
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Hysteresis */
|
||||||
|
|
||||||
|
enum stm32_comp_hyst_e
|
||||||
|
{
|
||||||
|
COMP_HYST_DIS,
|
||||||
|
COMP_HYST_10MV,
|
||||||
|
COMP_HYST_20MV,
|
||||||
|
COMP_HYST_30MV,
|
||||||
|
COMP_HYST_40MV,
|
||||||
|
COMP_HYST_50MV,
|
||||||
|
COMP_HYST_60MV,
|
||||||
|
COMP_HYST_70MV,
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Blanking source */
|
||||||
|
|
||||||
|
enum stm32_comp_blanking_e
|
||||||
|
{
|
||||||
|
COMP_BLANKING_DIS,
|
||||||
|
COMP_BLANKING_TIMX_OCY_1,
|
||||||
|
COMP_BLANKING_TIMX_OCY_2,
|
||||||
|
COMP_BLANKING_TIMX_OCY_3,
|
||||||
|
COMP_BLANKING_TIMX_OCY_4,
|
||||||
|
COMP_BLANKING_TIMX_OCY_5,
|
||||||
|
COMP_BLANKING_TIMX_OCY_6,
|
||||||
|
COMP_BLANKING_TIMX_OCY_7,
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif /* CONFIG_STM32_COMP */
|
||||||
|
#endif /* __ARCH_ARM_SRC_STM32_STM32_COMP_V2_H */
|
||||||
Loading…
Reference in New Issue
Block a user