diff --git a/arch/arm/src/armv7-m/Kconfig b/arch/arm/src/armv7-m/Kconfig index b4fd21f5ec..a9274b28d0 100644 --- a/arch/arm/src/armv7-m/Kconfig +++ b/arch/arm/src/armv7-m/Kconfig @@ -107,7 +107,7 @@ config ARMV7M_OABI_TOOLCHAIN arm-nuttx-elf- vs. arm-nuttx-eabi- config ARMV7M_STACKCHECK - bool "Stack for stack overflow on each function call" + bool "Check for stack overflow on each function call" default n depends on ARCH_CHIP_STM32 ---help--- diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig index ebf4d51f31..38be09791c 100644 --- a/arch/arm/src/stm32/Kconfig +++ b/arch/arm/src/stm32/Kconfig @@ -1650,6 +1650,13 @@ config STM32_I2C config STM32_CAN bool +config STM32_NOEXT_VECTORS + bool "Disable the ARMv7-M EXT vectors" + default n + ---help--- + Sometimes you may not need any Vector support beyond SysTick + and wish to save memory. This applies only to ARMv7-M architectures. + menu "Alternate Pin Mapping" choice diff --git a/arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h b/arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h index 217836999b..9a1cbcd5fb 100644 --- a/arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h +++ b/arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h @@ -51,6 +51,15 @@ #define STM32_REGION_MASK 0xf0000000 #define STM32_IS_SRAM(a) ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_SRAM_BASE) +/* System Memory Addresses **********************************************************/ + +#define STM32_SYSMEM_UID 0x1ffff7e8 /* The 96-bit unique device identifier */ +#define STM32_SYSMEM_FSIZE 0x1ffff7e0 /* This bitfield indicates the size of + * the device Flash memory expressed + * in Kbytes. Example: 0x0080 = 128 + * Kbytes + */ + /* Register Base Address ************************************************************/ /* APB1 bus */ diff --git a/arch/arm/src/stm32/chip/stm32f20xxx_memorymap.h b/arch/arm/src/stm32/chip/stm32f20xxx_memorymap.h index 777b9595fe..9c64929a0b 100644 --- a/arch/arm/src/stm32/chip/stm32f20xxx_memorymap.h +++ b/arch/arm/src/stm32/chip/stm32f20xxx_memorymap.h @@ -72,6 +72,15 @@ #define STM32_OPTION_BASE 0x1fffc000 /* 0x1fffc000-0x1fffc007: Option bytes */ /* 0x1fffc008-0x1fffffff: Reserved */ +/* System Memory Addresses **********************************************************/ + +#define STM32_SYSMEM_UID 0x1fff7a10 /* The 96-bit unique device identifier */ +#define STM32_SYSMEM_FSIZE 0x1fff7a22 /* This bitfield indicates the size of + * the device Flash memory expressed in + * Kbytes. Example: 0x0400 corresponds + * to 1024 Kbytes. + */ + /* SRAM Base Addresses **************************************************************/ /* 0x20000000-0x2001bfff: 112Kb aliased by bit-banding */ diff --git a/arch/arm/src/stm32/chip/stm32f30xxx_memorymap.h b/arch/arm/src/stm32/chip/stm32f30xxx_memorymap.h index dc291ad296..c8cb8f03e9 100644 --- a/arch/arm/src/stm32/chip/stm32f30xxx_memorymap.h +++ b/arch/arm/src/stm32/chip/stm32f30xxx_memorymap.h @@ -64,6 +64,15 @@ #define STM32_OPTION_BASE 0x1ffff800 /* 0x1fffc000-0x1fffc007: Option bytes */ /* 0x1fffc008-0x1fffffff: Reserved */ +/* System Memory Addresses **********************************************************/ + +#define STM32_SYSMEM_UID 0x1ffff7ac /* The 96-bit unique device identifier */ +#define STM32_SYSMEM_FSIZE 0x1ffff7cc /* This bitfield indicates the size of + * the device Flash memory expressed in + * Kbytes. Example: 0x040 corresponds + * to 64 Kbytes + */ + /* Peripheral Base Addresses ********************************************************/ #define STM32_APB1_BASE 0x40000000 /* 0x40000000-0x40009fff: APB1 */ diff --git a/arch/arm/src/stm32/chip/stm32f37xxx_memorymap.h b/arch/arm/src/stm32/chip/stm32f37xxx_memorymap.h index a745cb2de0..cf01966f2d 100644 --- a/arch/arm/src/stm32/chip/stm32f37xxx_memorymap.h +++ b/arch/arm/src/stm32/chip/stm32f37xxx_memorymap.h @@ -63,6 +63,15 @@ #define STM32_OPTION_BASE 0x1ffff800 /* 0x1fffc000-0x1fffc007: Option bytes */ /* 0x1fffc008-0x1fffffff: Reserved */ +/* System Memory Addresses **********************************************************/ + +#define STM32_SYSMEM_UID 0x1ffff7ac /* The 96-bit unique device identifier */ +#define STM32_SYSMEM_FSIZE 0x1ffff7cc /* This bitfield indicates the size of + * the device Flash memory expressed in + * Kbytes. Example: 0x040 corresponds + * to 64 Kbytes + */ + /* Peripheral Base Addresses ********************************************************/ #define STM32_APB1_BASE 0x40000000 /* 0x40000000-0x40009fff: APB1 */ @@ -146,4 +155,3 @@ #define STM32_DEBUGMCU_BASE 0xe0042000 #endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F37XXX_MEMORYMAP_H */ - diff --git a/arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h b/arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h index 3e4c9f6a0c..12fadff5f1 100644 --- a/arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h +++ b/arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h @@ -72,6 +72,15 @@ #define STM32_OPTION_BASE 0x1fffc000 /* 0x1fffc000-0x1fffc007: Option bytes */ /* 0x1fffc008-0x1fffffff: Reserved */ +/* System Memory Addresses **********************************************************/ + +#define STM32_SYSMEM_UID 0x1fff7a10 /* The 96-bit unique device identifier */ +#define STM32_SYSMEM_FSIZE 0x1fff7a22 /* This bitfield indicates the size of + * the device Flash memory expressed in + * Kbytes. Example: 0x0400 corresponds + * to 1024 Kbytes. + */ + /* SRAM Base Addresses **************************************************************/ /* 0x20000000-0x2001bfff: 112Kb aliased by bit-banding */ diff --git a/arch/arm/src/stm32/stm32_vectors.S b/arch/arm/src/stm32/stm32_vectors.S index 03be1e7c20..cf2d4e449c 100644 --- a/arch/arm/src/stm32/stm32_vectors.S +++ b/arch/arm/src/stm32/stm32_vectors.S @@ -163,6 +163,7 @@ _vectors: /* External Interrupts */ +#if !defined(CONFIG_STM32_NOEXT_VECTORS) #undef VECTOR #define VECTOR(l,i) .word l @@ -184,6 +185,7 @@ _vectors: #else # error "No vectors for STM32 chip" #endif +#endif /* CONFIG_STM32_NOEXT_VECTORS */ .size _vectors, .-_vectors /************************************************************************************ @@ -205,6 +207,8 @@ handlers: HANDLER stm32_pendsv, STM32_IRQ_PENDSV /* Vector 14: Penable system service request */ HANDLER stm32_systick, STM32_IRQ_SYSTICK /* Vector 15: System tick */ +#if !defined(CONFIG_STM32_NOEXT_VECTORS) + #undef VECTOR #define VECTOR(l,i) HANDLER l, i @@ -227,6 +231,8 @@ handlers: # error "No handlers for STM32 chip" #endif +#endif /* CONFIG_STM32_NOEXT_VECTORS */ + /* Common IRQ handling logic. On entry here, the return stack is on either * the PSP or the MSP and looks like the following: *