diff --git a/arch/xtensa/src/esp32/esp32_allocateheap.c b/arch/xtensa/src/esp32/esp32_allocateheap.c
index efb57ec06f..95effb3058 100644
--- a/arch/xtensa/src/esp32/esp32_allocateheap.c
+++ b/arch/xtensa/src/esp32/esp32_allocateheap.c
@@ -53,6 +53,26 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
+/* Region 1 of the heap is the area from the end of the .data section to the
+ * begining of the ROM data.  The start address is defined from the linker
+ * script as "_sheap".  Then end is defined here, as follows:
+ */
+
+#define HEAP_REGION1_END 0x3ffe0000
+
+/* Region 2 of the heap is the area from the end of the ROM data to the end
+ * of DRAM.  The linker script has already set "_eheap" as the end of DRAM,
+ * the following defines the start of region2.
+ * N.B: That ROM data consists of 2 regions, one per CPU.  If SMP is not
+ * enabled include APP's region with the heap.
+ */
+
+#ifdef CONFIG_SMP
+#  define HEAP_REGION2_START 0x3ffe4350
+#else
+#  define HEAP_REGION2_START 0x3ffe0400
+#endif
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -77,10 +97,10 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
   board_autoled_on(LED_HEAPALLOCATE);
 #ifdef CONFIG_XTENSA_USE_SEPARATE_IMEM
   *heap_start = (FAR void *)&_sheap + CONFIG_XTENSA_IMEM_REGION_SIZE;
-  *heap_size = (size_t)((uintptr_t)&_eheap - (uintptr_t)*heap_start);
+  *heap_size = (size_t)(HEAP_REGION1_END - (uintptr_t)*heap_start);
 #else
   *heap_start = (FAR void *)&_sheap;
-  *heap_size = (size_t)((uintptr_t)&_eheap - (uintptr_t)&_sheap);
+  *heap_size = (size_t)(HEAP_REGION1_END - (uintptr_t)&_sheap);
 #endif
 }
 
@@ -96,6 +116,9 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
 #if CONFIG_MM_REGIONS > 1
 void xtensa_add_region(void)
 {
+  umm_addregion((FAR void *)HEAP_REGION2_START,
+                (size_t)(uintptr_t)&_eheap - HEAP_REGION2_START);
+
 #if defined(CONFIG_ESP32_SPIRAM)
   /* Check for any additional memory regions */
 
@@ -105,3 +128,4 @@ void xtensa_add_region(void)
 #endif
 }
 #endif
+
diff --git a/boards/xtensa/esp32/esp32-core/scripts/esp32.template.ld b/boards/xtensa/esp32/esp32-core/scripts/esp32.template.ld
index e63c7039f4..454d1e8227 100644
--- a/boards/xtensa/esp32/esp32-core/scripts/esp32.template.ld
+++ b/boards/xtensa/esp32/esp32-core/scripts/esp32.template.ld
@@ -43,10 +43,15 @@ MEMORY
   /* Shared data RAM, excluding memory reserved for ROM bss/data/stack.
    * Enabling Bluetooth & Trace Memory features in menuconfig will decrease
    * the amount of RAM available.
+   *
+   * Note: The length of this section should be 0x50000, and this extra
+   * DRAM is available in heap at runtime. However due to static ROM memory
+   * usage at this 176KB mark, the additional static memory temporarily cannot
+   * be used.
    */
 
   dram0_0_seg (RW) :     org = 0x3ffb0000 + CONFIG_ESP32_BT_RESERVE_DRAM,
-                         len = 0x50000 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM - CONFIG_ESP32_BT_RESERVE_DRAM
+                         len = 0x2c200 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM - CONFIG_ESP32_BT_RESERVE_DRAM
 
   /* Flash mapped constant data */