Add EIC header file
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2994 42af7a65-404d-4744-a932-0658087f49c3
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arch/avr/src/at91uc3/at91uc3_eic.h
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arch/avr/src/at91uc3/at91uc3_eic.h
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/************************************************************************************
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* arch/avr/src/at91uc3/at91uc3_eic.h
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*
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* Copyright (C) 2010 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_AVR_SRC_AT91UC3_AT91UC3_EIC_H
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#define __ARCH_AVR_SRC_AT91UC3_AT91UC3_EIC_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Register offsets *****************************************************************/
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#define AVR32_EIC_IER_OFFSET 0x000 /* Interrupt Enable Register */
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#define AVR32_EIC_IDR_OFFSET 0x004 /* Interrupt Disable Register */
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#define AVR32_EIC_IMR_OFFSET 0x008 /* Interrupt Mask Register */
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#define AVR32_EIC_ISR_OFFSET 0x00c /* Interrupt Status Register */
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#define AVR32_EIC_ICR_OFFSET 0x010 /* Interrupt Clear Register */
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#define AVR32_EIC_MODE_OFFSET 0x014 /* Mode Register */
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#define AVR32_EIC_EDGE_OFFSET 0x018 /* Edge Register */
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#define AVR32_EIC_LEVEL_OFFSET 0x01c /* Level Register */
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#define AVR32_EIC_FILTER_OFFSET 0x020 /* Filter Register */
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#define AVR32_EIC_TEST_OFFSET 0x024 /* Test Register */
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#define AVR32_EIC_ASYNC_OFFSET 0x028 /* Asynchronous Register */
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#define AVR32_EIC_SCAN_OFFSET 0x02c /* Scan Register */
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#define AVR32_EIC_EN_OFFSET 0x030 /* Enable Register */
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#define AVR32_EIC_DIS_OFFSET 0x034 /* Disable Register */
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#define AVR32_EIC_CTRL_OFFSET 0x038 /* Control Register */
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/* Register Addresses ***************************************************************/
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#define AVR32_EIC_IER (AVR32_EIC_BASE+AVR32_EIC_IER_OFFSET)
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#define AVR32_EIC_IDR (AVR32_EIC_BASE+AVR32_EIC_IDR_OFFSET)
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#define AVR32_EIC_IMR (AVR32_EIC_BASE+AVR32_EIC_IMR_OFFSET)
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#define AVR32_EIC_ISR (AVR32_EIC_BASE+AVR32_EIC_ISR_OFFSET)
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#define AVR32_EIC_ICR (AVR32_EIC_BASE+AVR32_EIC_ICR_OFFSET)
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#define AVR32_EIC_MODE (AVR32_EIC_BASE+AVR32_EIC_MODE_OFFSET)
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#define AVR32_EIC_EDGE (AVR32_EIC_BASE+AVR32_EIC_EDGE_OFFSET)
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#define AVR32_EIC_LEVEL (AVR32_EIC_BASE+AVR32_EIC_LEVEL_OFFSET)
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#define AVR32_EIC_FILTER (AVR32_EIC_BASE+AVR32_EIC_FILTER_OFFSET)
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#define AVR32_EIC_TEST (AVR32_EIC_BASE+AVR32_EIC_TEST_OFFSET)
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#define AVR32_EIC_ASYNC (AVR32_EIC_BASE+AVR32_EIC_ASYNC_OFFSET)
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#define AVR32_EIC_SCAN (AVR32_EIC_BASE+AVR32_EIC_SCAN_OFFSET)
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#define AVR32_EIC_EN (AVR32_EIC_BASE+AVR32_EIC_EN_OFFSET)
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#define AVR32_EIC_DIS (AVR32_EIC_BASE+AVR32_EIC_DIS_OFFSET)
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#define AVR32_EIC_CTRL (AVR32_EIC_BASE+AVR32_EIC_CTRL_OFFSET)
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/* Register Bit-field Definitions ***************************************************/
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/* Interrupt Enable Register Bit-field Definitions */
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/* Interrupt Disable Register Bit-field Definitions */
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/* Interrupt Mask Register Bit-field Definitions */
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/* Interrupt Status Register Bit-field Definitions */
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/* Interrupt Clear Register Bit-field Definitions */
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/* Mode Register Bit-field Definitions */
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/* Edge Register Bit-field Definitions */
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/* Level Register Bit-field Definitions */
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/* Filter Register Bit-field Definitions */
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/* Test Register Bit-field Definitions */
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/* Asynchronous Register Bit-field Definitions */
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/* Enable Register Bit-field Definitions */
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/* Disable Register Bit-field Definitions */
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/* Control Register Bit-field Definitions */
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#define EIC_INT0 (1 << 0) /* Bit 0: External interrupt 0 */
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#define EIC_INT1 (1 << 1) /* Bit 1: External interrupt 1 */
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#define EIC_INT2 (1 << 2) /* Bit 2: External interrupt 2 */
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#define EIC_INT3 (1 << 3) /* Bit 3: External interrupt 3 */
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#define EIC_INT4 (1 << 4) /* Bit 4: External interrupt 4 */
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#define EIC_INT5 (1 << 5) /* Bit 5: External interrupt 5 */
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#define EIC_INT6 (1 << 6) /* Bit 6: External interrupt 6 */
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#define EIC_INT7 (1 << 7) /* Bit 7: External interrupt 7 */
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#define EIC_NMI (1 << 8) /* Bit 8: NMI */
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/* Scan Register Bit-field Definitions */
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#define EIC_SCAN_PIN_SHIFT (24) /* Bit 24-26: Currently active scan pin */
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#define EIC_SCAN_PIN_MASK (7 << EIC_SCAN_PIN_SHIFT)
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#define EIC_SCAN_PRESC_SHIFT (8) /* Bit 8-12: Prescale select for keypad scan rate */
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#define EIC_SCAN_PRESC_MASK (0x1f << EIC_SCAN_PRESC_SHIFT)
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#define EIC_SCAN_EN (1 << 0) /* Bit 0: Enable keypad scanning */
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#endif /* __ARCH_AVR_SRC_AT91UC3_AT91UC3_EIC_H */
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