Move up_cgu.c to lpc313x_freqin.c
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2457 42af7a65-404d-4744-a932-0658087f49c3
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@ -47,7 +47,7 @@ CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
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CGU_ASRCS =
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CGU_CSRCS = lpc313x_clkdomain.c lpc313x_clkfreq.c lpc313x_esrndx.c \
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lpc313x_fdcndx.c lpc313x_softreset.c
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lpc313x_fdcndx.c lpc313x_freqin.c lpc313x_softreset.c
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CHIP_ASRCS = $(CGU_ASRCS)
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CHIP_CSRCS = lpc313x_allocateheap.c lpc313x_boot.c lpc313x_irq.c \
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@ -400,9 +400,7 @@ enum lpc313x_resetid_e
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* Public Data
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************************************************************************/
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/* This array must be provided by the board-specific logic to provide
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* the programmed frequency of every input source.
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*/
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/* This array provides the programmed frequency of every input source */
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EXTERN const int32_t g_boardfreqin[CGU_NFREQIN];
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@ -43,25 +43,21 @@
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#include <arch/board/board.h>
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#include "lpc313x_internal.h"
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#
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#include "lpc313x_cgudrvr.h"
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/* This array must be provided by the board-specific logic to provide
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* the programmed frequency of every input source.
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*/
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const int32_t g_boardfreqin[CGU_NFREQIN] =
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{
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LPC313X_XTALIN, /* CGU_FREQIN_FFAST (12 MHz) */
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0, /* CGU_FREQIN_I2SRXBCK0 */
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0, /* CGU_FREQIN_I2SRXWS0 */
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0, /* CGU_FREQIN_I2SRXBCK1 */
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0, /* CGU_FREQIN_I2SRXWS1 */
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0, /* CGU_FREQIN_HPPLL0 (Audio/I2S PLL) */
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0 /* CGU_FREQIN_HPPLL1 (System PLL) */
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BOARD_FREQIN_FFAST, /* Index=CGU_FREQIN_FFAST */
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BOARD_FREQIN_I2SRXBCK0, /* Index=CGU_FREQIN_I2SRXBCK0 */
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BOARD_FREQIN_I2SRXWS0, /* Index=CGU_FREQIN_I2SRXWS0 */
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BOARD_FREQIN_I2SRXBCK1, /* Index=CGU_FREQIN_I2SRXBCK1 */
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BOARD_FREQIN_I2SRXWS1, /* Index=CGU_FREQIN_I2SRXWS1 */
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BOARD_FREQIN_HPPLL0, /* Index=CGU_FREQIN_HPPLL0 (Audio/I2S PLL) */
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BOARD_FREQIN_HPPLL1 /* Index=CGU_FREQIN_HPPLL1 (System PLL) */
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};
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/****************************************************************************
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@ -52,9 +52,15 @@
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************************************************************************************/
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/* Clocking *************************************************************************/
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/* Frequency of the installed crystal */
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/* Frequency of the all inputs */
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#define LPC313X_XTALIN (12000000)
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#define BOARD_FREQIN_FFAST (12000000) /* ffast (12 MHz crystal) */
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#define BOARD_FREQIN_I2SRXBCK0 0 /* I2SRX_BCK0 */
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#define BOARD_FREQIN_I2SRXWS0 0 /* I2SRX_WS0 */
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#define BOARD_FREQIN_I2SRXBCK1 0 /* I2SRX_BCK1 */
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#define BOARD_FREQIN_I2SRXWS1 0 /* I2SRX_WS1 */
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#define BOARD_FREQIN_HPPLL0 0 /* HPPLL0 (Audio/I2S PLL)) */
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#define BOARD_FREQIN_HPPLL1 0 /* HPPLL1 (System PLL */
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/* The following 3 bitsets determine which clocks will be enabled at initialization
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* time.
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@ -40,7 +40,7 @@ CFLAGS += -I$(TOPDIR)/sched
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ASRCS =
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AOBJS = $(ASRCS:.S=$(OBJEXT))
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CSRCS = up_boot.c up_buttons.c up_cgu.c up_leds.c up_sdram.c up_spi.c
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CSRCS = up_boot.c up_buttons.c up_leds.c up_sdram.c up_spi.c
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ifeq ($(CONFIG_EXAMPLES_NSH_ARCHINIT),y)
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CSRCS += up_nsh.c
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endif
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