STM32F1 Mimumum: Fix Timers 2 to 7 clock frequencies
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@ -114,12 +114,12 @@
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* Note: TIM1,8 are on APB2, others on APB1 */
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#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY
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#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY
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#define BOARD_TIM3_FREQUENCY STM32_HCLK_FREQUENCY
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#define BOARD_TIM4_FREQUENCY STM32_HCLK_FREQUENCY
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#define BOARD_TIM5_FREQUENCY STM32_HCLK_FREQUENCY
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#define BOARD_TIM6_FREQUENCY STM32_HCLK_FREQUENCY
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#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY
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#define BOARD_TIM2_FREQUENCY STM32_PCLK1_FREQUENCY
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#define BOARD_TIM3_FREQUENCY STM32_PCLK1_FREQUENCY
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#define BOARD_TIM4_FREQUENCY STM32_PCLK1_FREQUENCY
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#define BOARD_TIM5_FREQUENCY STM32_PCLK1_FREQUENCY
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#define BOARD_TIM6_FREQUENCY STM32_PCLK1_FREQUENCY
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#define BOARD_TIM7_FREQUENCY STM32_PCLK1_FREQUENCY
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#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY
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/* SDIO dividers. Note that slower clocking is required when DMA is disabled
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