STM32F1 Mimumum: Fix Timers 2 to 7 clock frequencies

This commit is contained in:
Alan Carvalho de Assis 2016-10-25 12:52:56 -06:00 committed by Gregory Nutt
parent d5fceadacd
commit 2d7b1ccdda

View File

@ -114,12 +114,12 @@
* Note: TIM1,8 are on APB2, others on APB1 */
#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY
#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY
#define BOARD_TIM3_FREQUENCY STM32_HCLK_FREQUENCY
#define BOARD_TIM4_FREQUENCY STM32_HCLK_FREQUENCY
#define BOARD_TIM5_FREQUENCY STM32_HCLK_FREQUENCY
#define BOARD_TIM6_FREQUENCY STM32_HCLK_FREQUENCY
#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY
#define BOARD_TIM2_FREQUENCY STM32_PCLK1_FREQUENCY
#define BOARD_TIM3_FREQUENCY STM32_PCLK1_FREQUENCY
#define BOARD_TIM4_FREQUENCY STM32_PCLK1_FREQUENCY
#define BOARD_TIM5_FREQUENCY STM32_PCLK1_FREQUENCY
#define BOARD_TIM6_FREQUENCY STM32_PCLK1_FREQUENCY
#define BOARD_TIM7_FREQUENCY STM32_PCLK1_FREQUENCY
#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY
/* SDIO dividers. Note that slower clocking is required when DMA is disabled