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nxstyle

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This commit is contained in:
Matias Nitsche 2020-05-12 17:36:48 -03:00 committed by Alin Jerpelea
parent 5fd9bd5837
commit 2d8a534ef5
10 changed files with 59 additions and 46 deletions
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2
boards/arm/stm32/common/include/stm32_bh1750.h
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@ -1,5 +1,5 @@
/****************************************************************************
* /home/v01d/coding/nuttx_latest/nuttx/boards/arm/stm32/common/include/stm32_bh1750.h
* boards/arm/stm32/common/include/stm32_bh1750.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with

2
boards/arm/stm32/common/include/stm32_dhtxx.h
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@ -1,5 +1,5 @@
/****************************************************************************
* /home/v01d/coding/nuttx_latest/nuttx/boards/arm/stm32/common/include/stm32_dhtxx.h
* boards/arm/stm32/common/include/stm32_dhtxx.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with

2
boards/arm/stm32/common/include/stm32_l3gd20.h
View File

@ -1,5 +1,5 @@
/****************************************************************************
* /home/v01d/coding/nuttx_latest/nuttx/boards/arm/stm32/common/include/stm32_l3gd20.h
* boards/arm/stm32/common/include/stm32_l3gd20.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with

6
boards/arm/stm32/common/src/stm32_dhtxx.c
View File

@ -60,7 +60,8 @@
* Private Function Prototypes
****************************************************************************/
static void dhtxx_config_data_pin(FAR struct dhtxx_config_s *state, bool mode);
static void dhtxx_config_data_pin(FAR struct dhtxx_config_s *state,
bool mode);
static void dhtxx_set_data_pin(FAR struct dhtxx_config_s *state, bool value);
static bool dhtxx_read_data_pin(FAR struct dhtxx_config_s *state);
static int64_t dhtxx_get_clock(FAR struct dhtxx_config_s *state);
@ -85,7 +86,8 @@ struct timespec ts;
* Private Functions
****************************************************************************/
static void dhtxx_config_data_pin(FAR struct dhtxx_config_s *state, bool mode)
static void dhtxx_config_data_pin(FAR struct dhtxx_config_s *state,
bool mode)
{
if (mode)
{

6
boards/arm/stm32/common/src/stm32_lis3dsh.c
View File

@ -65,8 +65,8 @@
* on STM32F4Discovery
*
* Input Parameters:
* *config - The lis3dsh instance configuration data containing the IRQ number,
* device ID and interrupt handler
* config - The lis3dsh instance configuration data containing
* the IRQ number, device ID and interrupt handler
* interrupt_handler - The interrupt handler to attach
* arg -
*
@ -74,6 +74,7 @@
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
int attach_disc_lis3dsh(FAR struct lis3dsh_config_s *config,
xcpt_t interrupt_handler)
{
@ -127,4 +128,3 @@ int board_lis3dsh_initialize(int devno, int busno)
return ret;
}

8
boards/arm/stm32/common/src/stm32_xen1210.c
View File

@ -211,8 +211,8 @@ static void xen1210_clear(FAR struct xen1210_config_s *state)
* Name: xen1210_pwm_setup
*
* Description:
* All STM32 architectures must provide the following interface to work with
* examples/pwm.
* All STM32 architectures must provide the following interface to
* work with examples/pwm.
*
****************************************************************************/
@ -302,7 +302,9 @@ int board_xen1210_initialize(int devno, int busno)
/* Instantiate the XEN1210 driver */
g_xen1210config.handle =
xen1210_instantiate(dev, (FAR struct xen1210_config_s *)&g_xen1210config);
xen1210_instantiate(dev,
(FAR struct xen1210_config_s *)
&g_xen1210config);
if (!g_xen1210config.handle)
{
snerr("ERROR: Failed to instantiate the XEN1210 driver\n");

26
boards/arm/stm32/olimex-stm32-p407/include/board.h
View File

@ -50,7 +50,7 @@
* Pre-processor Definitions
****************************************************************************/
/* Clocking *************************************************************************/
/* Clocking *****************************************************************/
/* HSI - 16 MHz RC factory-trimmed
* LSI - 32 KHz RC (30-60KHz, uncalibrated)
@ -165,9 +165,10 @@
# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
#endif
/* LED definitions ******************************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any
* way. The following definitions are used to access individual LEDs.
/* LED definitions **********************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs
* in any way. The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
@ -190,8 +191,9 @@
#define BOARD_LED3_BIT (1 << BOARD_LED3)
#define BOARD_LED4_BIT (1 << BOARD_LED4)
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on board the
* Olimex STM32-P407. The following definitions describe how NuttX controls the LEDs:
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on
* board the Olimex STM32-P407. The following definitions describe how
* NuttX controls the LEDs:
*/
#define LED_STARTED 0 /* LED1 */
@ -203,7 +205,8 @@
#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */
#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */
/* Button definitions ***************************************************************/
/* Button definitions *******************************************************/
/* The Olimex STM32-P407 supports seven buttons: */
#define BUTTON_TAMPER 0
@ -224,7 +227,7 @@
#define BUTTON_DOWN_BIT (1 << BUTTON_DOWN)
#define BUTTON_CENTER_BIT (1 << BUTTON_CENTER)
/* Alternate function pin selections ************************************************/
/* Alternate function pin selections ****************************************/
/* USART3: */
@ -305,9 +308,10 @@
#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2
#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2
/* DMA Channel/Stream Selections ****************************************************/
/* Stream selections are arbitrary for now but might become important in the future
* if we set aside more DMA channels/streams.
/* DMA Channel/Stream Selections ********************************************/
/* Stream selections are arbitrary for now but might become important in
* the future if we set aside more DMA channels/streams.
*
* SDIO DMA
* DMAMAP_SDIO_1 = Channel 4, Stream 3

37
boards/arm/stm32/olimex-stm32-p407/src/olimex-stm32-p407.h
View File

@ -64,8 +64,8 @@
#define HAVE_ELF 1
#define HAVE_MODSYMS 1
/* Can't support MMC/SD features if mountpoints are disabled or if SDIO support
* is not enabled.
/* Can't support MMC/SD features if mountpoints are disabled or if SDIO
* support is not enabled.
*/
#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_STM32_SDIO) || \
@ -144,6 +144,7 @@
#endif
/* Olimex-STM32-P407 GPIOs **************************************************/
/* LEDs */
#define GPIO_LED1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
@ -189,7 +190,7 @@
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Functions
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
@ -212,25 +213,25 @@ int stm32_bringup(void);
* Name: stm32_stram_configure
*
* Description:
* Initialize to access external SRAM. SRAM will be visible at the FSMC Bank
* NOR/SRAM2 base address (0x64000000)
* Initialize to access external SRAM. SRAM will be visible at the FSMC
* Bank NOR/SRAM2 base address (0x64000000)
*
* General transaction rules. The requested AHB transaction data size can be 8-,
* 16- or 32-bit wide whereas the SRAM has a fixed 16-bit data width. Some simple
* transaction rules must be followed:
* General transaction rules. The requested AHB transaction data size can
* be 8-, 16- or 32-bit wide whereas the SRAM has a fixed 16-bit data
* width. Some simple transaction rules must be followed:
*
* Case 1: AHB transaction width and SRAM data width are equal
* There is no issue in this case.
* Case 2: AHB transaction size is greater than the memory size
* In this case, the FSMC splits the AHB transaction into smaller consecutive
* memory accesses in order to meet the external data width.
* In this case, the FSMC splits the AHB transaction into smaller
* consecutive memory accesses in order to meet the external data width.
* Case 3: AHB transaction size is smaller than the memory size.
* SRAM supports the byte select feature.
* a) FSMC allows write transactions accessing the right data through its
* byte lanes (NBL[1:0])
* b) Read transactions are allowed (the controller reads the entire memory
* word and uses the needed byte only). The NBL[1:0] are always kept low
* during read transactions.
* b) Read transactions are allowed (the controller reads the entire
* memory word and uses the needed byte only). The NBL[1:0] are always
* kept low during read transactions.
*
****************************************************************************/
@ -242,8 +243,8 @@ void stm32_stram_configure(void);
* Name: stm32_usb_configure
*
* Description:
* Called from stm32_boardinitialize very early in inialization to setup USB-related
* GPIO pins for the Olimex STM32 P407 board.
* Called from stm32_boardinitialize very early in inialization to setup
* USB-related GPIO pins for the Olimex STM32 P407 board.
*
****************************************************************************/
@ -255,9 +256,9 @@ void weak_function stm32_usb_configure(void);
* Name: stm32_usbhost_setup
*
* Description:
* Called at application startup time to initialize the USB host functionality.
* This function will start a thread that will monitor for device connection/
* disconnection events.
* Called at application startup time to initialize the USB host
* functionality. This function will start a thread that will monitor for
* device connection/disconnection events.
*
****************************************************************************/

1
boards/arm/stm32/olimex-stm32-p407/src/stm32_bringup.c
View File

@ -121,6 +121,7 @@ int stm32_bringup(void)
#ifdef HAVE_MMCSD
/* Mount the SDIO-based MMC/SD block driver */
/* First, get an instance of the SDIO interface */
sdio = sdio_initialize(MMCSD_SLOTNO);

9
boards/arm/stm32/stm32f429i-disco/src/stm32_bringup.c
View File

@ -157,15 +157,18 @@ int stm32_bringup(void)
mtd = sst25xx_initialize(spi);
if (!mtd)
{
syslog(LOG_ERR, "ERROR: Failed to bind SPI port 4 to the SPI FLASH driver\n");
syslog(LOG_ERR, "ERROR: Failed to bind SPI port 4 to the SPI FLASH"
" driver\n");
}
else
{
syslog(LOG_INFO, "Successfully bound SPI port 4 to the SPI FLASH driver\n");
syslog(LOG_INFO, "Successfully bound SPI port 4 to the SPI FLASH"
" driver\n");
/* Get the geometry of the FLASH device */
ret = mtd->ioctl(mtd, MTDIOC_GEOMETRY, (unsigned long)((uintptr_t)&geo));
ret = mtd->ioctl(mtd, MTDIOC_GEOMETRY,
(unsigned long)((uintptr_t)&geo));
if (ret < 0)
{
ferr("ERROR: mtd->ioctl failed: %d\n", ret);