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arch/Kconfig: Move FPU options to a common place and unify the usage by removing ARCH_CORTEXRxF.

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This commit is contained in:
Xiang Xiao 2019-03-19 10:26:15 -06:00 committed by Gregory Nutt
parent 13782f3357
commit 2f208fdde8
12 changed files with 54 additions and 96 deletions
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27
arch/Kconfig
View File

@ -195,6 +195,17 @@ config ARCH_HAVE_VFORK
bool
default n
config ARCH_HAVE_FPU
bool
default n
config ARCH_HAVE_DPFPU
bool
default n
config ARCH_HAVE_LAZYFPU
bool
config ARCH_HAVE_MMU
bool
default n
@ -248,6 +259,22 @@ config ARCH_GLOBAL_IRQDISABLE
interrupts as well so that no context switches can occur on the CPU
that disabled "local" interrupts.
config ARCH_FPU
bool "FPU support"
default y
depends on ARCH_HAVE_FPU
---help---
Build in support for the Floating Point Unit (FPU).
Check your chip specifications first; not all chips support the FPU.
config ARCH_DPFPU
bool "Double precision FPU support"
default y
depends on ARCH_FPU && ARCH_HAVE_DPFPU
---help---
Enable toolchain support for double precision (64-bit) floating
point if both the toolchain and the hardware support it.
config ARCH_USE_MMU
bool "Enable MMU"
default n

56
arch/arm/Kconfig
View File

@ -562,14 +562,6 @@ config ARCH_CORTEXR4
select ARCH_HAVE_TESTSET
select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
config ARCH_CORTEXR4F
bool
default n
select ARCH_HAVE_MPU
select ARCH_HAVE_FPU
select ARCH_HAVE_TESTSET
select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
config ARCH_CORTEXR5
bool
default n
@ -577,14 +569,6 @@ config ARCH_CORTEXR5
select ARCH_HAVE_TESTSET
select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
config ARCH_CORTEXR5F
bool
default n
select ARCH_HAVE_MPU
select ARCH_HAVE_FPU
select ARCH_HAVE_TESTSET
select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
config ARCH_CORTEXR7
bool
default n
@ -592,21 +576,13 @@ config ARCH_CORTEXR7
select ARCH_HAVE_TESTSET
select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
config ARCH_CORTEXR7F
bool
default n
select ARCH_HAVE_MPU
select ARCH_HAVE_FPU
select ARCH_HAVE_TESTSET
select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
config ARCH_FAMILY
string
default "arm" if ARCH_ARM7TDMI || ARCH_ARM926EJS || ARCH_ARM920T
default "armv6-m" if ARCH_CORTEXM0
default "armv7-a" if ARCH_CORTEXA5 || ARCH_CORTEXA8 || ARCH_CORTEXA9
default "armv7-m" if ARCH_CORTEXM3 || ARCH_CORTEXM4 || ARCH_CORTEXM7
default "armv7-r" if ARCH_CORTEXR4 || ARCH_CORTEXR4F || ARCH_CORTEXR5 || ARCH_CORTEXR5F || ARCH_CORTEX74 || ARCH_CORTEXR7F
default "armv7-r" if ARCH_CORTEXR4 || ARCH_CORTEXR5 || ARCH_CORTEXR7
config ARCH_CHIP
string
@ -647,34 +623,6 @@ config ARCH_CHIP
default "tms570" if ARCH_CHIP_TMS570
default "xmc4" if ARCH_CHIP_XMC4
config ARCH_HAVE_FPU
bool
default n
config ARCH_HAVE_DPFPU
bool
default n
config ARCH_HAVE_LAZYFPU
bool
config ARCH_FPU
bool "FPU support"
default y
depends on ARCH_HAVE_FPU
---help---
Build in support for the ARM Cortex-M4 Floating Point Unit (FPU).
Check your chip specifications first; not all Cortex-M4 chips
support the FPU.
config ARCH_DPFPU
bool "Double precision FPU support"
default y
depends on ARCH_FPU && ARCH_HAVE_DPFPU
---help---
Enable toolchain support for double precision (64-bit) floating
point if both the toolchain and the hardware support it.
config ARCH_HAVE_TRUSTZONE
bool
default n
@ -800,7 +748,7 @@ endif
if ARCH_CORTEXM3 || ARCH_CORTEXM4 || ARCH_CORTEXM7
source arch/arm/src/armv7-m/Kconfig
endif
if ARCH_CORTEXR4 || ARCH_CORTEXR4F || ARCH_CORTEXR5 || ARCH_CORTEXR5F || ARCH_CORTEX74 || ARCH_CORTEXR7F
if ARCH_CORTEXR4 || ARCH_CORTEXR5 || ARCH_CORTEXR7
source arch/arm/src/armv7-r/Kconfig
endif
if ARCH_ARM7TDMI || ARCH_ARM920T || ARCH_ARM926EJS || ARCH_ARM1136J || ARCH_ARM1156T2 || ARCH_ARM1176JZ

5
arch/arm/include/irq.h
View File

@ -59,9 +59,8 @@
#if defined(CONFIG_ARCH_CORTEXA5) || defined(CONFIG_ARCH_CORTEXA8) || \
defined(CONFIG_ARCH_CORTEXA9)
# include <arch/armv7-a/irq.h>
#elif defined(CONFIG_ARCH_CORTEXR4) || defined(CONFIG_ARCH_CORTEXR4F) || \
defined(CONFIG_ARCH_CORTEXR5) || defined(CONFIG_ARCH_CORTEXR5F) || \
defined(CONFIG_ARCH_CORTEXR7) || defined(CONFIG_ARCH_CORTEXR7F)
#elif defined(CONFIG_ARCH_CORTEXR4) || defined(CONFIG_ARCH_CORTEXR5) || \
defined(CONFIG_ARCH_CORTEXR7)
# include <arch/armv7-r/irq.h>
#elif defined(CONFIG_ARCH_CORTEXM3) || defined(CONFIG_ARCH_CORTEXM4) || \
defined(CONFIG_ARCH_CORTEXM7)

5
arch/arm/include/spinlock.h
View File

@ -51,9 +51,8 @@
#if defined(CONFIG_ARCH_CORTEXA5) || defined(CONFIG_ARCH_CORTEXA8) || \
defined(CONFIG_ARCH_CORTEXA9)
# include <arch/armv7-a/spinlock.h>
#elif defined(CONFIG_ARCH_CORTEXR4) || defined(CONFIG_ARCH_CORTEXR4F) || \
defined(CONFIG_ARCH_CORTEXR5) || defined(CONFIG_ARCH_CORTEXR5F) || \
defined(CONFIG_ARCH_CORTEXR7) || defined(CONFIG_ARCH_CORTEXR7F)
#elif defined(CONFIG_ARCH_CORTEXR4) || defined(CONFIG_ARCH_CORTEXR5) || \
defined(CONFIG_ARCH_CORTEXR7)
# include <arch/armv7-r/spinlock.h>
#elif defined(CONFIG_ARCH_CORTEXM3) || defined(CONFIG_ARCH_CORTEXM4) || \
defined(CONFIG_ARCH_CORTEXM7)

5
arch/arm/include/syscall.h
View File

@ -49,9 +49,8 @@
#if defined(CONFIG_ARCH_CORTEXA5) || defined(CONFIG_ARCH_CORTEXA8) || \
defined(CONFIG_ARCH_CORTEXA9)
# include <arch/armv7-a/syscall.h>
#elif defined(CONFIG_ARCH_CORTEXR4) || defined(CONFIG_ARCH_CORTEXR4F) || \
defined(CONFIG_ARCH_CORTEXR5) || defined(CONFIG_ARCH_CORTEXR5F) || \
defined(CONFIG_ARCH_CORTEXR7) || defined(CONFIG_ARCH_CORTEXR7F)
#elif defined(CONFIG_ARCH_CORTEXR4) || defined(CONFIG_ARCH_CORTEXR5) || \
defined(CONFIG_ARCH_CORTEXR7)
# include <arch/armv7-r/syscall.h>
#elif defined(CONFIG_ARCH_CORTEXM3) || defined(CONFIG_ARCH_CORTEXM4) || \
defined(CONFIG_ARCH_CORTEXM7)

6
arch/arm/src/Makefile
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@ -45,16 +45,10 @@ else ifeq ($(CONFIG_ARCH_CORTEXA9),y) # Cortex-A9 is ARMv7-A
ARCH_SUBDIR = armv7-a
else ifeq ($(CONFIG_ARCH_CORTEXR4),y) # Cortex-R4 is ARMv7-R
ARCH_SUBDIR = armv7-r
else ifeq ($(CONFIG_ARCH_CORTEXR4F),y) # Cortex-R4F is ARMv7-R
ARCH_SUBDIR = armv7-r
else ifeq ($(CONFIG_ARCH_CORTEXR5),y) # Cortex-R5 is ARMv7-R
ARCH_SUBDIR = armv7-r
else ifeq ($(CONFIG_ARCH_CORTEXR5F),y) # Cortex-R5F is ARMv7-R
ARCH_SUBDIR = armv7-r
else ifeq ($(CONFIG_ARCH_CORTEXR7),y) # Cortex-R7 is ARMv7-R
ARCH_SUBDIR = armv7-r
else ifeq ($(CONFIG_ARCH_CORTEXR7F),y) # Cortex-R7F is ARMv7-R
ARCH_SUBDIR = armv7-r
else ifeq ($(CONFIG_ARCH_CORTEXM3),y) # Cortex-M3 is ARMv7-M
ARCH_SUBDIR = armv7-m
else ifeq ($(CONFIG_ARCH_CORTEXM4),y) # Cortex-M4 is ARMv7E-M

14
arch/arm/src/common/up_internal.h
View File

@ -119,11 +119,10 @@
* floating point register save/restore.
*/
#elif defined(CONFIG_ARCH_CORTEXA5) || defined(CONFIG_ARCH_CORTEXA8) || \
#elif defined(CONFIG_ARCH_CORTEXA5) || defined(CONFIG_ARCH_CORTEXA8) || \
defined(CONFIG_ARCH_CORTEXA9) || \
defined(CONFIG_ARCH_CORTEXR4) || defined(CONFIG_ARCH_CORTEXR4F) || \
defined(CONFIG_ARCH_CORTEXR5) || defined(CONFIG_ARCH_CORTEXR5F) || \
defined(CONFIG_ARCH_CORTEXR7) || defined(CONFIG_ARCH_CORTEXR7F)
defined(CONFIG_ARCH_CORTEXR4) || defined(CONFIG_ARCH_CORTEXR5) || \
defined(CONFIG_ARCH_CORTEXR7)
/* If the floating point unit is present and enabled, then save the
* floating point registers as well as normal ARM registers.
@ -371,11 +370,10 @@ int up_memfault(int irq, FAR void *context, FAR void *arg);
* (but should be back-ported to the ARM7 and ARM9 families).
*/
#elif defined(CONFIG_ARCH_CORTEXA5) || defined(CONFIG_ARCH_CORTEXA8) || \
#elif defined(CONFIG_ARCH_CORTEXA5) || defined(CONFIG_ARCH_CORTEXA8) || \
defined(CONFIG_ARCH_CORTEXA9) || \
defined(CONFIG_ARCH_CORTEXR4) || defined(CONFIG_ARCH_CORTEXR4F) || \
defined(CONFIG_ARCH_CORTEXR5) || defined(CONFIG_ARCH_CORTEXR5F) || \
defined(CONFIG_ARCH_CORTEXR7) || defined(CONFIG_ARCH_CORTEXR7F)
defined(CONFIG_ARCH_CORTEXR4) || defined(CONFIG_ARCH_CORTEXR5) || \
defined(CONFIG_ARCH_CORTEXR7)
/* Interrupt acknowledge and dispatch */

5
arch/arm/src/common/up_vfork.c
View File

@ -243,9 +243,8 @@ pid_t up_vfork(const struct vfork_s *context)
# endif
#elif defined(CONFIG_ARCH_CORTEXR4) || defined(CONFIG_ARCH_CORTEXR4F) || \
defined(CONFIG_ARCH_CORTEXR5) || defined(CONFIG_ARCH_CORTEXR5F) || \
defined(CONFIG_ARCH_CORTEXR7) || defined(CONFIG_ARCH_CORTEXR7F)
#elif defined(CONFIG_ARCH_CORTEXR4) || defined(CONFIG_ARCH_CORTEXR5) || \
defined(CONFIG_ARCH_CORTEXR7)
# ifdef CONFIG_BUILD_PROTECTED
child->cmn.xcp.syscall[index].cpsr =

15
arch/arm/src/tms570/Kconfig
View File

@ -55,27 +55,32 @@ config ARCH_CHIP_TMS570LS0432PZ
config ARCH_CHIP_TMS570LS0714PZ
bool "TI TMS570LS0714PZ"
select ARCH_CORTEXR4F
select ARCH_CORTEXR4
select ARCH_HAVE_FPU
select TMS570_HAVE_SCI2
config ARCH_CHIP_TMS570LS0714PGE
bool "TI TMS570LS0714PGE"
select ARCH_CORTEXR4F
select ARCH_CORTEXR4
select ARCH_HAVE_FPU
select TMS570_HAVE_SCI2
config ARCH_CHIP_TMS570LS0714ZWT
bool "TI TMS570LS0714ZWT"
select ARCH_CORTEXR4F
select ARCH_CORTEXR4
select ARCH_HAVE_FPU
select TMS570_HAVE_SCI2
config ARCH_CHIP_TMS570LS1227ZWT
bool "TI TMS570LS1227ZWT"
select ARCH_CORTEXR4F
select ARCH_CORTEXR4
select ARCH_HAVE_FPU
select TMS570_HAVE_SCI2
config ARCH_CHIP_TMS570LS3137ZWT
bool "TI TMS570LS3137ZWT"
select ARCH_CORTEXR4F
select ARCH_CORTEXR4
select ARCH_HAVE_FPU
select TMS570_HAVE_SCI2
select TMS570_HAVE_SPI1
select TMS570_HAVE_SPI2

4
arch/or1k/src/mor1kx/Kconfig
View File

@ -30,10 +30,6 @@ config OR1K_DCACHE
bool "Enable Data Cache"
default n
config OR1K_FPU
bool "Enable Floating Point Unit"
default n
config OR1K_MMU
bool "Enable MMU"
default n

2
libs/libc/machine/arm/Kconfig
View File

@ -11,7 +11,7 @@ if ARCH_CORTEXA5 || ARCH_CORTEXA8 || ARCH_CORTEXA9
source libs/libc/machine/arm/armv7-a/Kconfig
endif
if ARCH_CORTEXR4 || ARCH_CORTEXR4F || ARCH_CORTEXR5 || ARCH_CORTEXR5F || ARCH_CORTEXR7 || ARCH_CORTEXR7F
if ARCH_CORTEXR4 || ARCH_CORTEXR5 || ARCH_CORTEXR7
source libs/libc/machine/arm/armv7-r/Kconfig
endif

6
libs/libc/machine/arm/Make.defs
View File

@ -47,16 +47,10 @@ else ifeq ($(CONFIG_ARCH_CORTEXA9),y) # Cortex-A9 is ARMv7-A
include ${TOPDIR}/libs/libc/machine/arm/armv7-a/Make.defs
else ifeq ($(CONFIG_ARCH_CORTEXR4),y) # Cortex-R4 is ARMv7-R
include ${TOPDIR}/libs/libc/machine/arm/armv7-r/Make.defs
else ifeq ($(CONFIG_ARCH_CORTEXR4F),y) # Cortex-R4F is ARMv7-R
include ${TOPDIR}/libs/libc/machine/arm/armv7-r/Make.defs
else ifeq ($(CONFIG_ARCH_CORTEXR5),y) # Cortex-R5 is ARMv7-R
include ${TOPDIR}/libs/libc/machine/arm/armv7-r/Make.defs
else ifeq ($(CONFIG_ARCH_CORTEXR5F),y) # Cortex-R5F is ARMv7-R
include ${TOPDIR}/libs/libc/machine/arm/armv7-r/Make.defs
else ifeq ($(CONFIG_ARCH_CORTEXR7),y) # Cortex-R7 is ARMv7-R
include ${TOPDIR}/libs/libc/machine/arm/armv7-r/Make.defs
else ifeq ($(CONFIG_ARCH_CORTEXR7F),y) # Cortex-R7F is ARMv7-R
include ${TOPDIR}/libs/libc/machine/arm/armv7-r/Make.defs
else ifeq ($(CONFIG_ARCH_CORTEXM0),y) # Cortex-M0 is ARMv6-M
include ${TOPDIR}/libs/libc/machine/arm/armv6-m/Make.defs
else ifeq ($(CONFIG_ARCH_CORTEXM3),y) # Cortex-M3 is ARMv7-M