Xtensa ESP32: Co-processor state is code complete but uncompiled and untested.

This commit is contained in:
Gregory Nutt 2016-10-28 13:03:25 -06:00
parent 9345c6f4db
commit 2fa8b9ba34
11 changed files with 88 additions and 2 deletions

View File

@ -236,8 +236,13 @@ void xtensa_dumpstate(void);
/* Common XTENSA functions */
/* Initialization */
#if XCHAL_CP_NUM > 0
void xtensa_coproc_init(void);
struct xtensa_cpstate_s;
void xtensa_coproc_release(struct xtensa_cpstate_s *cpstate);
#endif
/* IRQs */
uint32_t *xtensa_int_decode(uint32_t *regs);

View File

@ -45,6 +45,7 @@
#include <nuttx/arch.h>
#include <nuttx/sched.h>
#include <arch/chip/core-isa.h>
#include "sched/sched.h"
#include "group/group.h"
@ -148,12 +149,26 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
else if (!xtensa_context_save(rtcb->xcp.regs))
{
#if XCHAL_CP_NUM > 0
/* Save the co-processor state in in the suspended thread's co-
* processor save area.
*/
xtensa_coproc_savestate(rtcb);
#endif
/* Restore the exception context of the rtcb at the (new) head
* of the ready-to-run task list.
*/
rtcb = this_task();
#if XCHAL_CP_NUM > 0
/* Set up the co-processor state for the newly started thread. */
xtensa_coproc_restorestate(rtcb);
#endif
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,

View File

@ -167,6 +167,7 @@ xtensa_coproc_release:
1: l32i a7, a3, 0 /* a7 = owner at a3 */
bne a2, a7, 2f /* if (coproc_sa_base == owner) */
s32i a5, a3, 0 /* owner = unowned */
2: addi a3, a3, 1<<2 /* a3 = next entry in owner array */
bltu a3, a4, 1b /* repeat until end of array */

View File

@ -155,6 +155,13 @@ void _exit(int status)
sched_foreach(_xtensa_dumponexit, NULL);
#endif
#if XCHAL_CP_NUM > 0
/* Disable preprocessor support fo the task that is exit-ing. */
tcb = this_task();
xtensa_coproc_release(&tcb->xcp.cpstate);
#endif
/* Destroy the task at the head of the ready to run list. */
(void)task_exit();
@ -165,6 +172,12 @@ void _exit(int status)
tcb = this_task();
#if XCHAL_CP_NUM > 0
/* Set up the co-processor state for the newly started thread. */
xtensa_coproc_restorestate(tcb);
#endif
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously running
* task is closed down gracefully (data caches dump, MMU flushed) and

View File

@ -111,7 +111,7 @@ uint32_t *xtensa_irq_dispatch(int irq, uint32_t *regs)
*/
tcb = this_task();
esp32_coproc_restorestate(tcb);
xtensa_coproc_restorestate(tcb);
#endif
#ifdef CONFIG_ARCH_ADDRENV

View File

@ -41,8 +41,10 @@
#include <sched.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/sched.h>
#include <arch/chip/core-isa.h>
#include "sched/sched.h"
#include "group/group.h"
@ -117,12 +119,25 @@ void up_release_pending(void)
else if (!xtensa_context_save(rtcb->xcp.regs))
{
#if XCHAL_CP_NUM > 0
/* Save the co-processor state in in the suspended thread's co-
* processor save area.
*/
xtensa_coproc_savestate(rtcb);
#endif
/* Restore the exception context of the rtcb at the (new) head
* of the ready-to-run task list.
*/
rtcb = this_task();
#if XCHAL_CP_NUM > 0
/* Set up the co-processor state for the newly started thread. */
xtensa_coproc_restorestate(rtcb);
#endif
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,

View File

@ -43,8 +43,10 @@
#include <stdbool.h>
#include <sched.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/sched.h>
#include <arch/chip/core-isa.h>
#include "sched/sched.h"
#include "group/group.h"
@ -170,12 +172,25 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
else if (!xtensa_context_save(rtcb->xcp.regs))
{
#if XCHAL_CP_NUM > 0
/* Save the co-processor state in in the suspended thread's co-
* processor save area.
*/
xtensa_coproc_savestate(rtcb);
#endif
/* Restore the exception context of the rtcb at the (new) head
* of the ready-to-run task list.
*/
rtcb = this_task();
#if XCHAL_CP_NUM > 0
/* Set up the co-processor state for the newly started thread. */
xtensa_coproc_restorestate(rtcb);
#endif
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,

View File

@ -117,7 +117,9 @@ void xtensa_sigdeliver(void)
(void)up_irq_save();
rtcb->pterrno = saved_errno;
/* Then restore the correct state for this thread of execution. */
/* Then restore the correct state for this thread of execution.
* NOTE: The co-processor state should already be correct.
*/
board_autoled_off(LED_SIGNAL);
xtensa_context_restore(regs);

View File

@ -41,8 +41,10 @@
#include <sched.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/sched.h>
#include <arch/chip/core-isa.h>
#include "sched/sched.h"
#include "group/group.h"
@ -131,6 +133,14 @@ void up_unblock_task(struct tcb_s *tcb)
else if (!xtensa_context_save(rtcb->xcp.regs))
{
#if XCHAL_CP_NUM > 0
/* Save the co-processor state in in the suspended thread's co-
* processor save area.
*/
xtensa_coproc_savestate(rtcb);
#endif
/* Restore the exception context of the new task that is ready to
* run (probably tcb). This is the new rtcb at the head of the
* ready-to-run task list.
@ -138,6 +148,12 @@ void up_unblock_task(struct tcb_s *tcb)
rtcb = this_task();
#if XCHAL_CP_NUM > 0
/* Set up the co-processor state for the newly started thread. */
xtensa_coproc_restorestate(rtcb);
#endif
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,

View File

@ -146,6 +146,8 @@ int xtensa_start_handler(int irq, FAR void *context)
xtensa_disable_all();
#warning REVISIT: Do we need to disable co-processors here?
/* Detach all peripheral sources APP CPU interrupts */
for (i = 0; i < ESP32_NPERIPHERALS; i++)

View File

@ -85,6 +85,8 @@ void IRAM_ATTR __start(void)
memset(&_sbss, 0, (&_ebss - &_sbss) * sizeof(_sbss));
#warning REVISIT: Do we need to disable co-processors here?
/* Make sure that the APP_CPU is disabled for now */
regval = getreg32(DPORT_APPCPU_CTRL_B_REG);