diff --git a/arch/arm/include/cxd56xx/chip.h b/arch/arm/include/cxd56xx/chip.h
index c1afb4dfe0..794ab8f262 100644
--- a/arch/arm/include/cxd56xx/chip.h
+++ b/arch/arm/include/cxd56xx/chip.h
@@ -25,6 +25,10 @@
  * Pre-processor Prototypes
  ****************************************************************************/
 
+/* physical address conversion macro */
+
+#define CXD56_PHYSADDR(a) ((uint32_t)((uint32_t)(a) & 0x9ffffffful))
+
 #define CXD56M4_SYSH_PRIORITY_MIN     0xe0 /* All bits[7:5] set is minimum priority */
 #define CXD56M4_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
 #define CXD56M4_SYSH_PRIORITY_MAX     0x00 /* Zero is maximum priority */
diff --git a/arch/arm/src/cxd56xx/cxd56_cisif.c b/arch/arm/src/cxd56xx/cxd56_cisif.c
index e4445b91f4..1e0951991f 100644
--- a/arch/arm/src/cxd56xx/cxd56_cisif.c
+++ b/arch/arm/src/cxd56xx/cxd56_cisif.c
@@ -604,7 +604,7 @@ static int cisif_set_yuv_sarea(void *s)
   /* must align 32 bytes */
 
   cisif_reg_write(CISIF_YCC_DAREA_SIZE, (ss->strg_size & 0xffffffe0));
-  cisif_reg_write(CISIF_YCC_START_ADDR, (uint32_t)ss->strg_addr);
+  cisif_reg_write(CISIF_YCC_START_ADDR, CXD56_PHYSADDR(ss->strg_addr));
 
   return OK;
 }
@@ -636,7 +636,7 @@ static int cisif_set_jpg_sarea(void *s)
   /* must align 32 bytes */
 
   cisif_reg_write(CISIF_JPG_DAREA_SIZE, (ss->strg_size & 0xffffffe0));
-  cisif_reg_write(CISIF_JPG_START_ADDR, (uint32_t)ss->strg_addr);
+  cisif_reg_write(CISIF_JPG_START_ADDR, CXD56_PHYSADDR(ss->strg_addr));
 
   return OK;
 }
diff --git a/arch/arm/src/cxd56xx/cxd56_dmac.c b/arch/arm/src/cxd56xx/cxd56_dmac.c
index 61850d0961..e63c84e25b 100644
--- a/arch/arm/src/cxd56xx/cxd56_dmac.c
+++ b/arch/arm/src/cxd56xx/cxd56_dmac.c
@@ -37,6 +37,10 @@
 
 #include "cxd56_dmac.h"
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
 #define PM_APP_ADMAC 51
 #define PM_APP_SKDMAC 52
 #define PM_APP_IDMAC 54
@@ -900,6 +904,7 @@ void cxd56_rxdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
       di = 0;
     }
 
+  dst  = CXD56_PHYSADDR(dst);
   rest = nbytes;
 
   list_num = (nbytes + CXD56_DMAC_MAX_SIZE - 1) / CXD56_DMAC_MAX_SIZE;
@@ -907,7 +912,7 @@ void cxd56_rxdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
     {
       dmach->list[i].src_addr = paddr;
       dmach->list[i].dest_addr = dst;
-      dmach->list[i].nextlli = (uint32_t)&dmach->list[i + 1];
+      dmach->list[i].nextlli = CXD56_PHYSADDR(&dmach->list[i + 1]);
       dmach->list[i].control = DMAC_EX_CTRL_HELPER(0, di, 0,           /* interrupt / Dest inc / Src inc */
                                CXD56_DMAC_MASTER1, CXD56_DMAC_MASTER2, /* AHB dst master / AHB src master (fixed) */
                                config.dest_width, config.src_width,    /* Dest / Src transfer width */
@@ -970,6 +975,7 @@ void cxd56_txdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
       si = 0;
     }
 
+  src  = CXD56_PHYSADDR(src);
   rest = nbytes;
 
   list_num = (nbytes + CXD56_DMAC_MAX_SIZE - 1) / CXD56_DMAC_MAX_SIZE;
@@ -977,7 +983,7 @@ void cxd56_txdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
     {
       dmach->list[i].src_addr = src;
       dmach->list[i].dest_addr = paddr;
-      dmach->list[i].nextlli = (uint32_t)&dmach->list[i + 1];
+      dmach->list[i].nextlli = CXD56_PHYSADDR(&dmach->list[i + 1]);
       dmach->list[i].control = DMAC_EX_CTRL_HELPER(0, 0, si,               /* interrupt / Dest inc / Src inc */
                                    CXD56_DMAC_MASTER2, CXD56_DMAC_MASTER1, /* AHB dst master / AHB src master (fixed) */
                                    config.dest_width, config.src_width,    /* Dest / Src transfer width (fixed) */
diff --git a/arch/arm/src/cxd56xx/cxd56_emmc.c b/arch/arm/src/cxd56xx/cxd56_emmc.c
index b7843a603f..6e335d7ace 100644
--- a/arch/arm/src/cxd56xx/cxd56_emmc.c
+++ b/arch/arm/src/cxd56xx/cxd56_emmc.c
@@ -299,7 +299,7 @@ static struct emmc_dma_desc_s *emmc_setupdma(void *buf, unsigned int nbytes)
     }
 
   remain = nbytes;
-  addr = (uint32_t)(uintptr_t)buf;
+  addr = CXD56_PHYSADDR(buf);
 
   for (i = 0, d = descs; i < ndescs; i++, d++)
     {
@@ -309,7 +309,7 @@ static struct emmc_dma_desc_s *emmc_setupdma(void *buf, unsigned int nbytes)
       size = MIN(remain, 4096);
       d->size = size;
       d->addr = addr;
-      d->next = (uint32_t)(uintptr_t)(d + 1);
+      d->next = CXD56_PHYSADDR(d + 1);
 
       remain -= size;
       addr += size;
@@ -331,7 +331,7 @@ static struct emmc_dma_desc_s *emmc_setupdma(void *buf, unsigned int nbytes)
     }
 #endif
 
-  putreg32((uint32_t)(uintptr_t)descs, EMMC_DBADDR);
+  putreg32(CXD56_PHYSADDR(descs), EMMC_DBADDR);
 
   return descs;
 }
diff --git a/arch/arm/src/cxd56xx/cxd56_ge2d.c b/arch/arm/src/cxd56xx/cxd56_ge2d.c
index e77f9e99a1..ec0305009f 100644
--- a/arch/arm/src/cxd56xx/cxd56_ge2d.c
+++ b/arch/arm/src/cxd56xx/cxd56_ge2d.c
@@ -151,7 +151,7 @@ static ssize_t ge2d_write(FAR struct file *filep,
    * can't set except 1 in this chip.
    */
 
-  putreg32((uint32_t)(uintptr_t)buffer | 1, GE2D_ADDRESS_DESCRIPTOR_START);
+  putreg32(CXD56_PHYSADDR(buffer) | 1, GE2D_ADDRESS_DESCRIPTOR_START);
   putreg32(GE2D_EXEC, GE2D_CMD_DESCRIPTOR);
 
   /* Enable error and completion interrupts. */
diff --git a/arch/arm/src/cxd56xx/cxd56_sdhci.c b/arch/arm/src/cxd56xx/cxd56_sdhci.c
index fcb9746bc5..e1fa11c9ce 100644
--- a/arch/arm/src/cxd56xx/cxd56_sdhci.c
+++ b/arch/arm/src/cxd56xx/cxd56_sdhci.c
@@ -1059,7 +1059,7 @@ static void cxd56_endtransfer(struct cxd56_sdiodev_s *priv,
   putreg32(regval, CXD56_SDHCI_SYSCTL);
   cxd56_sdhci_adma_dscr[0] = 0;
   cxd56_sdhci_adma_dscr[1] = 0;
-  putreg32((uint32_t)cxd56_sdhci_adma_dscr, CXD56_SDHCI_ADSADDR);
+  putreg32(CXD56_PHYSADDR(cxd56_sdhci_adma_dscr), CXD56_SDHCI_ADSADDR);
   putreg32(0, CXD56_SDHCI_ADSADDR_H);
   priv->usedma = false;
   priv->dmasend_prepare = false;
@@ -2082,7 +2082,7 @@ static int cxd56_sdio_cancel(FAR struct sdio_dev_s *dev)
   priv->dmasend_regcmd = 0;
   cxd56_sdhci_adma_dscr[0] = 0;
   cxd56_sdhci_adma_dscr[1] = 0;
-  putreg32((uint32_t)cxd56_sdhci_adma_dscr, CXD56_SDHCI_ADSADDR);
+  putreg32(CXD56_PHYSADDR(cxd56_sdhci_adma_dscr), CXD56_SDHCI_ADSADDR);
   putreg32(0, CXD56_SDHCI_ADSADDR_H);
 #endif
   regval  = getreg32(CXD56_SDHCI_SYSCTL);
@@ -2756,12 +2756,12 @@ static int cxd56_sdio_registercallback(FAR struct sdio_dev_s *dev,
 #ifdef CONFIG_SDIO_DMA
 static int cxd56_sdio_admasetup(FAR const uint8_t *buffer, size_t buflen)
 {
-  uint32_t dscr_top = (uint32_t)cxd56_sdhci_adma_dscr;
+  uint32_t dscr_top = CXD56_PHYSADDR(cxd56_sdhci_adma_dscr);
   uint32_t dscr_l;
   uint32_t i;
   uint32_t remaining;
   uint32_t len;
-  uint32_t data_addr = (uint32_t)buffer;
+  uint32_t data_addr = CXD56_PHYSADDR(buffer);
   remaining = buflen;
 
   putreg32(0x0, CXD56_SDHCI_ADSADDR_H);
@@ -2903,7 +2903,7 @@ static int cxd56_sdio_dmarecvsetup(FAR struct sdio_dev_s *dev,
   priv->usedma = true;
 
   cxd56_configxfrints(priv, SDHCI_DMADONE_INTS);
-  putreg32((uint32_t)buffer, CXD56_SDHCI_DSADDR);
+  putreg32(CXD56_PHYSADDR(buffer), CXD56_SDHCI_DSADDR);
 
   /* Sample the register state */
 
@@ -3250,7 +3250,7 @@ FAR struct sdio_dev_s *cxd56_sdhci_initialize(int slotno)
       cxd56_sdhci_adma_dscr[i] = 0;
     }
 
-  putreg32((uint32_t)cxd56_sdhci_adma_dscr, CXD56_SDHCI_ADSADDR);
+  putreg32(CXD56_PHYSADDR(cxd56_sdhci_adma_dscr), CXD56_SDHCI_ADSADDR);
   putreg32(0, CXD56_SDHCI_ADSADDR_H);
   putreg32(SDHCI_PROCTL_DMAS_ADMA2 |
           (getreg32(CXD56_SDHCI_PROCTL) & ~SDHCI_PROCTL_DMAS_MASK),
diff --git a/arch/arm/src/cxd56xx/cxd56_udmac.c b/arch/arm/src/cxd56xx/cxd56_udmac.c
index fdcfe71d0d..fa9c7440f2 100644
--- a/arch/arm/src/cxd56xx/cxd56_udmac.c
+++ b/arch/arm/src/cxd56xx/cxd56_udmac.c
@@ -255,7 +255,7 @@ void cxd56_udmainitialize(void)
    * will obtain the alternative descriptors.
    */
 
-  putreg32((uint32_t)g_descriptors, CXD56_DMA_CTRLBASE);
+  putreg32(CXD56_PHYSADDR(g_descriptors), CXD56_DMA_CTRLBASE);
 
   /* Enable the DMA controller */
 
@@ -443,7 +443,7 @@ void cxd56_rxudmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
 
   desc         = cxd56_get_descriptor(dmach, false);
   desc->srcend = paddr;
-  desc->dstend = (maddr + nbytes - xfersize);
+  desc->dstend = CXD56_PHYSADDR(maddr + nbytes - xfersize);
 
   /* No source increment, destination increments according to transfer size.
    * No privileges.  Arbitrate after each transfer. Default priority.
@@ -539,7 +539,7 @@ void cxd56_txudmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
   /* Configure the primary channel descriptor */
 
   desc         = cxd56_get_descriptor(dmach, false);
-  desc->srcend = (maddr + nbytes - xfersize);
+  desc->srcend = CXD56_PHYSADDR(maddr + nbytes - xfersize);
   desc->dstend = paddr;
 
   /* No destination increment, source increments according to transfer size.
diff --git a/arch/arm/src/cxd56xx/cxd56_usbdev.c b/arch/arm/src/cxd56xx/cxd56_usbdev.c
index 8a966368ca..00337fcc05 100644
--- a/arch/arm/src/cxd56xx/cxd56_usbdev.c
+++ b/arch/arm/src/cxd56xx/cxd56_usbdev.c
@@ -755,7 +755,7 @@ static int cxd56_epwrite(FAR struct cxd56_ep_s *privep, FAR uint8_t *buf,
       return 0;
     }
 
-  desc->buf    = (uint32_t)(uintptr_t)buf;
+  desc->buf    = CXD56_PHYSADDR(buf);
   desc->status = nbytes | DESC_LAST; /* always last descriptor */
 
   /* Set Poll bit to ready to send */
@@ -1042,7 +1042,7 @@ static int cxd56_rdrequest(FAR struct cxd56_ep_s *privep)
 
   usbtrace(TRACE_READ(privep->epphy), privep->ep.maxpacket);
 
-  desc->buf    = (uint32_t)(uintptr_t)privreq->req.buf;
+  desc->buf    = CXD56_PHYSADDR(privreq->req.buf);
   desc->status = privep->ep.maxpacket | DESC_LAST;
 
   /* Ready to receive next packet */
@@ -2023,12 +2023,12 @@ static void cxd56_ep0hwinitialize(FAR struct cxd56_usbdev_s *priv)
   memset(&g_ep0in, 0, sizeof(g_ep0in));
   memset(&g_ep0out, 0, sizeof(g_ep0out));
 
-  g_ep0out.buf    = (uint32_t)(uintptr_t)g_ep0outbuffer;
+  g_ep0out.buf    = CXD56_PHYSADDR(g_ep0outbuffer);
   g_ep0out.status = CXD56_EP0MAXPACKET | DESC_LAST;
 
-  putreg32((uint32_t)(uintptr_t)&g_ep0setup, CXD56_USB_OUT_EP_SETUP(0));
-  putreg32((uint32_t)(uintptr_t)&g_ep0in, CXD56_USB_IN_EP_DATADESC(0));
-  putreg32((uint32_t)(uintptr_t)&g_ep0out, CXD56_USB_OUT_EP_DATADESC(0));
+  putreg32(CXD56_PHYSADDR(&g_ep0setup), CXD56_USB_OUT_EP_SETUP(0));
+  putreg32(CXD56_PHYSADDR(&g_ep0in), CXD56_USB_IN_EP_DATADESC(0));
+  putreg32(CXD56_PHYSADDR(&g_ep0out), CXD56_USB_OUT_EP_DATADESC(0));
 
   /* Clear all interrupts */
 
@@ -2253,12 +2253,12 @@ static int cxd56_epconfigure(FAR struct usbdev_ep_s *ep,
 
   if (privep->in)
     {
-      putreg32((uint32_t)(uintptr_t)privep->desc,
+      putreg32(CXD56_PHYSADDR(privep->desc),
                CXD56_USB_IN_EP_DATADESC(privep->epphy));
     }
   else
     {
-      putreg32((uint32_t)(uintptr_t)privep->desc,
+      putreg32(CXD56_PHYSADDR(privep->desc),
                CXD56_USB_OUT_EP_DATADESC(privep->epphy));
     }
 
@@ -2629,12 +2629,12 @@ static int cxd56_allocepbuffer(FAR struct cxd56_ep_s *privep)
 
   if (privep->in)
     {
-      putreg32((uint32_t)(uintptr_t)privep->desc,
+      putreg32(CXD56_PHYSADDR(privep->desc),
                CXD56_USB_IN_EP_DATADESC(privep->epphy));
     }
   else
     {
-      putreg32((uint32_t)(uintptr_t)privep->desc,
+      putreg32(CXD56_PHYSADDR(privep->desc),
                CXD56_USB_OUT_EP_DATADESC(privep->epphy));
     }
 
@@ -3339,12 +3339,12 @@ static void cxd56_usbreset(FAR struct cxd56_usbdev_s *priv)
 
       if (priv->eplist[i].in)
         {
-          putreg32((uint32_t)(uintptr_t)priv->eplist[i].desc,
+          putreg32(CXD56_PHYSADDR(priv->eplist[i].desc),
                    CXD56_USB_IN_EP_DATADESC(priv->eplist[i].epphy));
         }
       else
         {
-          putreg32((uint32_t)(uintptr_t)priv->eplist[i].desc,
+          putreg32(CXD56_PHYSADDR(priv->eplist[i].desc),
                    CXD56_USB_OUT_EP_DATADESC(priv->eplist[i].epphy));
         }