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Merged nuttx/nuttx into master

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This commit is contained in:
Aleksandr Vyhovanec 2017-01-15 22:27:25 +03:00
commit 30163af89e
19 changed files with 2265 additions and 123 deletions
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223
arch/arm/src/armv7-a/arm_schedulesigaction.c
View File

@ -1,7 +1,7 @@
/**************************************************************************** /****************************************************************************
* arch/arm/src/armv7-a/arm_schedulesigaction.c * arch/arm/src/armv7-a/arm_schedulesigaction.c
* *
* Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved. * Copyright (C) 2013, 2015-2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org> * Author: Gregory Nutt <gnutt@nuttx.org>
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -51,6 +51,8 @@
#include "up_internal.h" #include "up_internal.h"
#include "up_arch.h" #include "up_arch.h"
#include "irq/irq.h"
#ifndef CONFIG_DISABLE_SIGNALS #ifndef CONFIG_DISABLE_SIGNALS
/**************************************************************************** /****************************************************************************
@ -90,6 +92,7 @@
* *
****************************************************************************/ ****************************************************************************/
#ifndef CONFIG_SMP
void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{ {
irqstate_t flags; irqstate_t flags;
@ -105,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
if (!tcb->xcp.sigdeliver) if (!tcb->xcp.sigdeliver)
{ {
/* First, handle some special cases when the signal is being delivered /* First, handle some special cases when the signal is being delivered
* to the currently executing task. * to task that is currently executing on this CPU.
*/ */
sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS); sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
@ -142,28 +145,16 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* the signals have been delivered. * the signals have been delivered.
*/ */
tcb->xcp.sigdeliver = sigdeliver; tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_pc = CURRENT_REGS[REG_PC]; tcb->xcp.saved_pc = CURRENT_REGS[REG_PC];
tcb->xcp.saved_cpsr = CURRENT_REGS[REG_CPSR]; tcb->xcp.saved_cpsr = CURRENT_REGS[REG_CPSR];
/* Then set up to vector to the trampoline with interrupts /* Then set up to vector to the trampoline with interrupts
* disabled * disabled
*/ */
CURRENT_REGS[REG_PC] = (uint32_t)up_sigdeliver; CURRENT_REGS[REG_PC] = (uint32_t)up_sigdeliver;
CURRENT_REGS[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT); CURRENT_REGS[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
#ifdef CONFIG_SMP
/* In an SMP configuration, the interrupt disable logic also
* involves spinlocks that are configured per the TCB irqcount
* field. This is logically equivalent to enter_critical_section().
* The matching call to leave_critical_section() will be
* performed in up_sigdeliver().
*/
DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;
#endif
/* And make sure that the saved context in the TCB is the same /* And make sure that the saved context in the TCB is the same
* as the interrupt return context. * as the interrupt return context.
@ -175,7 +166,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
/* Otherwise, we are (1) signaling a task is not running from an /* Otherwise, we are (1) signaling a task is not running from an
* interrupt handler or (2) we are not in an interrupt handler and the * interrupt handler or (2) we are not in an interrupt handler and the
* running task is signalling some non-running task. * running task is signalling some other non-running task.
*/ */
else else
@ -185,33 +176,189 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* have been delivered. * have been delivered.
*/ */
tcb->xcp.sigdeliver = sigdeliver; tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_pc = tcb->xcp.regs[REG_PC]; tcb->xcp.saved_pc = tcb->xcp.regs[REG_PC];
tcb->xcp.saved_cpsr = tcb->xcp.regs[REG_CPSR]; tcb->xcp.saved_cpsr = tcb->xcp.regs[REG_CPSR];
/* Then set up to vector to the trampoline with interrupts /* Then set up to vector to the trampoline with interrupts
* disabled * disabled
*/ */
tcb->xcp.regs[REG_PC] = (uint32_t)up_sigdeliver; tcb->xcp.regs[REG_PC] = (uint32_t)up_sigdeliver;
tcb->xcp.regs[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT); tcb->xcp.regs[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
#ifdef CONFIG_SMP
/* In an SMP configuration, the interrupt disable logic also
* involves spinlocks that are configured per the TCB irqcount
* field. This is logically equivalent to enter_critical_section();
* The matching leave_critical_section will be performed in
* The matching call to leave_critical_section() will be performed
* in up_sigdeliver().
*/
DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;
#endif
} }
} }
leave_critical_section(flags); leave_critical_section(flags);
} }
#endif /* !CONFIG_SMP */
#ifdef CONFIG_SMP
void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
int cpu;
int me;
sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
flags = enter_critical_section();
/* Refuse to handle nested signal actions */
if (!tcb->xcp.sigdeliver)
{
/* First, handle some special cases when the signal is being delivered
* to task that is currently executing on any CPU.
*/
sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb->task_state == TSTATE_TASK_RUNNING)
{
me = this_cpu();
cpu = tcb->cpu;
/* CASE 1: We are not in an interrupt handler and a task is
* signalling itself for some reason.
*/
if (cpu == me && !CURRENT_REGS)
{
/* In this case just deliver the signal now. */
sigdeliver(tcb);
}
/* CASE 2: The task that needs to receive the signal is running.
* This could happen if the task is running on another CPU OR if
* we are in an interrupt handler and the task is running on this
* CPU. In the former case, we will have to PAUSE the other CPU
* first. But in either case, we will have to modify the return
* state as well as the state in the TCB.
*
* Hmmm... there looks like a latent bug here: The following logic
* would fail in the strange case where we are in an interrupt
* handler, the thread is signalling itself, but a context switch
* to another task has occurred so that CURRENT_REGS does not
* refer to the thread of this_task()!
*/
else
{
/* If we signalling a task running on the other CPU, we have
* to PAUSE the other CPU.
*/
if (cpu != me)
{
up_cpu_pause(cpu);
}
/* Save the return lr and cpsr and one scratch register
* These will be restored by the signal trampoline after
* the signals have been delivered.
*/
tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_pc = CURRENT_REGS[REG_PC];
tcb->xcp.saved_cpsr = CURRENT_REGS[REG_CPSR];
/* Increment the IRQ lock count so that when the task is restarted,
* it will hold the IRQ spinlock.
*/
DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;
/* Handle a possible race condition where the TCB was suspended
* just before we paused the other CPU. The critical section
* established above will prevent new threads from running on
* that CPU, but it will not guarantee that the running thread
* did not suspend itself (allowing any threads "assigned" to
* the CPU to run).
*/
if (tcb->task_state != TSTATE_TASK_RUNNING)
{
/* Then set up to vector to the trampoline with interrupts
* disabled
*/
tcb->xcp.regs[REG_PC] = (uint32_t)up_sigdeliver;
tcb->xcp.regs[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
}
else
{
/* Then set up to vector to the trampoline with interrupts
* disabled
*/
CURRENT_REGS[REG_PC] = (uint32_t)up_sigdeliver;
CURRENT_REGS[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
/* In an SMP configuration, the interrupt disable logic also
* involves spinlocks that are configured per the TCB irqcount
* field. This is logically equivalent to enter_critical_section().
* The matching call to leave_critical_section() will be
* performed in up_sigdeliver().
*/
spin_setbit(&g_cpu_irqset, cpu, &g_cpu_irqsetlock,
&g_cpu_irqlock);
/* And make sure that the saved context in the TCB is the same
* as the interrupt return context.
*/
up_savestate(tcb->xcp.regs);
}
/* RESUME the other CPU if it was PAUSED */
if (cpu != me)
{
up_cpu_pause(cpu);
}
}
}
/* Otherwise, we are (1) signaling a task is not running from an
* interrupt handler or (2) we are not in an interrupt handler and the
* running task is signalling some other non-running task.
*/
else
{
/* Save the return lr and cpsr and one scratch register. These
* will be restored by the signal trampoline after the signals
* have been delivered.
*/
tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_pc = tcb->xcp.regs[REG_PC];
tcb->xcp.saved_cpsr = tcb->xcp.regs[REG_CPSR];
/* Increment the IRQ lock count so that when the task is restarted,
* it will hold the IRQ spinlock.
*/
DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;
/* Then set up to vector to the trampoline with interrupts
* disabled
*/
tcb->xcp.regs[REG_PC] = (uint32_t)up_sigdeliver;
tcb->xcp.regs[REG_CPSR] = (PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT);
}
}
leave_critical_section(flags);
}
#endif /* CONFIG_SMP */
#endif /* !CONFIG_DISABLE_SIGNALS */ #endif /* !CONFIG_DISABLE_SIGNALS */

228
arch/arm/src/armv7-m/up_schedulesigaction.c
View File

@ -1,7 +1,7 @@
/**************************************************************************** /****************************************************************************
* arch/arm/src/armv7-m/up_schedulesigaction.c * arch/arm/src/armv7-m/up_schedulesigaction.c
* *
* Copyright (C) 2009-2014, 2016 Gregory Nutt. All rights reserved. * Copyright (C) 2009-2014, 2016-2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org> * Author: Gregory Nutt <gnutt@nuttx.org>
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -52,6 +52,8 @@
#include "up_internal.h" #include "up_internal.h"
#include "up_arch.h" #include "up_arch.h"
#include "irq/irq.h"
#ifndef CONFIG_DISABLE_SIGNALS #ifndef CONFIG_DISABLE_SIGNALS
/**************************************************************************** /****************************************************************************
@ -91,6 +93,7 @@
* *
****************************************************************************/ ****************************************************************************/
#ifndef CONFIG_SMP
void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{ {
irqstate_t flags; irqstate_t flags;
@ -163,21 +166,8 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
#endif #endif
CURRENT_REGS[REG_XPSR] = ARMV7M_XPSR_T; CURRENT_REGS[REG_XPSR] = ARMV7M_XPSR_T;
#ifdef CONFIG_BUILD_PROTECTED #ifdef CONFIG_BUILD_PROTECTED
CURRENT_REGS[REG_LR] = EXC_RETURN_PRIVTHR; CURRENT_REGS[REG_LR] = EXC_RETURN_PRIVTHR;
#endif #endif
#ifdef CONFIG_SMP
/* In an SMP configuration, the interrupt disable logic also
* involves spinlocks that are configured per the TCB irqcount
* field. This is logically equivalent to enter_critical_section().
* The matching call to leave_critical_section() will be
* performed in up_sigdeliver().
*/
DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;
#endif
/* And make sure that the saved context in the TCB is the same /* And make sure that the saved context in the TCB is the same
* as the interrupt return context. * as the interrupt return context.
*/ */
@ -224,23 +214,219 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
#ifdef CONFIG_BUILD_PROTECTED #ifdef CONFIG_BUILD_PROTECTED
tcb->xcp.regs[REG_LR] = EXC_RETURN_PRIVTHR; tcb->xcp.regs[REG_LR] = EXC_RETURN_PRIVTHR;
#endif #endif
}
}
leave_critical_section(flags);
}
#endif /* !CONFIG_SMP */
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
/* In an SMP configuration, the interrupt disable logic also void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* involves spinlocks that are configured per the TCB irqcount {
* field. This is logically equivalent to enter_critical_section(); irqstate_t flags;
* The matching leave_critical_section will be performed in int cpu;
* The matching call to leave_critical_section() will be performed int me;
* in up_sigdeliver().
sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
flags = enter_critical_section();
/* Refuse to handle nested signal actions */
if (!tcb->xcp.sigdeliver)
{
/* First, handle some special cases when the signal is being delivered
* to task that is currently executing on any CPU.
*/
sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb->task_state == TSTATE_TASK_RUNNING)
{
me = this_cpu();
cpu = tcb->cpu;
/* CASE 1: We are not in an interrupt handler and a task is
* signalling itself for some reason.
*/
if (cpu == me && !CURRENT_REGS)
{
/* In this case just deliver the signal now. */
sigdeliver(tcb);
}
/* CASE 2: The task that needs to receive the signal is running.
* This could happen if the task is running on another CPU OR if
* we are in an interrupt handler and the task is running on this
* CPU. In the former case, we will have to PAUSE the other CPU
* first. But in either case, we will have to modify the return
* state as well as the state in the TCB.
*
* Hmmm... there looks like a latent bug here: The following logic
* would fail in the strange case where we are in an interrupt
* handler, the thread is signalling itself, but a context switch
* to another task has occurred so that CURRENT_REGS does not
* refer to the thread of this_task()!
*/
else
{
/* If we signalling a task running on the other CPU, we have
* to PAUSE the other CPU.
*/
if (cpu != me)
{
up_cpu_pause(cpu);
}
/* Save the return PC, CPSR and either the BASEPRI or PRIMASK
* registers (and perhaps also the LR). These will be
* restored by the signal trampoline after the signal has been
* delivered.
*/
tcb->xcp.sigdeliver = (FAR void *)sigdeliver;
tcb->xcp.saved_pc = CURRENT_REGS[REG_PC];
#ifdef CONFIG_ARMV7M_USEBASEPRI
tcb->xcp.saved_basepri = CURRENT_REGS[REG_BASEPRI];
#else
tcb->xcp.saved_primask = CURRENT_REGS[REG_PRIMASK];
#endif
tcb->xcp.saved_xpsr = CURRENT_REGS[REG_XPSR];
#ifdef CONFIG_BUILD_PROTECTED
tcb->xcp.saved_lr = CURRENT_REGS[REG_LR];
#endif
/* Increment the IRQ lock count so that when the task is restarted,
* it will hold the IRQ spinlock.
*/
DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;
/* Handle a possible race condition where the TCB was suspended
* just before we paused the other CPU. The critical section
* established above will prevent new threads from running on
* that CPU, but it will not guarantee that the running thread
* did not suspend itself (allowing any threads "assigned" to
* the CPU to run).
*/
if (tcb->task_state != TSTATE_TASK_RUNNING)
{
/* Then set up to vector to the trampoline with interrupts
* disabled. We must already be in privileged thread mode
* to be here.
*/
tcb->xcp.regs[REG_PC] = (uint32_t)up_sigdeliver;
#ifdef CONFIG_ARMV7M_USEBASEPRI
tcb->xcp.regs[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY;
#else
tcb->xcp.regs[REG_PRIMASK] = 1;
#endif
tcb->xcp.regs[REG_XPSR] = ARMV7M_XPSR_T;
#ifdef CONFIG_BUILD_PROTECTED
tcb->xcp.regs[REG_LR] = EXC_RETURN_PRIVTHR;
#endif
}
else
{
/* Then set up to vector to the trampoline with interrupts
* disabled
*/
CURRENT_REGS[REG_PC] = (uint32_t)up_sigdeliver;
#ifdef CONFIG_ARMV7M_USEBASEPRI
CURRENT_REGS[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY;
#else
CURRENT_REGS[REG_PRIMASK] = 1;
#endif
CURRENT_REGS[REG_XPSR] = ARMV7M_XPSR_T;
#ifdef CONFIG_BUILD_PROTECTED
CURRENT_REGS[REG_LR] = EXC_RETURN_PRIVTHR;
#endif
/* In an SMP configuration, the interrupt disable logic also
* involves spinlocks that are configured per the TCB irqcount
* field. This is logically equivalent to enter_critical_section().
* The matching call to leave_critical_section() will be
* performed in up_sigdeliver().
*/
spin_setbit(&g_cpu_irqset, cpu, &g_cpu_irqsetlock,
&g_cpu_irqlock);
/* And make sure that the saved context in the TCB is the same
* as the interrupt return context.
*/
up_savestate(tcb->xcp.regs);
}
/* RESUME the other CPU if it was PAUSED */
if (cpu != me)
{
up_cpu_pause(cpu);
}
}
}
/* Otherwise, we are (1) signaling a task is not running from an
* interrupt handler or (2) we are not in an interrupt handler and the
* running task is signalling some other non-running task.
*/
else
{
/* Save the return PC, CPSR and either the BASEPRI or PRIMASK
* registers (and perhaps also the LR). These will be restored
* by the signal trampoline after the signal has been delivered.
*/
tcb->xcp.sigdeliver = (FAR void *)sigdeliver;
tcb->xcp.saved_pc = tcb->xcp.regs[REG_PC];
#ifdef CONFIG_ARMV7M_USEBASEPRI
tcb->xcp.saved_basepri = tcb->xcp.regs[REG_BASEPRI];
#else
tcb->xcp.saved_primask = tcb->xcp.regs[REG_PRIMASK];
#endif
tcb->xcp.saved_xpsr = tcb->xcp.regs[REG_XPSR];
#ifdef CONFIG_BUILD_PROTECTED
tcb->xcp.saved_lr = tcb->xcp.regs[REG_LR];
#endif
/* Increment the IRQ lock count so that when the task is restarted,
* it will hold the IRQ spinlock.
*/ */
DEBUGASSERT(tcb->irqcount < INT16_MAX); DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++; tcb->irqcount++;
/* Then set up to vector to the trampoline with interrupts
* disabled. We must already be in privileged thread mode to be
* here.
*/
tcb->xcp.regs[REG_PC] = (uint32_t)up_sigdeliver;
#ifdef CONFIG_ARMV7M_USEBASEPRI
tcb->xcp.regs[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY;
#else
tcb->xcp.regs[REG_PRIMASK] = 1;
#endif
tcb->xcp.regs[REG_XPSR] = ARMV7M_XPSR_T;
#ifdef CONFIG_BUILD_PROTECTED
tcb->xcp.regs[REG_LR] = EXC_RETURN_PRIVTHR;
#endif #endif
} }
} }
leave_critical_section(flags); leave_critical_section(flags);
} }
#endif /* CONFIG_SMP */
#endif /* !CONFIG_DISABLE_SIGNALS */ #endif /* !CONFIG_DISABLE_SIGNALS */

12
arch/arm/src/armv7-m/up_sigdeliver.c
View File

@ -54,18 +54,6 @@
#ifndef CONFIG_DISABLE_SIGNALS #ifndef CONFIG_DISABLE_SIGNALS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions
****************************************************************************/ ****************************************************************************/

219
arch/xtensa/src/common/xtensa_schedsigaction.c
View File

@ -1,7 +1,7 @@
/**************************************************************************** /****************************************************************************
* arch/xtensa/src/common/arm_schedulesigaction.c * arch/xtensa/src/common/arm_schedulesigaction.c
* *
* Copyright (C) 2016 Gregory Nutt. All rights reserved. * Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org> * Author: Gregory Nutt <gnutt@nuttx.org>
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -49,6 +49,8 @@
#include "sched/sched.h" #include "sched/sched.h"
#include "xtensa.h" #include "xtensa.h"
#include "irq/irq.h"
#ifndef CONFIG_DISABLE_SIGNALS #ifndef CONFIG_DISABLE_SIGNALS
/**************************************************************************** /****************************************************************************
@ -88,6 +90,7 @@
* *
****************************************************************************/ ****************************************************************************/
#ifndef CONFIG_SMP
void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{ {
irqstate_t flags; irqstate_t flags;
@ -135,26 +138,25 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
else else
{ {
/* Save the return lr and cpsr and one scratch register /* Save the return pc and ps. These will be restored by the
* These will be restored by the signal trampoline after * signal trampoline after the signals have been delivered.
* the signals have been delivered.
* *
* NOTE: that hi-priority interrupts are not disabled. * NOTE: that hi-priority interrupts are not disabled.
*/ */
tcb->xcp.sigdeliver = sigdeliver; tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_pc = CURRENT_REGS[REG_PC]; tcb->xcp.saved_pc = CURRENT_REGS[REG_PC];
tcb->xcp.saved_ps = CURRENT_REGS[REG_PS]; tcb->xcp.saved_ps = CURRENT_REGS[REG_PS];
/* Then set up to vector to the trampoline with interrupts /* Then set up to vector to the trampoline with interrupts
* disabled * disabled
*/ */
CURRENT_REGS[REG_PC] = (uint32_t)_xtensa_sig_trampoline; CURRENT_REGS[REG_PC] = (uint32_t)_xtensa_sig_trampoline;
#ifdef __XTENSA_CALL0_ABI__ #ifdef __XTENSA_CALL0_ABI__
CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM); CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
#else #else
CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE); CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);
#endif #endif
/* And make sure that the saved context in the TCB is the same /* And make sure that the saved context in the TCB is the same
@ -172,29 +174,208 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
else else
{ {
/* Save the return lr and cpsr and one scratch register. These /* Save the return pc and ps. These will be restored by the
* will be restored by the signal trampoline after the signals * signal trampoline after the signals have been delivered.
* have been delivered. *
* NOTE: that hi-priority interrupts are not disabled.
*/ */
tcb->xcp.sigdeliver = sigdeliver; tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_pc = tcb->xcp.regs[REG_PC]; tcb->xcp.saved_pc = CURRENT_REGS[REG_PC];
tcb->xcp.saved_ps = tcb->xcp.regs[REG_PS]; tcb->xcp.saved_ps = CURRENT_REGS[REG_PS];
/* Then set up to vector to the trampoline with interrupts /* Then set up to vector to the trampoline with interrupts
* disabled * disabled
*/ */
tcb->xcp.regs[REG_PC] = (uint32_t)_xtensa_sig_trampoline; tcb->xcp.regs[REG_PC] = (uint32_t)_xtensa_sig_trampoline;
#ifdef __XTENSA_CALL0_ABI__ #ifdef __XTENSA_CALL0_ABI__
tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM); tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
#else #else
tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE); tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);
#endif #endif
} }
} }
leave_critical_section(flags); leave_critical_section(flags);
} }
#endif /* !CONFIG_SMP */
#ifdef CONFIG_SMP
void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
int cpu;
int me;
sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
flags = enter_critical_section();
/* Refuse to handle nested signal actions */
if (!tcb->xcp.sigdeliver)
{
/* First, handle some special cases when the signal is being delivered
* to task that is currently executing on any CPU.
*/
sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb->task_state == TSTATE_TASK_RUNNING)
{
me = this_cpu();
cpu = tcb->cpu;
/* CASE 1: We are not in an interrupt handler and a task is
* signalling itself for some reason.
*/
if (cpu == me && !CURRENT_REGS)
{
/* In this case just deliver the signal now. */
sigdeliver(tcb);
}
/* CASE 2: The task that needs to receive the signal is running.
* This could happen if the task is running on another CPU OR if
* we are in an interrupt handler and the task is running on this
* CPU. In the former case, we will have to PAUSE the other CPU
* first. But in either case, we will have to modify the return
* state as well as the state in the TCB.
*
* Hmmm... there looks like a latent bug here: The following logic
* would fail in the strange case where we are in an interrupt
* handler, the thread is signalling itself, but a context switch
* to another task has occurred so that CURRENT_REGS does not
* refer to the thread of this_task()!
*/
else
{
/* If we signalling a task running on the other CPU, we have
* to PAUSE the other CPU.
*/
if (cpu != me)
{
up_cpu_pause(cpu);
}
/* Save the return pc and ps. These will be restored by the
* signal trampoline after the signals have been delivered.
*
* NOTE: that hi-priority interrupts are not disabled.
*/
tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_pc = CURRENT_REGS[REG_PC];
tcb->xcp.saved_ps = CURRENT_REGS[REG_PS];
/* Increment the IRQ lock count so that when the task is restarted,
* it will hold the IRQ spinlock.
*/
DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;
/* Handle a possible race condition where the TCB was suspended
* just before we paused the other CPU. The critical section
* established above will prevent new threads from running on
* that CPU, but it will not guarantee that the running thread
* did not suspend itself (allowing any threads "assigned" to
* the CPU to run).
*/
if (tcb->task_state != TSTATE_TASK_RUNNING)
{
tcb->xcp.regs[REG_PC] = (uint32_t)_xtensa_sig_trampoline;
#ifdef __XTENSA_CALL0_ABI__
tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
#else
tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);
#endif
}
else
{
/* Then set up to vector to the trampoline with interrupts
* disabled
*/
CURRENT_REGS[REG_PC] = (uint32_t)_xtensa_sig_trampoline;
#ifdef __XTENSA_CALL0_ABI__
CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
#else
CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);
#endif
/* In an SMP configuration, the interrupt disable logic also
* involves spinlocks that are configured per the TCB irqcount
* field. This is logically equivalent to enter_critical_section().
* The matching call to leave_critical_section() will be
* performed in up_sigdeliver().
*/
spin_setbit(&g_cpu_irqset, cpu, &g_cpu_irqsetlock,
&g_cpu_irqlock);
/* And make sure that the saved context in the TCB is the same
* as the interrupt return context.
*/
xtensa_savestate(tcb->xcp.regs);
}
/* RESUME the other CPU if it was PAUSED */
if (cpu != me)
{
up_cpu_pause(cpu);
}
}
}
/* Otherwise, we are (1) signaling a task is not running from an
* interrupt handler or (2) we are not in an interrupt handler and the
* running task is signalling some other non-running task.
*/
else
{
/* Save the return pc and ps. These will be restored by the
* signal trampoline after the signals have been delivered.
*
* NOTE: that hi-priority interrupts are not disabled.
*/
tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_pc = CURRENT_REGS[REG_PC];
tcb->xcp.saved_ps = CURRENT_REGS[REG_PS];
/* Increment the IRQ lock count so that when the task is restarted,
* it will hold the IRQ spinlock.
*/
DEBUGASSERT(tcb->irqcount < INT16_MAX);
tcb->irqcount++;
/* Then set up to vector to the trampoline with interrupts
* disabled
*/
tcb->xcp.regs[REG_PC] = (uint32_t)_xtensa_sig_trampoline;
#ifdef __XTENSA_CALL0_ABI__
tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
#else
tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);
#endif
}
}
leave_critical_section(flags);
}
#endif /* CONFIG_SMP */
#endif /* !CONFIG_DISABLE_SIGNALS */ #endif /* !CONFIG_DISABLE_SIGNALS */

7
configs/stm32f103-minimum/README.txt
View File

@ -434,6 +434,13 @@ Where <subdir> is one of the following:
LCD you need to connect PA5 (SPI1 CLK) to SCK; PA7 (SPI1 MOSI) to SDA; PA4 LCD you need to connect PA5 (SPI1 CLK) to SCK; PA7 (SPI1 MOSI) to SDA; PA4
to CS; PA3 to RST; PA2 to RS. to CS; PA3 to RST; PA2 to RS.
nrf24:
---------
This is a config example to test the nrf24 terminal example. You will need
two stm32f103-minimum board each one with a nRF24L01 module connected this
way: connect PB1 to nRF24 CE pin; PA4 to CSN; PA5 (SPI1 CLK) to SCK; PA7
(SPI1 MOSI) to MOSI; PA6 (SPI1 MISO) to MISO; PA0 to IRQ.
usbnsh: usbnsh:
------- -------

113
configs/stm32f103-minimum/nrf24/Make.defs Normal file
View File

@ -0,0 +1,113 @@
############################################################################
# configs/stm32f103-minimum/nrf24/Make.defs
#
# Copyright (C) 2017 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk
include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = ld.script
ifeq ($(WINTOOL),y)
# Windows-native toolchains
DIRLINK = $(TOPDIR)/tools/copydir.sh
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
MKDEP = $(TOPDIR)/tools/mkwindeps.sh
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
else
# Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
endif
CC = $(CROSSDEV)gcc
CXX = $(CROSSDEV)g++
CPP = $(CROSSDEV)gcc -E
LD = $(CROSSDEV)ld
AR = $(CROSSDEV)ar rcs
NM = $(CROSSDEV)nm
OBJCOPY = $(CROSSDEV)objcopy
OBJDUMP = $(CROSSDEV)objdump
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHDEFINES =
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
ASMEXT = .S
OBJEXT = .o
LIBEXT = .a
EXEEXT =
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
HOSTCC = gcc
HOSTINCLUDES = -I.
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
HOSTLDFLAGS =

1212
configs/stm32f103-minimum/nrf24/defconfig Normal file
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File diff suppressed because it is too large Load Diff

100
configs/stm32f103-minimum/nrf24/setenv.sh Normal file
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@ -0,0 +1,100 @@
#!/bin/bash
# configs/stm32f103-minimum/nrf24/setenv.sh
#
# Copyright (C) 2017 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
if [ "$_" = "$0" ] ; then
echo "You must source this script, not run it!" 1>&2
exit 1
fi
WD=`pwd`
if [ ! -x "setenv.sh" ]; then
echo "This script must be executed from the top-level NuttX build directory"
exit 1
fi
if [ -z "${PATH_ORIG}" ]; then
export PATH_ORIG="${PATH}"
fi
# This is the Cygwin path to the location where I installed the CodeSourcery
# toolchain under windows. You will also have to edit this if you install
# the CodeSourcery toolchain in any other location
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
# This is the path to the location where I installed the devkitARM toolchain
# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
# This is the Cygwin path to the location where I build the buildroot
# toolchain.
# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
# Add the path to the toolchain to the PATH varialble
export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
echo "PATH : ${PATH}"

6
configs/stm32f103-minimum/src/Makefile
View File

@ -1,7 +1,7 @@
############################################################################ ############################################################################
# configs/stm32f103-minimum/src/Makefile # configs/stm32f103-minimum/src/Makefile
# #
# Copyright (C) 2016 Gregory Nutt. All rights reserved. # Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org> # Author: Gregory Nutt <gnutt@nuttx.org>
# Laurent Latil <laurent@latil.nom.fr> # Laurent Latil <laurent@latil.nom.fr>
# #
@ -77,4 +77,8 @@ ifeq ($(CONFIG_VEML6070),y)
CSRCS += stm32_veml6070.c CSRCS += stm32_veml6070.c
endif endif
ifeq ($(CONFIG_WL_NRF24L01),y)
CSRCS += stm32_wireless.c
endif
include $(TOPDIR)/configs/Board.mk include $(TOPDIR)/configs/Board.mk

8
configs/stm32f103-minimum/src/stm32_bringup.c
View File

@ -1,7 +1,7 @@
/**************************************************************************** /****************************************************************************
* config/stm32f103-minimum/src/stm32_bringup.c * config/stm32f103-minimum/src/stm32_bringup.c
* *
* Copyright (C) 2016 Gregory Nutt. All rights reserved. * Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org> * Author: Gregory Nutt <gnutt@nuttx.org>
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -183,5 +183,11 @@ int stm32_bringup(void)
} }
#endif #endif
#if defined(CONFIG_WL_NRF24L01)
/* Initialize the NRF24L01 wireless module */
stm32_wlinitialize();
#endif
return ret; return ret;
} }

22
configs/stm32f103-minimum/src/stm32_spi.c
View File

@ -81,6 +81,10 @@ void stm32_spidev_initialize(void)
#ifdef CONFIG_LCD_ST7567 #ifdef CONFIG_LCD_ST7567
(void)stm32_configgpio(STM32_LCD_CS); /* ST7567 chip select */ (void)stm32_configgpio(STM32_LCD_CS); /* ST7567 chip select */
#endif #endif
#ifdef CONFIG_WL_NRF24L01
stm32_configgpio(GPIO_NRF24L01_CS); /* nRF24L01 chip select */
#endif
} }
/**************************************************************************** /****************************************************************************
@ -125,11 +129,27 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
stm32_gpiowrite(GPIO_CS_MFRC522, !selected); stm32_gpiowrite(GPIO_CS_MFRC522, !selected);
} }
#endif #endif
#ifdef CONFIG_WL_NRF24L01
if (devid == SPIDEV_WIRELESS)
{
stm32_gpiowrite(GPIO_NRF24L01_CS, !selected);
}
#endif
} }
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{ {
return 0; uint8_t status = 0;
#ifdef CONFIG_WL_NRF24L01
if (devid == SPIDEV_WIRELESS)
{
status |= SPI_STATUS_PRESENT;
}
#endif
return status;
} }
#endif #endif

146
configs/stm32f103-minimum/src/stm32_wireless.c Normal file
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@ -0,0 +1,146 @@
/************************************************************************************
* configs/stm32f103-minimum//src/stm32_wireless.c
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Laurent Latil <laurent@latil.nom.fr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/spi/spi.h>
#include <nuttx/wireless/nrf24l01.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "chip.h"
#include "stm32.h"
#include "stm32f103_minimum.h"
#ifdef CONFIG_WL_NRF24L01
/************************************************************************************
* Private Function Prototypes
************************************************************************************/
static int stm32tiny_wl_irq_attach(xcpt_t isr);
static void stm32tiny_wl_chip_enable(bool enable);
/************************************************************************************
* Private Data
************************************************************************************/
static FAR struct nrf24l01_config_s nrf_cfg =
{
.irqattach = stm32tiny_wl_irq_attach,
.chipenable = stm32tiny_wl_chip_enable,
};
static xcpt_t g_isr;
/************************************************************************************
* Private Functions
************************************************************************************/
static int stm32tiny_wl_irq_attach(xcpt_t isr)
{
winfo("Attach IRQ\n");
g_isr = isr;
stm32_gpiosetevent(GPIO_NRF24L01_IRQ, false, true, false, g_isr);
return OK;
}
static void stm32tiny_wl_chip_enable(bool enable)
{
winfo("CE:%d\n", enable);
stm32_gpiowrite(GPIO_NRF24L01_CE, enable);
}
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_wlinitialize
*
* Description:
* Initialize the NRF24L01 wireless module
*
* Input Parmeters:
* None
*
* Returned Value:
* None
*
************************************************************************************/
void stm32_wlinitialize(void)
{
#ifndef CONFIG_STM32_SPI1
# error "STM32_SPI1 is required to support nRF24L01 module on this board"
#endif
FAR struct spi_dev_s *spidev;
int result;
/* Setup CE & IRQ line IOs */
stm32_configgpio(GPIO_NRF24L01_CE);
stm32_configgpio(GPIO_NRF24L01_IRQ);
/* Init SPI bus */
spidev = stm32_spibus_initialize(1);
if (!spidev)
{
werr("ERROR: Failed to initialize SPI bus\n");
return;
}
result = nrf24l01_register(spidev, &nrf_cfg);
if (result != OK)
{
werr("ERROR: Failed to register initialize SPI bus\n");
return;
}
}
#endif /* CONFIG_WL_NRF24L01 */

70
configs/stm32f103-minimum/src/stm32f103_minimum.h
View File

@ -63,44 +63,58 @@
/* GPIOs **************************************************************/ /* GPIOs **************************************************************/
/* LEDs */ /* LEDs */
#define GPIO_LED1 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ #define GPIO_LED1 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN13) GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN13)
/* BUTTONs */ /* BUTTONs */
#define GPIO_BTN_USER1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ #define GPIO_BTN_USER1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\
GPIO_EXTI|GPIO_PORTA|GPIO_PIN0) GPIO_EXTI|GPIO_PORTA|GPIO_PIN0)
#define GPIO_BTN_USER2 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\ #define GPIO_BTN_USER2 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\
GPIO_EXTI|GPIO_PORTA|GPIO_PIN1) GPIO_EXTI|GPIO_PORTA|GPIO_PIN1)
#define MIN_IRQBUTTON BUTTON_USER1 #define MIN_IRQBUTTON BUTTON_USER1
#define MAX_IRQBUTTON BUTTON_USER2 #define MAX_IRQBUTTON BUTTON_USER2
#define NUM_IRQBUTTONS (BUTTON_USER1 - BUTTON_USER2 + 1) #define NUM_IRQBUTTONS (BUTTON_USER1 - BUTTON_USER2 + 1)
/* SPI chip selects */ /* SPI chip selects */
#define GPIO_CS_MFRC522 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ #define GPIO_CS_MFRC522 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4) GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
#define STM32_LCD_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ #define STM32_LCD_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4) GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
#define STM32_LCD_RST (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ #define GPIO_NRF24L01_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN3) GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
#define STM32_LCD_RS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ #define STM32_LCD_RST (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN2) GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN3)
#define STM32_LCD_RS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN2)
/* PWN Configuration */ /* PWN Configuration */
#define STM32F103MINIMUM_PWMTIMER 3 #define STM32F103MINIMUM_PWMTIMER 3
#define STM32F103MINIMUM_PWMCHANNEL 3 #define STM32F103MINIMUM_PWMCHANNEL 3
/* nRF24 Configuration */
/* NRF24L01 chip enable: PB.1 */
#define GPIO_NRF24L01_CE (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN1)
/* NRF24L01 IRQ line: PA.0 */
#define GPIO_NRF24L01_IRQ (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTA|GPIO_PIN0)
/* USB Soft Connect Pullup: PC.13 */ /* USB Soft Connect Pullup: PC.13 */
#define GPIO_USB_PULLUP (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ #define GPIO_USB_PULLUP (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN13) GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN13)
/************************************************************************************ /************************************************************************************
* Public Functions * Public Functions
@ -180,6 +194,24 @@ void stm32_usbinitialize(void);
int stm32_pwm_setup(void); int stm32_pwm_setup(void);
#endif #endif
/************************************************************************************
* Name: stm32_wlinitialize
*
* Description:
* Initialize the NRF24L01 wireless module
*
* Input Parmeters:
* None
*
* Returned Value:
* None
*
************************************************************************************/
#ifdef CONFIG_WL_NRF24L01
void stm32_wlinitialize(void);
#endif
/************************************************************************************ /************************************************************************************
* Name: stm32_mfrc522initialize * Name: stm32_mfrc522initialize
* *

8
drivers/analog/ads1242.c
View File

@ -403,15 +403,15 @@ static void ads1242_print_regs(FAR struct ads1242_dev_s *dev, char const *msg)
uint8_t mux_reg_value = 0; uint8_t mux_reg_value = 0;
uint8_t acr_reg_value = 0; uint8_t acr_reg_value = 0;
_info("%s\n", msg); ainfo("%s\n", msg);
ads1242_read_reg(dev, ADS1242_REG_SETUP, &setup_reg_value); ads1242_read_reg(dev, ADS1242_REG_SETUP, &setup_reg_value);
ads1242_read_reg(dev, ADS1242_REG_MUX, &mux_reg_value); ads1242_read_reg(dev, ADS1242_REG_MUX, &mux_reg_value);
ads1242_read_reg(dev, ADS1242_REG_ACR, &acr_reg_value); ads1242_read_reg(dev, ADS1242_REG_ACR, &acr_reg_value);
_info("SETUP %02X\n", setup_reg_value); ainfo("SETUP %02X\n", setup_reg_value);
_info("MUX %02X\n", mux_reg_value); ainfo("MUX %02X\n", mux_reg_value);
_info("ACR %02X\n", acr_reg_value); ainfo("ACR %02X\n", acr_reg_value);
} }
#endif /* CONFIG_DEBUG_FEATURES && CONFIG_DEBUG_INFO */ #endif /* CONFIG_DEBUG_FEATURES && CONFIG_DEBUG_INFO */

4
drivers/mtd/sst26.c
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@ -337,8 +337,8 @@ static inline int sst26_readid(struct sst26_dev_s *priv)
SPI_SELECT(priv->dev, SPIDEV_FLASH, false); SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
sst26_unlock(priv->dev); sst26_unlock(priv->dev);
_info("manufacturer: %02x memory: %02x capacity: %02x\n", sstinfo("manufacturer: %02x memory: %02x capacity: %02x\n",
manufacturer, memory, capacity); manufacturer, memory, capacity);
/* Check for a valid manufacturer and memory type */ /* Check for a valid manufacturer and memory type */

2
drivers/serial/serial.c
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@ -1421,7 +1421,7 @@ int uart_register(FAR const char *path, FAR uart_dev_t *dev)
/* Register the serial driver */ /* Register the serial driver */
_info("Registering %s\n", path); sinfo("Registering %s\n", path);
return register_driver(path, &g_serialops, 0666, dev); return register_driver(path, &g_serialops, 0666, dev);
} }

4
drivers/serial/uart_16550.c
View File

@ -829,7 +829,7 @@ static int u16550_interrupt(int irq, void *context)
/* Read the modem status register (MSR) to clear */ /* Read the modem status register (MSR) to clear */
status = u16550_serialin(priv, UART_MSR_OFFSET); status = u16550_serialin(priv, UART_MSR_OFFSET);
_info("MSR: %02x\n", status); sinfo("MSR: %02x\n", status);
break; break;
} }
@ -840,7 +840,7 @@ static int u16550_interrupt(int irq, void *context)
/* Read the line status register (LSR) to clear */ /* Read the line status register (LSR) to clear */
status = u16550_serialin(priv, UART_LSR_OFFSET); status = u16550_serialin(priv, UART_LSR_OFFSET);
_info("LSR: %02x\n", status); sinfo("LSR: %02x\n", status);
break; break;
} }

2
drivers/wireless/ieee802154/mrf24j40.c
View File

@ -780,7 +780,7 @@ static int mrf24j40_settxpower(FAR struct ieee802154_dev_s *ieee,
return -EINVAL; return -EINVAL;
} }
_info("remaining attenuation: %d mBm\n",txpwr); winfo("remaining attenuation: %d mBm\n",txpwr);
switch(txpwr/100) switch(txpwr/100)
{ {

2
drivers/wireless/nrf24l01.c
View File

@ -1254,7 +1254,7 @@ int nrf24l01_register(FAR struct spi_dev_s *spi, FAR struct nrf24l01_config_s *c
/* Register the device as an input device */ /* Register the device as an input device */
iinfo("Registering " DEV_NAME "\n"); winfo("Registering " DEV_NAME "\n");
result = register_driver(DEV_NAME, &nrf24l01_fops, 0666, dev); result = register_driver(DEV_NAME, &nrf24l01_fops, 0666, dev);
if (result < 0) if (result < 0)