Updated EFM32 RTC driver from Pierre-noel Bouteville
This commit is contained in:
Gregory Nutt
parent
725e3cab72
commit
302dbd967d
@ -56,6 +56,7 @@
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#include "efm32_rmu.h"
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#include "efm32_rtc.h"
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#include "efm32_bitband.h"
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#include "clock/clock.h"
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/************************************************************************************
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@ -124,18 +125,14 @@
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# error "BOARD_BURTC_CLKSRC badly setted !"
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#endif
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#define __SEC_OFF_REG EFM32_BURTC_RET_REG(2)
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#define __BASETIME_SEC__OFF_REG EFM32_BURTC_RET_REG(3)
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#define __CNT_TOP (((uint64_t)(_BURTC_CNT_MASK))+1)
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#define __CNT_CARRY_REG EFM32_BURTC_RET_REG(0)
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#define __CNT_ZERO_REG EFM32_BURTC_RET_REG(1)
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#ifdef CONFIG_RTC_HIRES
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# define __CNT_OFF_REG EFM32_BURTC_RET_REG(0)
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# define __BASETIME_NSEC_OFF_REG EFM32_BURTC_RET_REG(1)
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#endif
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#ifndef CONFIG_DEBUG
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# define burtcdbg lldbg
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#if defined CONFIG_DEBUG && defined CONFIG_RTC_DEBUG
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# define burtcdbg lldbg
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#else
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# define burtcdbg(x...)
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# define burtcdbg(x...)
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#endif
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/************************************************************************************
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@ -199,11 +196,11 @@ static int efm32_rtc_burtc_interrupt(int irq, void *context)
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#ifdef CONFIG_RTC_HIRES
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if (source & BURTC_IF_OF)
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{
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int regval;
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uint32_t regval;
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regval = getreg32(__SEC_OFF_REG);
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regval += (_BURTC_CNT_MASK+1)/CONFIG_RTC_FREQUENCY;
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putreg32(regval,__SEC_OFF_REG);
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regval = getreg32(__CNT_CARRY_REG);
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regval++;
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putreg32(regval, __CNT_CARRY_REG);
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}
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#endif
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@ -242,42 +239,41 @@ static int efm32_rtc_burtc_interrupt(int irq, void *context)
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static void efm32_rtc_burtc_init(void)
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{
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uint32_t regval;
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uint32_t regval2;
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regval = g_efm32_rstcause;
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regval2 = getreg32(EFM32_BURTC_CTRL);
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if (!(getreg32(EFM32_BURTC_CTRL) & BURTC_CTRL_RSTEN)
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&& !(regval & RMU_RSTCAUSE_BUBODREG)
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&& !(regval & RMU_RSTCAUSE_BUBODUNREG)
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&& !(regval & RMU_RSTCAUSE_BUBODBUVIN)
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&& !(regval & RMU_RSTCAUSE_EXTRST)
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&& !(regval & RMU_RSTCAUSE_PORST)
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)
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burtcdbg("BURTC RESETCAUSE=0x%08X BURTC_CTRL=0x%08X\n", regval, regval2);
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if (!(regval2 & BURTC_CTRL_RSTEN) &&
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!(regval & RMU_RSTCAUSE_BUBODREG) &&
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!(regval & RMU_RSTCAUSE_BUBODUNREG) &&
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!(regval & RMU_RSTCAUSE_BUBODBUVIN) &&
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!(regval & RMU_RSTCAUSE_EXTRST) &&
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!(regval & RMU_RSTCAUSE_PORST))
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{
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g_efm32_burtc_reset_status = getreg32(EFM32_BURTC_STATUS);
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/* Reset timestamp BURTC clear status */
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putreg32(BURTC_CMD_CLRSTATUS,EFM32_BURTC_CMD);
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putreg32(BURTC_CMD_CLRSTATUS, EFM32_BURTC_CMD);
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/* restore saved base time */
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g_basetime.tv_sec = __BASETIME_SEC__OFF_REG;
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#ifdef CONFIG_RTC_HIRES
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g_basetime.tv_nsec = __BASETIME_NSEC_OFF_REG;
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#else
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g_basetime.tv_nsec = 0;
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#endif
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burtcdbg("BURTC OK\n");
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return;
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}
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burtcdbg("BURTC RESETED\n");
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/* Disable reset of BackupDomain */
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modifyreg32(EFM32_RMU_CTRL,_RMU_CTRL_BURSTEN_MASK,0);
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bitband_set_peripheral(EFM32_RMU_CTRL, _RMU_CTRL_BURSTEN_SHIFT, 0);
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/* Make sure all registers are updated simultaneously */
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putreg32(BURTC_FREEZE_REGFREEZE_FREEZE,EFM32_BURTC_FREEZE);
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putreg32(BURTC_FREEZE_REGFREEZE_FREEZE, EFM32_BURTC_FREEZE);
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/* Restore all not setted BURTC registers to default value */
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@ -297,42 +293,75 @@ static void efm32_rtc_burtc_init(void)
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/* Clear interrupts */
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putreg32(0xFFFFFFFF,EFM32_BURTC_IFC);
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putreg32(0xFFFFFFFF, EFM32_BURTC_IFC);
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/* Set new configuration */
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putreg32(regval|BURTC_CTRL_RSTEN,EFM32_BURTC_CTRL);
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putreg32(regval | BURTC_CTRL_RSTEN, EFM32_BURTC_CTRL);
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/* Clear freeze */
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putreg32(0,EFM32_BURTC_FREEZE);
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putreg32(0, EFM32_BURTC_FREEZE);
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/* To enable BURTC counter, we need to disable reset */
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putreg32(regval,EFM32_BURTC_CTRL);
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putreg32(regval, EFM32_BURTC_CTRL);
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/* Enable BURTC interrupt on compare match and counter overflow */
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putreg32(BURTC_IF_OF|BURTC_IF_LFXOFAIL, EFM32_BURTC_IEN);
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putreg32(BURTC_IF_OF | BURTC_IF_LFXOFAIL, EFM32_BURTC_IEN);
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/* Lock BURTC to avoid modification */
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putreg32(BURTC_LOCK_LOCKKEY_LOCK,EFM32_BURTC_LOCK);
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putreg32(BURTC_LOCK_LOCKKEY_LOCK, EFM32_BURTC_LOCK);
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/* reset BURTC retention REG used */
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putreg32(0,__CNT_OFF_REG);
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putreg32(0,__SEC_OFF_REG);
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putreg32(0,__BASETIME_SEC__OFF_REG);
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#ifdef CONFIG_RTC_HIRES
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putreg32(0,__BASETIME_NSEC_OFF_REG);
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#endif
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putreg32(0, __CNT_CARRY_REG);
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putreg32(0, __CNT_ZERO_REG);
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/* inform rest of software that BURTC was reset at boot */
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g_efm32_burtc_reseted = true;
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}
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static uint64_t efm32_get_burtc_tick(void)
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{
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uint32_t cnt_carry;
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uint32_t cnt_zero;
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uint32_t cnt;
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uint64_t val;
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irqstate_t flags;
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flags = irqsave();
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do
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{
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/* pending IRQ so theat it */
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if (getreg32(EFM32_BURTC_IF) & BURTC_IF_COMP0)
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{
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efm32_rtc_burtc_interrupt(EFM32_IRQ_BURTC, NULL);
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}
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cnt = getreg32(EFM32_BURTC_CNT);
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cnt_zero = getreg32(__CNT_ZERO_REG);
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cnt_carry = getreg32(__CNT_CARRY_REG);
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}
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/* Retry if IRQ appear during register reading */
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while (getreg32(EFM32_BURTC_IF) & BURTC_IF_COMP0);
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irqrestore(flags);
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val = (uint64_t)cnt_carry*__CNT_TOP + cnt + cnt_zero;
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burtcdbg("Get Tick carry %u zero %u reg %u\n", cnt_carry, cnt_carry,cnt);
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return val;
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}
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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@ -387,28 +416,7 @@ int up_rtcinitialize(void)
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#ifndef CONFIG_RTC_HIRES
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time_t up_rtc_time(void)
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{
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time_t t;
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irqstate_t flags;
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flags = irqsave();
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do
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{
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/* pending IRQ so theat it */
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if (getreg32(EFM32_BURTC_IF) & BURTC_IF_COMP0)
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efm32_rtc_burtc_interrupt(EFM32_IRQ_BURTC,NULL);
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t = getreg32(__SEC_OFF_REG) + getreg32(EFM32_BURTC_CNT);
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}
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/* Retry if IRQ appear during register reading */
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while (getreg32(EFM32_BURTC_IF) & BURTC_IF_COMP0);
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irqrestore(flags);
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return t;
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return (time_t)efm32_get_burtc_tick()/CONFIG_RTC_FREQUENCY;
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}
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#endif
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@ -431,36 +439,16 @@ time_t up_rtc_time(void)
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#ifdef CONFIG_RTC_HIRES
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int up_rtc_gettime(FAR struct timespec *tp)
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{
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time_t t;
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uint32_t hires_val;
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irqstate_t flags;
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uint64_t val;
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flags = irqsave();
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do
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{
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/* pending IRQ so theat it */
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if (getreg32(EFM32_BURTC_IF) & BURTC_IF_COMP0)
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efm32_rtc_burtc_interrupt(EFM32_IRQ_BURTC,NULL);
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t = getreg32(__SEC_OFF_REG);
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hires_val = getreg32(EFM32_BURTC_CNT) + getreg32(__CNT_OFF_REG);
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}
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/* Retry if IRQ appear during register reading */
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while (getreg32(EFM32_BURTC_IF) & BURTC_IF_COMP0);
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irqrestore(flags);
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t += hires_val / CONFIG_RTC_FREQUENCY;
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hires_val = hires_val % CONFIG_RTC_FREQUENCY;
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val = efm32_get_burtc_tick();
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/* Then we can save the time in seconds and fractional seconds. */
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tp->tv_sec = t;
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tp->tv_nsec = hires_val * (1000000000/CONFIG_RTC_FREQUENCY);
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tp->tv_sec = val / CONFIG_RTC_FREQUENCY;
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tp->tv_nsec = (val % CONFIG_RTC_FREQUENCY)*(NSEC_PER_SEC/CONFIG_RTC_FREQUENCY);
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burtcdbg("Get RTC %u.%09u\n", tp->tv_sec, tp->tv_nsec);
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return OK;
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}
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@ -483,14 +471,38 @@ int up_rtc_gettime(FAR struct timespec *tp)
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int up_rtc_settime(FAR const struct timespec *tp)
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{
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uint32_t cnt_carry;
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uint32_t cnt;
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uint32_t cnt_reg;
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uint64_t val;
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irqstate_t flags;
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flags = irqsave();
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putreg32(g_basetime.tv_sec, __BASETIME_SEC__OFF_REG);
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#ifdef CONFIG_RTC_HIRES
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putreg32(g_basetime.tv_nsec,__BASETIME_NSEC_OFF_REG);
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#endif
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cnt_reg = getreg32(EFM32_BURTC_CNT);
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/* Compute Burtc offset because we cannot reset counter */
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val = (((uint64_t)tp->tv_sec) * CONFIG_RTC_FREQUENCY) + \
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(tp->tv_nsec / (NSEC_PER_SEC / CONFIG_RTC_FREQUENCY));
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if (val < cnt_reg)
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{
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val = 0;
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}
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else
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{
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val -= cnt_reg;
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}
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cnt_carry = val / __CNT_TOP;
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cnt = val % __CNT_TOP;
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burtcdbg("Set RTC %u.%09u carry %u zero %u reg %u\n",
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tp->tv_sec, tp->tv_nsec, cnt_carry, cnt, cnt_reg);
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putreg32(cnt_carry, __CNT_CARRY_REG);
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putreg32(cnt , __CNT_ZERO_REG);
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irqrestore(flags);
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return OK;
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