Cosmetic changes from review of last PR
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@ -1189,6 +1189,13 @@ static int up_dma_nextrx(struct up_dev_s *priv)
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static void up_set_format(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
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uint32_t usartdiv8;
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#else
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uint32_t usartdiv32;
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uint32_t mantissa;
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uint32_t fraction;
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#endif
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uint32_t regval;
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uint32_t brr;
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@ -1201,11 +1208,8 @@ static void up_set_format(struct uart_dev_s *dev)
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* by 8 in additional to the standard oversampling by 16.
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* With baud rate of fCK / Divider for oversampling by 16.
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* and baud rate of 2 * fCK / Divider for oversampling by 8
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*/
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uint32_t usartdiv8;
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/* In case of oversampling by 8, the equation is:
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*
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* In case of oversampling by 8, the equation is:
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*
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* baud = 2 * fCK / usartdiv8
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* usartdiv8 = 2 * fCK / baud
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@ -1219,10 +1223,10 @@ static void up_set_format(struct uart_dev_s *dev)
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* baud = fCK / usartdiv16
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* usartdiv16 = fCK / baud
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* = 2 * usartdiv8
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*
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* Use oversamply by 8 only if the divisor is small. But what is small?
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*/
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/* Use oversamply by 8 only if the divisor is small. But what is small? */
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if (usartdiv8 > 100)
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{
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/* Use usartdiv16 */
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@ -1247,16 +1251,10 @@ static void up_set_format(struct uart_dev_s *dev)
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}
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#else
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/* This second implementation is for U[S]ARTs that support fractional
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* dividers.
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*/
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uint32_t usartdiv32;
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uint32_t mantissa;
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uint32_t fraction;
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/* Configure the USART Baud Rate. The baud rate for the receiver and
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*
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* Configure the USART Baud Rate. The baud rate for the receiver and
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* transmitter (Rx and Tx) are both set to the same value as programmed
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* in the Mantissa and Fraction values of USARTDIV.
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*
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@ -1283,9 +1281,9 @@ static void up_set_format(struct uart_dev_s *dev)
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fraction = (usartdiv32 - (mantissa << 5) + 1) >> 1;
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#if defined(CONFIG_STM32_STM32F40XX)
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/* The F4 supports 8 X in oversampling additional to the
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* standard oversampling by 16.
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*
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* With baud rate of fCK / (16 * Divider) for oversampling by 16.
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* and baud rate of fCK / (8 * Divider) for oversampling by 8
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*/
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@ -1300,18 +1298,20 @@ static void up_set_format(struct uart_dev_s *dev)
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mantissa = usartdiv32 >> 4;
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/* The fractional remainder (with rounding) */
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/* The fractional remainder (with rounding) */
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fraction = (usartdiv32 - (mantissa << 4) + 1) >> 1;
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fraction = (usartdiv32 - (mantissa << 4) + 1) >> 1;
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}
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else
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{/* Use 16x Oversampling */
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{
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/* Use 16x Oversampling */
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regval &= ~USART_CR1_OVER8;
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}
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#endif
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brr = mantissa << USART_BRR_MANT_SHIFT;
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brr |= fraction << USART_BRR_FRAC_SHIFT;
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brr = mantissa << USART_BRR_MANT_SHIFT;
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brr |= fraction << USART_BRR_FRAC_SHIFT;
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#endif
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up_serialout(priv, STM32_USART_CR1_OFFSET, regval);
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@ -1364,7 +1364,8 @@ static void up_set_format(struct uart_dev_s *dev)
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regval = up_serialin(priv, STM32_USART_CR3_OFFSET);
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regval &= ~(USART_CR3_CTSE | USART_CR3_RTSE);
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#if defined(CONFIG_SERIAL_IFLOWCONTROL) && !defined(CONFIG_STM32_FLOWCONTROL_BROKEN)
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#if defined(CONFIG_SERIAL_IFLOWCONTROL) && \
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!defined(CONFIG_STM32_FLOWCONTROL_BROKEN)
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if (priv->iflow && (priv->rts_gpio != 0))
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{
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regval |= USART_CR3_RTSE;
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