fix nxstyle issues
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@ -71,7 +71,9 @@
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#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
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#define STM32_LSE_FREQUENCY 32768 /* X2 on board */
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/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */
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/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is
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* 8MHz (XTAL) x 9 = 72MHz
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*/
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#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC
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#define STM32_CFGR_PLLXTPRE 0
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@ -138,6 +140,7 @@
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#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY
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/* LED definitions **********************************************************/
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/* The Nucleo F302R8 board has three LEDs. Two of these are controlled by
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* logic on the board and are not available for software control:
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*
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@ -191,6 +194,7 @@
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#define LED_PANIC 1
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/* Button definitions *******************************************************/
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/* The Nucleo F302R8 supports two buttons; only one button is controllable
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* by software:
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*
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@ -236,6 +240,7 @@
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#define GPIO_TIM2_CH3OUT GPIO_TIM2_CH3OUT_1 /* PA9 */
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/* DMA channels *************************************************************/
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/* ADC */
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#define ADC1_DMA_CHAN DMACHAN_ADC1 /* DMA1_CH1 */
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@ -71,7 +71,9 @@
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#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
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#define STM32_LSE_FREQUENCY 32768 /* X2 on board */
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/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */
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/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is
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* 8MHz (XTAL) x 9 = 72MHz
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*/
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#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC
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#define STM32_CFGR_PLLXTPRE 0
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@ -136,6 +138,7 @@
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#define BOARD_HRTIM1_FREQUENCY STM32_HCLK_FREQUENCY
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/* LED definitions **********************************************************/
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/* The Nucleo F334R8 board has three LEDs. Two of these are controlled by
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* logic on the board and are not available for software control:
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*
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@ -189,6 +192,7 @@
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#define LED_PANIC 1
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/* Button definitions *******************************************************/
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/* The Nucleo F334R8 supports two buttons; only one button is controllable
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* by software:
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*
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@ -203,6 +207,7 @@
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#define BUTTON_USER_BIT (1 << BUTTON_USER)
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/* Alternate function pin selections ****************************************/
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/* CAN */
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#define GPIO_CAN1_RX GPIO_CAN_RX_2
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@ -333,6 +338,7 @@
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#endif /* CONFIG_NUCLEOF334R8_SPWM */
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/* DMA channels *************************************************************/
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/* ADC */
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#define ADC1_DMA_CHAN DMACHAN_ADC1 /* DMA1_CH1 */
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