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LPC1788 SD Card driver updates from Rommel Marcelo

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5753 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2013-03-17 23:40:53 +00:00
parent 56ce985e7f
commit 3185d5492b
5 changed files with 79 additions and 17 deletions
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4
ChangeLog
View File

@ -4359,6 +4359,6 @@
trampoline (2013-03-16).
* arch/arm/include/armv[6|7]-m/irq.h, and arch/arm/src/armv[6|7]-m/up_svcall.c:
Add support for nested system calls. In the current design, this can
happen only under one condition: When the kernel system function calls
happen only under one condition: When the kernel system call logic calls
back into user space in order to allocate user space memory. So it is
expected that the maximum nesting level will be only 2.
expected that the maximum nesting level will be only 2 (2013-03-17).

8
arch/arm/include/lpc17xx/lpc178x_irq.h
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@ -48,7 +48,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
* directly to bits in the NVIC. This does, however, waste several words of
* memory in the IRQ to handle mapping tables.
@ -167,8 +167,8 @@
*/
#ifdef CONFIG_GPIO_IRQ
//~ # define LPC17_VALID_GPIOINT0 (0x7fff8ffful) /* GPIO port 0 interrrupt set */
//~ # define LPC17_VALID_GPIOINT2 (0x00003ffful) /* GPIO port 2 interrupt set */
# define LPC17_VALID_GPIOINT0 (0xfffffffful) /* GPIO port 0 interrrupt set */
# define LPC17_VALID_GPIOINT2 (0xfffffffful) /* GPIO port 2 interrupt set */
/* Set 1: 16 interrupts p0.0-p0.15 */
@ -264,7 +264,7 @@
# define LPC17_IRQ_P2p30 (LPC17_VALID_FIRST2H+14)
# define LPC17_IRQ_P2p31 (LPC17_VALID_FIRST2H+15)
# define LPC17_VALID_NIRQS2H (16)
# define LPC17_NGPIOAIRQS (LPC17_VALID_NIRQS0L+LPC17_VALID_NIRQS0H+LPC17_VALID_NIRQS2L+LPC17_VALID_NIRQS2H)
#else
# define LPC17_NGPIOAIRQS (0)

71
arch/arm/src/lpc17xx/lpc17_gpioint.c
View File

@ -169,12 +169,31 @@ static int lpc17_irq2port(int irq)
return 0;
}
#if defined (LPC176x)
/* Set 3: 14 interrupts p2.0-p2.13 */
else if (irq >= LPC17_VALID_FIRST2 && irq < (LPC17_VALID_FIRST2+LPC17_VALID_NIRQS2))
{
return 2;
}
#elif defined (LPC178x)
/* Set 3: 15 interrupts p2.0-p2.15 */
else if (irq >= LPC17_VALID_FIRST2L && irq < (LPC17_VALID_FIRST2L+LPC17_VALID_NIRQS2L))
{
return 2;
}
/* Set 4: 15 interrupts p2.16-p2.30 */
else if (irq >= LPC17_VALID_FIRST2H && irq < (LPC17_VALID_FIRST2L+LPC17_VALID_NIRQS2H))
{
return 2;
}
#endif
return -EINVAL;
}
@ -189,7 +208,7 @@ static int lpc17_irq2port(int irq)
static int lpc17_irq2pin(int irq)
{
/* Set 1: 12 interrupts p0.0-p0.11
*
*
* See arch/arm/include/lpc17xx/irq.h:
* LPC17_VALID_SHIFT0L 0 - Bit 0 is thre first bit in the group of 12 interrupts
* LPC17_VALID_FIRST0L irq - IRQ number associated with p0.0
@ -202,7 +221,7 @@ static int lpc17_irq2pin(int irq)
}
/* Set 2: 16 interrupts p0.15-p0.30
*
*
* LPC17_VALID_SHIFT0H 15 - Bit 15 is the first bit in a group of 16 interrupts
* LPC17_VALID_FIRST0L irq - IRQ number associated with p0.15
* LPC17_VALID_NIRQS0L 16 - 16 interrupt bits in the group
@ -213,8 +232,9 @@ static int lpc17_irq2pin(int irq)
return irq - LPC17_VALID_FIRST0H + LPC17_VALID_SHIFT0H;
}
#if defined(LPC176x)
/* Set 3: 14 interrupts p2.0-p2.13
*
*
* LPC17_VALID_SHIFT2 0 - Bit 0 is the first bit in a group of 14 interrupts
* LPC17_VALID_FIRST2 irq - IRQ number associated with p2.0
* LPC17_VALID_NIRQS2 14 - 14 interrupt bits in the group
@ -224,9 +244,38 @@ static int lpc17_irq2pin(int irq)
{
return irq - LPC17_VALID_FIRST2 + LPC17_VALID_SHIFT2;
}
#elif defined(LPC178x)
/* Set 3: 15 interrupts p2.0-p2.15
*
* LPC17_VALID_SHIFT2L 0 - Bit 0 is the first bit in a group of 14 interrupts
* LPC17_VALID_FIRST2L irq - IRQ number associated with p2.0
* LPC17_VALID_NIRQS2L 15 - 15 interrupt bits in the group
*/
else if (irq >= LPC17_VALID_FIRST2L && irq < (LPC17_VALID_FIRST2L+LPC17_VALID_NIRQS2L))
{
return irq - LPC17_VALID_FIRST2L + LPC17_VALID_SHIFT2L;
}
/* Set 3: 15 interrupts p2.16-p2.30
*
* LPC17_VALID_SHIFT2H 0 - Bit 0 is the first bit in a group of 14 interrupts
* LPC17_VALID_FIRST2H irq - IRQ number associated with p2.0
* LPC17_VALID_NIRQS2H 15 - 15 interrupt bits in the group
*/
else if (irq >= LPC17_VALID_FIRST2H && irq < (LPC17_VALID_FIRST2H+LPC17_VALID_NIRQS2H))
{
return irq - LPC17_VALID_FIRST2H + LPC17_VALID_SHIFT2H;
}
#endif
return -EINVAL;
}
/****************************************************************************
* Name: lpc17_gpiodemux
*
@ -292,7 +341,7 @@ static void lpc17_gpiodemux(uint32_t intbase, uint32_t intmask,
irq++;
}
/* Next bit */
intstatus &= ~bit;
@ -324,6 +373,7 @@ static int lpc17_gpiointerrupt(int irq, void *context)
LPC17_VALID_FIRST0L, context);
}
#if defined(LPC176x)
/* Check for an interrupt on GPIO2 */
if ((intstatus & GPIOINT_IOINTSTATUS_P2INT) != 0)
@ -332,6 +382,17 @@ static int lpc17_gpiointerrupt(int irq, void *context)
LPC17_VALID_FIRST2, context);
}
#elif defined(LPC178x)
/* Check for an interrupt on GPIO2 */
if ((intstatus & GPIOINT_IOINTSTATUS_P2INT) != 0)
{
lpc17_gpiodemux(LPC17_GPIOINT2_BASE, LPC17_VALID_GPIOINT2,
LPC17_VALID_FIRST2L, context);
}
#endif
return OK;
}

3
arch/arm/src/lpc17xx/lpc17_sdcard.c
View File

@ -622,7 +622,7 @@ static void lpc17_setpwrctrl(uint32_t pwrctrl)
/* Set the new value of the PWRCTRL field of the PWR register. Also, as a
* side-effect, clear the OPENDRAIN and ROD bits as well.
*/
regval = getreg32(LPC17_SDCARD_PWR);
regval &= ~(SDCARD_PWR_CTRL_MASK | SDCARD_PWR_OPENDRAIN | SDCARD_PWR_ROD);
regval |= pwrctrl;
@ -1567,6 +1567,7 @@ static void lpc17_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
case CLOCK_MMC_TRANSFER:
clkcr = (SDCARD_CLOCK_MMCXFR | SDCARD_CLOCK_CLKEN);
lpc17_setpwrctrl(SDCARD_PWR_OPENDRAIN);
break;
/* SD normal operation clocking (wide 4-bit mode) */

10
configs/open1788/include/board.h
View File

@ -152,21 +152,21 @@
*/
#define SDCARD_CLKDIV_INIT 74 /* 400Khz */
#define SDCARD_INIT_CLKDIV (SDCARD_CLKDIV_INIT+1)
#define SDCARD_INIT_CLKDIV (SDCARD_CLKDIV_INIT)
#define SDCARD_NORMAL_CLKDIV 1 /* DMA ON: SDCARD_CLOCK=15MHz */
#define SDCARD_SLOW_CLKDIV 2 /* DMA OFF: SDCARD_CLOCK=10MHz */
#ifdef CONFIG_SDIO_DMA
# define SDCARD_MMCXFR_CLKDIV (SDCARD_NORMAL_CLKDIV+1)
# define SDCARD_MMCXFR_CLKDIV (SDCARD_NORMAL_CLKDIV)
#else
# define SDCARD_MMCXFR_CLKDIV (SDCARD_SLOW_CLKDIV+1)
# define SDCARD_MMCXFR_CLKDIV (SDCARD_SLOW_CLKDIV)
#endif
#ifdef CONFIG_SDIO_DMA
# define SDCARD_SDXFR_CLKDIV (SDCARD_NORMAL_CLKDIV+1)
# define SDCARD_SDXFR_CLKDIV (SDCARD_NORMAL_CLKDIV)
#else
# define SDCARD_SDXFR_CLKDIV (SDCARD_SLOW_CLKDIV+1)
# define SDCARD_SDXFR_CLKDIV (SDCARD_SLOW_CLKDIV)
#endif
/* Set EMC delay values: