From 318dd06f8bf44c851b42a5c6d71455ed98b4d612 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 26 Nov 2017 06:51:12 -0600 Subject: [PATCH] arch/arm/src/stm32: Fix compile error when trace is enabled. I2CEVENT_ERROR was used but never defined. --- arch/arm/src/stm32/stm32_i2c_alt.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/src/stm32/stm32_i2c_alt.c b/arch/arm/src/stm32/stm32_i2c_alt.c index 18dde6c80c..a2cd2156ec 100644 --- a/arch/arm/src/stm32/stm32_i2c_alt.c +++ b/arch/arm/src/stm32/stm32_i2c_alt.c @@ -208,6 +208,7 @@ static const uint16_t I2CEVENT_ISR_SHUTDOWN = 1001; /* ISR gets shutdown static const uint16_t I2CEVENT_ISR_EMPTY_CALL = 1002; /* ISR gets called but no I2C logic comes into play */ static const uint16_t I2CEVENT_MSG_HANDLING = 1003; /* Message Handling 1/1: advances the msg processing param = msgc */ static const uint16_t I2CEVENT_POLL_DEV_NOT_RDY = 1004; /* During polled operation if device is not ready yet */ +static const uint16_t I2CEVENT_ISR_SR1ERROR = 1005; /* ERROR set in SR1 at end of transfer */ static const uint16_t I2CEVENT_ISR_CALL = 1111; /* ISR called */ static const uint16_t I2CEVENT_SENDADDR = 5; /* Start/Master bit set and address sent, param = priv->msgv->addr(EV5 in reference manual) */ @@ -1824,7 +1825,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv) * device wasn't ready yet. */ - else + else { #ifdef CONFIG_I2C_POLLED stm32_i2c_traceevent(priv, I2CEVENT_POLL_DEV_NOT_RDY, 0); @@ -1836,7 +1837,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv) i2cerr("ERROR: No correct state detected(start bit, read or write) \n"); i2cerr(" state %i\n", status); - /* set condition to terminate ISR and wake waiting thread */ + /* Set condition to terminate ISR and wake waiting thread */ priv->dcnt = -1; priv->msgc = 0; @@ -1855,7 +1856,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv) if ((status & I2C_SR1_ERRORMASK) != 0) { - stm32_i2c_traceevent(priv, I2CEVENT_ERROR, status & I2C_SR1_ERRORMASK); + stm32_i2c_traceevent(priv, I2CEVENT_ISR_SR1ERROR, status & I2C_SR1_ERRORMASK); /* Clear interrupt flags */