For STM32 F3, need to use ICR register to clear some U[S]ART interrupts
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5632 42af7a65-404d-4744-a932-0658087f49c3
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@ -167,7 +167,9 @@
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#define USART_CR1_RTOIE (1 << 26) /* Bit 26: Receiver timeout interrupt enable */
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#define USART_CR1_EOBIE (1 << 27) /* Bit 27: End of Block interrupt enable */
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#define USART_CR1_ALLINTS (USART_CR1_IDLEIE|USART_CR1_RXNEIE|USART_CR1_TCIE|USART_CR1_TXEIE|USART_CR1_PEIE|USART_CR1_CMIE|USART_CR1_RTOIE|USART_CR1_EOBIE)
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#define USART_CR1_ALLINTS \
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(USART_CR1_IDLEIE | USART_CR1_RXNEIE | USART_CR1_TCIE | USART_CR1_TXEIE |\
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USART_CR1_PEIE | USART_CR1_CMIE |USART_CR1_RTOIE | USART_CR1_EOBIE)
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/* Control register 2 */
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@ -289,17 +291,31 @@
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#define USART_ISR_ALLBITS (0x007fdfff)
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/* Interrupt flag clear register */
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#define USART_ICR_
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#define USART_ICR_PECF (1 << 0) /* Bit 0: Parity error clear flag */
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#define USART_ICR_FECF (1 << 1) /* Bit 1: Framing error clear flag */
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#define USART_ICR_NCF (1 << 2) /* Bit 2: Noise detected flag *clear flag */
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#define USART_ICR_ORECF (1 << 3) /* Bit 3: Overrun error clear flag */
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#define USART_ICR_IDLECF (1 << 4) /* Bit 4: Idle line detected clear flag */
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#define USART_ICR_TCCF (1 << 6) /* Bit 6: Transmission complete */
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#define USART_ICR_LBDCF (1 << 8) /* Bit 8: LIN break detection clear flag */
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#define USART_ICR_CTSCF (1 << 9) /* Bit 9: CTS interrupt clear flag */
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#define USART_ICR_RTOCF (1 << 11) /* Bit 11: Receiver timeout clear flag */
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#define USART_ICR_EOBCF (1 << 12) /* Bit 12: End of block clear flag */
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#define USART_ICR_CMCF (1 << 17) /* Bit 17: Character match clear flag */
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#define USART_ICR_WUCF (1 << 20) /* Bit 20: Wakeup from Stop mode clear flag */
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#define USART_ICR_ALLBITS (0x00121b5f)
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/* Receive data register */
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#define USART_RDR_
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#define USART_RDR_SHIFT (0) /* Bits 8:0: Receive data value */
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#define USART_RDR_MASK (0x1ff << USART_RDR_SHIFT)
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/* Transmit data register */
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#define USART_TDR_
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/* Data register */
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#define USART_DR_SHIFT (0) /* Bits 8:0: Data value */
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#define USART_DR_MASK (0xff << USART_DR_SHIFT)
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#define USART_TDR_SHIFT (0) /* Bits 8:0: Transmit data value */
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#define USART_TDR_MASK (0x1ff << USART_TDR_SHIFT)
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/* Compatibility definitions ********************************************************/
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/* F1/F2/F4 Status register */
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@ -876,20 +876,20 @@ static inline void up_disableusartint(struct up_dev_s *priv, uint16_t *ie)
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/* USART interrupts:
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*
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* Enable Bit Status Meaning Usage
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* ------------------ --- --------------- ------------------------------ ----------
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* USART_CR1_IDLEIE 4 USART_SR_IDLE Idle Line Detected (not used)
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* USART_CR1_RXNEIE 5 USART_SR_RXNE Received Data Ready to be Read
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* " " USART_SR_ORE Overrun Error Detected
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* USART_CR1_TCIE 6 USART_SR_TC Transmission Complete (used only for RS-485)
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* USART_CR1_TXEIE 7 USART_SR_TXE Transmit Data Register Empty
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* USART_CR1_PEIE 8 USART_SR_PE Parity Error
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* Enable Status Meaning Usage
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* ------------------ --------------- ------------------------------ ----------
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* USART_CR1_IDLEIE USART_SR_IDLE Idle Line Detected (not used)
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* USART_CR1_RXNEIE USART_SR_RXNE Received Data Ready to be Read
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* " " USART_SR_ORE Overrun Error Detected
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* USART_CR1_TCIE USART_SR_TC Transmission Complete (used only for RS-485)
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* USART_CR1_TXEIE USART_SR_TXE Transmit Data Register Empty
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* USART_CR1_PEIE USART_SR_PE Parity Error
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*
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* USART_CR2_LBDIE 6 USART_SR_LBD Break Flag (not used)
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* USART_CR3_EIE 0 USART_SR_FE Framing Error
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* " " USART_SR_NE Noise Error
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* " " USART_SR_ORE Overrun Error Detected
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* USART_CR3_CTSIE 10 USART_SR_CTS CTS flag (not used)
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* USART_CR2_LBDIE USART_SR_LBD Break Flag (not used)
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* USART_CR3_EIE USART_SR_FE Framing Error
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* " " USART_SR_NE Noise Error
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* " " USART_SR_ORE Overrun Error Detected
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* USART_CR3_CTSIE USART_SR_CTS CTS flag (not used)
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*/
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cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
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@ -1354,20 +1354,20 @@ static int up_interrupt_common(struct up_dev_s *priv)
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/* USART interrupts:
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*
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* Enable Bit Status Meaning Usage
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* ------------------ --- --------------- ------------------------------- ----------
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* USART_CR1_IDLEIE 4 USART_SR_IDLE Idle Line Detected (not used)
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* USART_CR1_RXNEIE 5 USART_SR_RXNE Received Data Ready to be Read
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* " " USART_SR_ORE Overrun Error Detected
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* USART_CR1_TCIE 6 USART_SR_TC Transmission Complete (used only for RS-485)
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* USART_CR1_TXEIE 7 USART_SR_TXE Transmit Data Register Empty
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* USART_CR1_PEIE 8 USART_SR_PE Parity Error
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* Enable Status Meaning Usage
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* ------------------ --------------- ------------------------------- ----------
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* USART_CR1_IDLEIE USART_SR_IDLE Idle Line Detected (not used)
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* USART_CR1_RXNEIE USART_SR_RXNE Received Data Ready to be Read
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* " " USART_SR_ORE Overrun Error Detected
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* USART_CR1_TCIE USART_SR_TC Transmission Complete (used only for RS-485)
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* USART_CR1_TXEIE USART_SR_TXE Transmit Data Register Empty
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* USART_CR1_PEIE USART_SR_PE Parity Error
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*
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* USART_CR2_LBDIE 6 USART_SR_LBD Break Flag (not used)
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* USART_CR3_EIE 0 USART_SR_FE Framing Error
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* " " USART_SR_NE Noise Error
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* " " USART_SR_ORE Overrun Error Detected
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* USART_CR3_CTSIE 10 USART_SR_CTS CTS flag (not used)
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* USART_CR2_LBDIE USART_SR_LBD Break Flag (not used)
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* USART_CR3_EIE USART_SR_FE Framing Error
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* " " USART_SR_NE Noise Error
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* " " USART_SR_ORE Overrun Error Detected
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* USART_CR3_CTSIE USART_SR_CTS CTS flag (not used)
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*
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* NOTE: Some of these status bits must be cleared by explicity writing zero
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* to the SR register: USART_SR_CTS, USART_SR_LBD. Note of those are currently
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@ -1407,6 +1407,14 @@ static int up_interrupt_common(struct up_dev_s *priv)
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else if ((priv->sr & (USART_SR_ORE | USART_SR_NE | USART_SR_FE)) != 0)
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{
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#ifdef CONFIG_STM32_STM32F30XX
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/* These errors are cleared by writing the corresponding bit to the
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* interrupt clear register (ICR).
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*/
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up_serialout(priv, STM32_USART_ICR_OFFSET,
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(USART_ICR_NCF | USART_ICR_ORECF | USART_ICR_FECF));
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#else
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/* If an error occurs, read from DR to clear the error (data has
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* been lost). If ORE is set along with RXNE then it tells you
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* that the byte *after* the one in the data register has been
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@ -1416,6 +1424,7 @@ static int up_interrupt_common(struct up_dev_s *priv)
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*/
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(void)up_serialin(priv, STM32_USART_RDR_OFFSET);
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#endif
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}
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/* Handle outgoing, transmit bytes */
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@ -1608,17 +1617,17 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
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/* USART receive interrupts:
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*
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* Enable Bit Status Meaning Usage
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* ------------------ --- --------------- ------------------------------- ----------
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* USART_CR1_IDLEIE 4 USART_SR_IDLE Idle Line Detected (not used)
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* USART_CR1_RXNEIE 5 USART_SR_RXNE Received Data Ready to be Read
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* " " USART_SR_ORE Overrun Error Detected
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* USART_CR1_PEIE 8 USART_SR_PE Parity Error
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* Enable Status Meaning Usage
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* ------------------ --------------- ------------------------------- ----------
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* USART_CR1_IDLEIE USART_SR_IDLE Idle Line Detected (not used)
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* USART_CR1_RXNEIE USART_SR_RXNE Received Data Ready to be Read
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* " " USART_SR_ORE Overrun Error Detected
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* USART_CR1_PEIE USART_SR_PE Parity Error
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*
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* USART_CR2_LBDIE 6 USART_SR_LBD Break Flag (not used)
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* USART_CR3_EIE 0 USART_SR_FE Framing Error
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* " " USART_SR_NE Noise Error
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* " " USART_SR_ORE Overrun Error Detected
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* USART_CR2_LBDIE USART_SR_LBD Break Flag (not used)
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* USART_CR3_EIE USART_SR_FE Framing Error
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* " " USART_SR_NE Noise Error
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* " " USART_SR_ORE Overrun Error Detected
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*/
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flags = irqsave();
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@ -1775,11 +1784,11 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
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/* USART transmit interrupts:
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*
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* Enable Bit Status Meaning Usage
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* ------------------ --- --------------- ---------------------------- ----------
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* USART_CR1_TCIE 6 USART_SR_TC Transmission Complete (used only for RS-485)
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* USART_CR1_TXEIE 7 USART_SR_TXE Transmit Data Register Empty
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* USART_CR3_CTSIE 10 USART_SR_CTS CTS flag (not used)
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* Enable Status Meaning Usage
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* ------------------ --------------- ---------------------------- ----------
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* USART_CR1_TCIE USART_SR_TC Transmission Complete (used only for RS-485)
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* USART_CR1_TXEIE USART_SR_TXE Transmit Data Register Empty
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* USART_CR3_CTSIE USART_SR_CTS CTS flag (not used)
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*/
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flags = irqsave();
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