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Misoc LM32: Corrects a bug that never occured in qemu on simulation or real fpga. The error was that the r1 register was being modified out of context switching and not restoring it.

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Ramtin Amin 2016-11-14 07:18:33 -06:00 committed by Gregory Nutt
parent a6b7730f8c
commit 31d9565f0f
1 changed files with 3 additions and 3 deletions
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6
arch/misoc/src/lm32/lm32_vectors.S
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@ -240,7 +240,6 @@ _do_reset:
.restore_all_and_eret:
/* r1 should have the place where we restore ! */
lw r2, (r1+REG_X2)
lw r3, (r1+REG_X3)
lw r4, (r1+REG_X4)
lw r5, (r1+REG_X5)
@ -270,8 +269,9 @@ _do_reset:
lw r29, (r1+REG_RA)
lw r30, (r1+REG_EA)
lw r31, (r1+REG_BA)
lw r1, (r1+REG_INT_CTX)
wcsr IE, r1
lw r2, (r1+REG_INT_CTX)
wcsr IE, r2
lw r2, (r1+REG_X2)
lw r1, (r1+REG_X1)
eret