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Enhance STM32 QEncoder driver with configurable input filters

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Current driver applies a fixed filter of f_sample=f_dts/4, N=6. This can
potentially be insufficient in noisy environments, or too slow for really
fast encoder sources, so let the user set it from the Kconfig file

Signed-off-by: Marten Svanfeldt <marten@intuitiveaerial.com>
This commit is contained in:
Marten Svanfeldt 2015-10-21 11:05:38 +08:00
parent ddf936c913
commit 3299a31b27
2 changed files with 129 additions and 2 deletions
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68
arch/arm/src/stm32/Kconfig
View File

@ -4307,3 +4307,71 @@ endmenu
endmenu
endif # STM32_DMA2D
menu "QEncoder Driver"
depends on QENCODER
depends on STM32_TIM1 || STM32_TIM2 || STM32_TIM3 || STM32_TIM4 || STM32_TIM5 || STM32_TIM8
config STM32_QENCODER_FILTER
bool "Enable filtering on STM32 QEncoder input"
default y
choice
depends on STM32_QENCODER_FILTER
prompt "Input channel sampling frequency"
default STM32_QENCODER_SAMPLE_FDTS_4
config STM32_QENCODER_SAMPLE_FDTS
bool "fDTS"
config STM32_QENCODER_SAMPLE_CKINT
bool "fCK_INT"
config STM32_QENCODER_SAMPLE_FDTS_2
bool "fDTS/2"
config STM32_QENCODER_SAMPLE_FDTS_4
bool "fDTS/4"
config STM32_QENCODER_SAMPLE_FDTS_8
bool "fDTS/8"
config STM32_QENCODER_SAMPLE_FDTS_16
bool "fDTS/16"
config STM32_QENCODER_SAMPLE_FDTS_32
bool "fDTS/32"
endchoice
choice
depends on STM32_QENCODER_FILTER
prompt "Input channel event count"
default STM32_QENCODER_SAMPLE_EVENT_6
config STM32_QENCODER_SAMPLE_EVENT_1
depends on STM32_QENCODER_SAMPLE_FDTS
bool "1"
config STM32_QENCODER_SAMPLE_EVENT_2
depends on STM32_QENCODER_SAMPLE_CKINT
bool "2"
config STM32_QENCODER_SAMPLE_EVENT_4
depends on STM32_QENCODER_SAMPLE_CKINT
bool "4"
config STM32_QENCODER_SAMPLE_EVENT_5
depends on STM32_QENCODER_SAMPLE_FDTS_16 || STM32_QENCODER_SAMPLE_FDTS_32
bool "5"
config STM32_QENCODER_SAMPLE_EVENT_6
depends on !STM32_QENCODER_SAMPLE_FDTS && !STM32_QENCODER_SAMPLE_CKINT
bool "6"
config STM32_QENCODER_SAMPLE_EVENT_8
depends on !STM32_QENCODER_SAMPLE_FDTS
bool "8"
endchoice
endmenu

63
arch/arm/src/stm32/stm32_qencoder.c
View File

@ -145,6 +145,65 @@
# define HAVE_MIXEDWIDTH_TIMERS 1
#endif
/* Input filter *********************************************************************/
#ifdef CONFIG_STM32_QENCODER_FILTER
# if defined(CONFIG_STM32_QENCODER_SAMPLE_FDTS)
# if defined(CONFIG_STM32_QENCODER_SAMPLE_EVENT_1)
# define STM32_QENCODER_ICF GTIM_CCMR_ICF_NOFILT
# endif
# elif defined(CONFIG_STM32_QENCODER_SAMPLE_CKINT)
# if defined(CONFIG_STM32_QENCODER_SAMPLE_EVENT_2)
# define STM32_QENCODER_ICF GTIM_CCMR_ICF_FCKINT2
# elif defined(CONFIG_STM32_QENCODER_SAMPLE_EVENT_4)
# define STM32_QENCODER_ICF GTIM_CCMR_ICF_FCKINT4
# elif defined(CONFIG_STM32_QENCODER_SAMPLE_EVENT_8)
# define STM32_QENCODER_ICF GTIM_CCMR_ICF_FCKINT8
# endif
# elif defined(CONFIG_STM32_QENCODER_SAMPLE_FDTS_2)
# if defined(CONFIG_STM32_QENCODER_SAMPLE_EVENT_6)
# define STM32_QENCODER_ICF GTIM_CCMR_ICF_FDTSd26
# elif defined(CONFIG_STM32_QENCODER_SAMPLE_EVENT_8)
# define STM32_QENCODER_ICF GTIM_CCMR_ICF_FDTSd28
# endif
# elif defined(CONFIG_STM32_QENCODER_SAMPLE_FDTS_4)
# if defined(CONFIG_STM32_QENCODER_SAMPLE_EVENT_6)
# define STM32_QENCODER_ICF GTIM_CCMR_ICF_FDTSd46
# elif defined(CONFIG_STM32_QENCODER_SAMPLE_EVENT_8)
# define STM32_QENCODER_ICF GTIM_CCMR_ICF_FDTSd48
# endif
# elif defined(CONFIG_STM32_QENCODER_SAMPLE_FDTS_8)
# if defined(CONFIG_STM32_QENCODER_SAMPLE_EVENT_6)
# define STM32_QENCODER_ICF GTIM_CCMR_ICF_FDTSd86
# elif defined(CONFIG_STM32_QENCODER_SAMPLE_EVENT_8)
# define STM32_QENCODER_ICF GTIM_CCMR_ICF_FDTSd88
# endif
# elif defined(CONFIG_STM32_QENCODER_SAMPLE_FDTS_16)
# if defined(CONFIG_STM32_QENCODER_SAMPLE_EVENT_5)
# define STM32_QENCODER_ICF GTIM_CCMR_ICF_FDTSd165
# elif defined(CONFIG_STM32_QENCODER_SAMPLE_EVENT_6)
# define STM32_QENCODER_ICF GTIM_CCMR_ICF_FDTSd166
# elif defined(CONFIG_STM32_QENCODER_SAMPLE_EVENT_8)
# define STM32_QENCODER_ICF GTIM_CCMR_ICF_FDTSd168
# endif
# elif defined(CONFIG_STM32_QENCODER_SAMPLE_FDTS_32)
# if defined(CONFIG_STM32_QENCODER_SAMPLE_EVENT_5)
# define STM32_QENCODER_ICF GTIM_CCMR_ICF_FDTSd325
# elif defined(CONFIG_STM32_QENCODER_SAMPLE_EVENT_6)
# define STM32_QENCODER_ICF GTIM_CCMR_ICF_FDTSd326
# elif defined(CONFIG_STM32_QENCODER_SAMPLE_EVENT_8)
# define STM32_QENCODER_ICF GTIM_CCMR_ICF_FDTSd328
# endif
# endif
# ifndef STM32_QENCODER_ICF
# warning "Invalid encoder filter combination, filter disabled"
# endif
#endif
#ifndef STM32_QENCODER_ICF
# define STM32_QENCODER_ICF GTIM_CCMR_ICF_NOFILT
#endif
/* Debug ****************************************************************************/
/* Non-standard debug that may be enabled just for testing the quadrature encoder */
@ -809,7 +868,7 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
ccmr1 &= ~(GTIM_CCMR1_CC1S_MASK|GTIM_CCMR1_IC1F_MASK);
ccmr1 |= GTIM_CCMR_CCS_CCIN1 << GTIM_CCMR1_CC1S_SHIFT;
ccmr1 |= GTIM_CCMR_ICF_FDTSd46 << GTIM_CCMR1_IC1F_SHIFT;
ccmr1 |= STM32_QENCODER_ICF << GTIM_CCMR1_IC1F_SHIFT;
/* Select the Polarity=rising and set the CC1E Bit */
@ -844,7 +903,7 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
ccmr1 &= ~(GTIM_CCMR1_CC2S_MASK|GTIM_CCMR1_IC2F_MASK);
ccmr1 |= GTIM_CCMR_CCS_CCIN1 << GTIM_CCMR1_CC2S_SHIFT;
ccmr1 |= GTIM_CCMR_ICF_FDTSd46 << GTIM_CCMR1_IC2F_SHIFT;
ccmr1 |= STM32_QENCODER_ICF << GTIM_CCMR1_IC2F_SHIFT;
/* Select the Polarity=rising and set the CC2E Bit */