SAMV7: Quick'n'dirty port of the SAMA5D4 Ethernet MAC driver to the SAMV7. Still some unresovled issues with DCache handling
This commit is contained in:
Gregory Nutt
parent
0abe4e701b
commit
32aadd9cc2
@ -89,7 +89,7 @@
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#define SAM_PID_MCAN01 (36) /* CAN0 IRQ line 1 */
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#define SAM_PID_MCAN10 (37) /* CAN1 IRQ line 0 */
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#define SAM_PID_MCAN11 (38) /* CAN1 IRQ line 1 */
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#define SAM_PID_EMAC (39) /* Ethernet MAC */
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#define SAM_PID_EMAC0 (39) /* Ethernet MAC */
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#define SAM_PID_AFEC1 (40) /* Analog Front End 1 */
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#define SAM_PID_TWIHS2 (41) /* Two-Wire Interface 2 */
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#define SAM_PID_SPI1 (42) /* Serial Peripheral Interface 1 */
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@ -159,7 +159,7 @@
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#define SAM_IRQ_MCAN01 (SAM_IRQ_EXTINT+SAM_PID_MCAN01) /* CAN0 IRQ line 1 */
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#define SAM_IRQ_MCAN10 (SAM_IRQ_EXTINT+SAM_PID_MCAN10) /* CAN1 IRQ line 0 */
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#define SAM_IRQ_MCAN11 (SAM_IRQ_EXTINT+SAM_PID_MCAN11) /* CAN1 IRQ line 1 */
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#define SAM_IRQ_EMAC (SAM_IRQ_EXTINT+SAM_PID_EMAC) /* Ethernet MAC */
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#define SAM_IRQ_EMAC0 (SAM_IRQ_EXTINT+SAM_PID_EMAC0) /* Ethernet MAC */
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#define SAM_IRQ_AFEC1 (SAM_IRQ_EXTINT+SAM_PID_AFEC1) /* Analog Front End 1 */
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#define SAM_IRQ_TWIHS2 (SAM_IRQ_EXTINT+SAM_PID_TWIHS2) /* Two-Wire Interface 2 */
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#define SAM_IRQ_SPI1 (SAM_IRQ_EXTINT+SAM_PID_SPI1) /* Serial Peripheral Interface 1 */
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@ -114,6 +114,10 @@ config SAMV7_HAVE_EBI
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bool
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default n
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config SAMV7_EMAC
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bool
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default n
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config SAMV7_HSMCI
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bool
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default n
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@ -217,9 +221,10 @@ config SAMV7_EBI
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default n
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depends on SAMV7_HAVE_EBI
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config SAMV7_EMAC
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config SAMV7_EMAC0
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bool "Ethernet MAC (GMAC)"
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default n
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select SAMV7_EMAC
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select NETDEVICES
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select ARCH_HAVE_PHY
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@ -1009,3 +1014,225 @@ config SAMV7_HSMCI_REGDEBUG
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Very invasive! Requires also DEBUG.
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endmenu # HSMCI device driver options
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menu "EMAC device driver options"
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depends on SAMV7_EMAC0
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config SAMV7_EMAC0_NRXBUFFERS
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int "Number of RX buffers"
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default 16
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---help---
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EMAC buffer memory is segmented into 128 byte units (not
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configurable). This setting provides the number of such 128 byte
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units used for reception. This is also equal to the number of RX
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descriptors that will be allocated The selected value must be an
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even power of 2.
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config SAMV7_EMAC0_NTXBUFFERS
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int "Number of TX buffers"
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default 8
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---help---
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EMAC buffer memory is segmented into full Ethernet packets (size
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NET_BUFSIZE bytes). This setting provides the number of such packets
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that can be in flight. This is also equal to the number of TX
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descriptors that will be allocated.
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config SAMV7_EMAC0_PHYADDR
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int "PHY address"
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default 1
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---help---
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The 5-bit address of the PHY on the board. Default: 1
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config SAMV7_EMAC0_PHYINIT
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bool "Board-specific PHY Initialization"
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default n
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---help---
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Some boards require specialized initialization of the PHY before it can be used.
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This may include such things as configuring GPIOs, resetting the PHY, etc. If
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SAMV7_EMAC0_PHYINIT is defined in the configuration then the board specific logic must
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provide sam_phyinitialize(); The SAMV7 EMAC driver will call this function
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one time before it first uses the PHY.
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choice
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prompt "PHY interface"
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default SAMV7_EMAC0_MII
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config SAMV7_EMAC0_MII
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bool "MII"
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---help---
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Support Ethernet MII interface (vs RMII).
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config SAMV7_EMAC0_RMII
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bool "RMII"
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depends on !ARCH_CHIP_SAM4E
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---help---
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Support Ethernet RMII interface (vs MII).
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endchoice # PHY interface
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config SAMV7_EMAC0_CLAUSE45
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bool "Clause 45 MII"
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depends on SAMV7_EMAC0_MII
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---help---
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MDIO was originally defined in Clause 22 of IEEE RFC802.3. In the
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original specification, a single MDIO interface is able to access up
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to 32 registers in 32 different PHY devices. To meet the needs the
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expanding needs of 10-Gigabit Ethernet devices, Clause 45 of the
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802.3ae specification provided the following additions to MDIO:
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- Ability to access 65,536 registers in 32 different devices on
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32 different ports
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- Additional OP-code and ST-code for Indirect Address register
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access for 10 Gigabit Ethernet
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- End-to-end fault signaling
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- Multiple loopback points
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- Low voltage electrical specification
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By default, Clause 22 PHYs will be supported unless this option is
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selected.
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config SAMV7_EMAC0_AUTONEG
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bool "Use autonegotiation"
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default y
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---help---
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Use PHY autonegotiation to determine speed and mode
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config SAMV7_EMAC0_ETHFD
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bool "Full duplex"
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default n
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depends on !SAMV7_EMAC0_AUTONEG
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---help---
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If SAMV7_EMAC0_AUTONEG is not defined, then this may be defined to select full duplex
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mode. Default: half-duplex
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config SAMV7_EMAC0_ETH100MBPS
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bool "100 Mbps"
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default n
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depends on !SAMV7_EMAC0_AUTONEG
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---help---
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If SAMV7_EMAC0_AUTONEG is not defined, then this may be defined to select 100 MBps
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speed. Default: 10 Mbps
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config SAMV7_EMAC0_PHYSR
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int "PHY Status Register Address (decimal)"
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depends on SAMV7_EMAC0_AUTONEG
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. The PHY status register
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address may diff from PHY to PHY. This configuration sets the address of
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the PHY status register.
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config SAMV7_EMAC0_PHYSR_ALTCONFIG
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bool "PHY Status Alternate Bit Layout"
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default n
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depends on SAMV7_EMAC0_AUTONEG
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---help---
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Different PHYs present speed and mode information in different ways. Some
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will present separate information for speed and mode (this is the default).
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Those PHYs, for example, may provide a 10/100 Mbps indication and a separate
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full/half duplex indication. This options selects an alternative representation
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where speed and mode information are combined. This might mean, for example,
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separate bits for 10HD, 100HD, 10FD and 100FD.
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if SAMV7_EMAC0_AUTONEG
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if SAMV7_EMAC0_PHYSR_ALTCONFIG
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config SAMV7_EMAC0_PHYSR_ALTMODE
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hex "PHY Mode Mask"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This provide bit mask
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for isolating the speed and full/half duplex mode bits.
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config SAMV7_EMAC0_PHYSR_10HD
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hex "10MBase-T Half Duplex Value"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This is the value
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under the bit mask that represents the 10Mbps, half duplex setting.
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config SAMV7_EMAC0_PHYSR_100HD
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hex "100Base-T Half Duplex Value"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This is the value
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under the bit mask that represents the 100Mbps, half duplex setting.
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config SAMV7_EMAC0_PHYSR_10FD
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hex "10Base-T Full Duplex Value"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This is the value
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under the bit mask that represents the 10Mbps, full duplex setting.
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config SAMV7_EMAC0_PHYSR_100FD
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hex "100Base-T Full Duplex Value"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This is the value
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under the bit mask that represents the 100Mbps, full duplex setting.
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endif # SAMV7_EMAC0_PHYSR_ALTCONFIG
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if !SAMV7_EMAC0_PHYSR_ALTCONFIG
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config SAMV7_EMAC0_PHYSR_SPEED
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hex "PHY Speed Mask"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This provides bit mask
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for isolating the 10 or 100MBps speed indication.
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config SAMV7_EMAC0_PHYSR_100MBPS
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hex "PHY 100Mbps Speed Value"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This provides the value
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of the speed bit(s) indicating 100MBps speed.
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config SAMV7_EMAC0_PHYSR_MODE
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hex "PHY Mode Mask"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This provides the
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bit mask for isolating the full or half duplex mode bits.
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config SAMV7_EMAC0_PHYSR_FULLDUPLEX
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hex "PHY Full Duplex Mode Value"
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---help---
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This must be provided if SAMV7_EMAC0_AUTONEG is defined. This provides the
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value of the mode bits indicating full duplex mode.
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endif # !SAMV7_EMAC0_PHYSR_ALTCONFIG
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endif # SAMV7_EMAC0_AUTONEG
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# These apply to both EMAC0 and EMAC1 (but are in the EMAC0 menu for now
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# because there is not yet any SAMV7 chip that supports two Ethernet MACS
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config SAMV7_EMAC0_ISETH0
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bool
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default y
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config SAMV7_EMAC_PREALLOCATE
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bool "Preallocate buffers"
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default n
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---help---
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Buffer an descriptor many may either be allocated from the memory
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pool or pre-allocated to lie in .bss. This options selected pre-
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allocated buffer memory.
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config SAMV7_EMAC_NBC
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bool "Disable Broadcast"
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default n
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---help---
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Select to disable receipt of broadcast packets.
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config SAMV7_EMAC_DEBUG
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bool "Force EMAC0/1 DEBUG"
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default n
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depends on DEBUG && !DEBUG_NET
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---help---
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This option will force debug output from EMAC driver even without
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network debug output enabled. This is not normally something
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that would want to do but is convenient if you are debugging the
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driver and do not want to get overloaded with other
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network-related debug output.
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config SAMV7_EMAC_REGDEBUG
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bool "Register-Level Debug"
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default n
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depends on DEBUG
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---help---
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Enable very low-level register access debug. Depends on DEBUG.
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endmenu # EMAC0 device driver options
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@ -140,3 +140,7 @@ endif
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ifeq ($(CONFIG_SAMV7_HSMCI),y)
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CHIP_CSRCS += sam_hsmci.c sam_hsmci_clkdiv.c
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endif
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ifeq ($(CONFIG_SAMV7_EMAC),y)
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CHIP_CSRCS += sam_emac.c sam_ethernet.c
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endif
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@ -167,28 +167,28 @@
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/* Ethernet MAC Controller (EMAC) */
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#define GPIO_EMAC_COL (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN13)
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#define GPIO_EMAC_CRS (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN10)
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#define GPIO_EMAC_MDC (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN8)
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#define GPIO_EMAC_MDIO (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN9)
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#define GPIO_EMAC_RX0 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN5)
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#define GPIO_EMAC_RX1 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN6)
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#define GPIO_EMAC_RX2 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN11)
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#define GPIO_EMAC_RX3 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN12)
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#define GPIO_EMAC_RXCK (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN14)
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#define GPIO_EMAC_RXDV (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN4)
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#define GPIO_EMAC_RXER (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN7)
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#define GPIO_EMAC_TSUCOMP_1 (GPIO_PERIPHB | GPIO_CFG_DEFAULT | GPIO_PORT_PIOB | GPIO_PIN1)
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#define GPIO_EMAC_TSUCOMP_2 (GPIO_PERIPHB | GPIO_CFG_DEFAULT | GPIO_PORT_PIOB | GPIO_PIN12)
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#define GPIO_EMAC_TSUCOMP_3 (GPIO_PERIPHC | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN11)
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#define GPIO_EMAC_TSUCOMP_4 (GPIO_PERIPHC | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN20)
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#define GPIO_EMAC_TX0 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN2)
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#define GPIO_EMAC_TX1 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN3)
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#define GPIO_EMAC_TX2 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN15)
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#define GPIO_EMAC_TX3 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN16)
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#define GPIO_EMAC_TXCK (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN0)
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#define GPIO_EMAC_TXEN (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN1)
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#define GPIO_EMAC_TXER (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN17)
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#define GPIO_EMAC0_COL (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN13)
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#define GPIO_EMAC0_CRS (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN10)
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#define GPIO_EMAC0_MDC (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN8)
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#define GPIO_EMAC0_MDIO (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN9)
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#define GPIO_EMAC0_RX0 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN5)
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#define GPIO_EMAC0_RX1 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN6)
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#define GPIO_EMAC0_RX2 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN11)
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#define GPIO_EMAC0_RX3 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN12)
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#define GPIO_EMAC0_RXCK (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN14)
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#define GPIO_EMAC0_RXDV (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN4)
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#define GPIO_EMAC0_RXER (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN7)
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#define GPIO_EMAC0_TSUCOMP_1 (GPIO_PERIPHB | GPIO_CFG_DEFAULT | GPIO_PORT_PIOB | GPIO_PIN1)
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#define GPIO_EMAC0_TSUCOMP_2 (GPIO_PERIPHB | GPIO_CFG_DEFAULT | GPIO_PORT_PIOB | GPIO_PIN12)
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#define GPIO_EMAC0_TSUCOMP_3 (GPIO_PERIPHC | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN11)
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#define GPIO_EMAC0_TSUCOMP_4 (GPIO_PERIPHC | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN20)
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#define GPIO_EMAC0_TX0 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN2)
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#define GPIO_EMAC0_TX1 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN3)
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#define GPIO_EMAC0_TX2 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN15)
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#define GPIO_EMAC0_TX3 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN16)
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#define GPIO_EMAC0_TXCK (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN0)
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#define GPIO_EMAC0_TXEN (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN1)
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#define GPIO_EMAC0_TXER (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOD | GPIO_PIN17)
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/* Image Sensor Interface (ISI) */
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4656
arch/arm/src/samv7/sam_emac.c
Normal file
4656
arch/arm/src/samv7/sam_emac.c
Normal file
File diff suppressed because it is too large
Load Diff
118
arch/arm/src/samv7/sam_ethernet.c
Normal file
118
arch/arm/src/samv7/sam_ethernet.c
Normal file
@ -0,0 +1,118 @@
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/****************************************************************************
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* arch/arm/src/samv7/sam_ethernet.c
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <debug.h>
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#include "sam_ethernet.h"
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#ifdef CONFIG_NET
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Function: up_netinitialize
|
||||
*
|
||||
* Description:
|
||||
* This is the "standard" network initialization logic called from the
|
||||
* low-level initialization logic in up_initialize.c. This is just
|
||||
* a shim to support the slightly different prototype of
|
||||
* sam_emac_intiialize() and to provide support for future chips that
|
||||
* may have multiple EMAC peripherals.
|
||||
*
|
||||
* Parameters:
|
||||
* None.
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
* Assumptions:
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void up_netinitialize(void)
|
||||
{
|
||||
#ifdef CONFIG_SAMV7_EMAC0
|
||||
int ret;
|
||||
|
||||
#ifdef CONFIG_SAMV7_EMAC0
|
||||
/* Initialize the EMAC0 driver */
|
||||
|
||||
ret = sam_emac_initialize(EMAC0_INTF);
|
||||
if (ret < 0)
|
||||
{
|
||||
nlldbg("ERROR: up_emac_initialize(EMAC0) failed: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SAMV7_EMAC1
|
||||
/* Initialize the EMAC1 driver */
|
||||
|
||||
ret = sam_emac_initialize(EMAC1_INTF);
|
||||
if (ret < 0)
|
||||
{
|
||||
nlldbg("ERROR: up_emac_initialize(EMAC1) failed: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif /* CONFIG_NET */
|
||||
234
arch/arm/src/samv7/sam_ethernet.h
Normal file
234
arch/arm/src/samv7/sam_ethernet.h
Normal file
@ -0,0 +1,234 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/samv7/sam_ethernet.h
|
||||
*
|
||||
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_SAMV7_SAM_ETHERNET_H
|
||||
#define __ARCH_ARM_SRC_SAMV7_SAM_ETHERNET_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <arch/samv7/chip.h>
|
||||
|
||||
#include "chip/sam_emac.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
/* Understood PHY types */
|
||||
|
||||
#define SAMV7_PHY_DM9161 0
|
||||
#define SAMV7_PHY_LAN8700 1
|
||||
#define SAMV7_PHY_KSZ8051 2
|
||||
#define SAMV7_PHY_KSZ8061 3
|
||||
#define SAMV7_PHY_KSZ8081 4
|
||||
#define SAMV7_PHY_KSZ90x1 5
|
||||
|
||||
/* Definitions for use with sam_phy_boardinitialize */
|
||||
|
||||
#define EMAC0_INTF 0
|
||||
#define EMAC1_INTF 1
|
||||
|
||||
/* Which is ETH0 and which is ETH1? */
|
||||
|
||||
#ifndef CONFIG_SAMV7_EMAC
|
||||
# undef CONFIG_SAMV7_EMAC0_ISETH0
|
||||
# undef CONFIG_SAMV7_EMAC1_ISETH0
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SAMV7_EMAC0_ISETH0) && defined(CONFIG_SAMV7_EMAC1_ISETH0)
|
||||
# error EMAC0 and EMAC2 cannot both be ETH0
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SAMV7_EMAC0_ISETH0)
|
||||
# if defined(CONFIG_ETH0_PHY_DM9161)
|
||||
# define SAMV7_EMAC0_PHY_DM9161 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_DM9161
|
||||
# elif defined(CONFIG_ETH0_PHY_LAN8700)
|
||||
# define SAMV7_EMAC0_PHY_LAN8700 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_LAN8700
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8051)
|
||||
# define SAMV7_EMAC0_PHY_KSZ8051 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_KSZ8051
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8061)
|
||||
# define SAMV7_EMAC0_PHY_KSZ8061 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_KSZ8061
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8081)
|
||||
# define SAMV7_EMAC0_PHY_KSZ8081 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_KSZ8081
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ90x1)
|
||||
# define SAMV7_EMAC0_PHY_KSZ90x1 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_KSZ90x1
|
||||
# else
|
||||
# error ETH0 PHY unrecognized
|
||||
# endif
|
||||
#elif defined(CONFIG_SAMV7_EMAC0)
|
||||
# if defined(CONFIG_ETH1_PHY_DM9161)
|
||||
# define SAMV7_EMAC0_PHY_DM9161 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_DM9161
|
||||
# elif defined(CONFIG_ETH1_PHY_LAN8700)
|
||||
# define SAMV7_EMAC0_PHY_LAN8700 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_LAN8700
|
||||
# elif defined(CONFIG_ETH1_PHY_KSZ8051)
|
||||
# define SAMV7_EMAC0_PHY_KSZ8051 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_KSZ8051
|
||||
# elif defined(CONFIG_ETH1_PHY_KSZ8061)
|
||||
# define SAMV7_EMAC0_PHY_KSZ8061 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_KSZ8061
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8081)
|
||||
# define SAMV7_EMAC0_PHY_KSZ8081 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_KSZ8081
|
||||
# elif defined(CONFIG_ETH1_PHY_KSZ90x1)
|
||||
# define SAMV7_EMAC0_PHY_KSZ90x1 1
|
||||
# define SAMV7_EMAC0_PHY_TYPE SAMV7_PHY_KSZ90x1
|
||||
# else
|
||||
# error ETH1 PHY unrecognized
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SAMV7_EMAC1_ISETH0)
|
||||
# if defined(CONFIG_ETH0_PHY_DM9161)
|
||||
# define SAMV7_EMAC1_PHY_DM9161 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_DM9161
|
||||
# elif defined(CONFIG_ETH0_PHY_LAN8700)
|
||||
# define SAMV7_EMAC1_PHY_LAN8700 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_LAN8700
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8051)
|
||||
# define SAMV7_EMAC1_PHY_KSZ8051 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_KSZ8051
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8061)
|
||||
# define SAMV7_EMAC1_PHY_KSZ8061 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_KSZ8061
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8081)
|
||||
# define SAMV7_EMAC1_PHY_KSZ8081 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_KSZ8081
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ90x1)
|
||||
# define SAMV7_EMAC1_PHY_KSZ90x1 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_KSZ90x1
|
||||
# else
|
||||
# error ETH0 PHY unrecognized
|
||||
# endif
|
||||
#elif defined(CONFIG_SAMV7_EMAC1)
|
||||
# if defined(CONFIG_ETH1_PHY_DM9161)
|
||||
# define SAMV7_EMAC1_PHY_DM9161 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_DM9161
|
||||
# elif defined(CONFIG_ETH1_PHY_LAN8700)
|
||||
# define SAMV7_EMAC1_PHY_LAN8700 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_LAN8700
|
||||
# elif defined(CONFIG_ETH1_PHY_KSZ8051)
|
||||
# define SAMV7_EMAC1_PHY_KSZ8051 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_KSZ8051
|
||||
# elif defined(CONFIG_ETH1_PHY_KSZ8061)
|
||||
# define SAMV7_EMAC1_PHY_KSZ8061 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_KSZ8061
|
||||
# elif defined(CONFIG_ETH0_PHY_KSZ8081)
|
||||
# define SAMV7_EMAC1_PHY_KSZ8081 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_KSZ8081
|
||||
# elif defined(CONFIG_ETH1_PHY_KSZ90x1)
|
||||
# define SAMV7_EMAC1_PHY_KSZ90x1 1
|
||||
# define SAMV7_EMAC1_PHY_TYPE SAMV7_PHY_KSZ90x1
|
||||
# else
|
||||
# error ETH1 PHY unrecognized
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Function: sam_emac_initialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize the EMAC driver.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success; Negated errno on failure.
|
||||
*
|
||||
* Assumptions:
|
||||
* Called very early in the initialization sequence.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMV7_EMAC
|
||||
int sam_emac_initialize(int intf);
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Function: sam_phy_boardinitialize
|
||||
*
|
||||
* Description:
|
||||
* Some boards require specialized initialization of the PHY before it can be used.
|
||||
* This may include such things as configuring GPIOs, resetting the PHY, etc. If
|
||||
* CONFIG_SAMV7_PHYINIT is defined in the configuration then the board specific
|
||||
* logic must provide sam_phyinitialize(); The SAMV7 Ethernet driver will call
|
||||
* this function one time before it first uses the PHY.
|
||||
*
|
||||
* Parameters:
|
||||
* intf - Always zero for now.
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success; Negated errno on failure.
|
||||
*
|
||||
* Assumptions:
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMV7_PHYINIT
|
||||
int sam_phy_boardinitialize(int intf);
|
||||
#endif
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM_SRC_SAMV7_SAM_ETHERNET_H */
|
||||
@ -96,7 +96,7 @@
|
||||
#define sam_mcan01_enableclk()
|
||||
#define sam_mcan10_enableclk() sam_enableperiph1(SAM_PID_MCAN10)
|
||||
#define sam_mcan11_enableclk()
|
||||
#define sam_emac_enableclk() sam_enableperiph1(SAM_PID_EMAC)
|
||||
#define sam_emac0_enableclk() sam_enableperiph1(SAM_PID_EMAC0)
|
||||
#define sam_afec1_enableclk() sam_enableperiph1(SAM_PID_AFEC1)
|
||||
#define sam_twihs2_enableclk() sam_enableperiph1(SAM_PID_TWIHS2)
|
||||
#define sam_spi1_enableclk() sam_enableperiph1(SAM_PID_SPI1)
|
||||
@ -164,7 +164,7 @@
|
||||
#define sam_mcan01_disableclk()
|
||||
#define sam_mcan10_disableclk() sam_disableperiph1(SAM_PID_MCAN10)
|
||||
#define sam_mcan11_disableclk()
|
||||
#define sam_emac_disableclk() sam_disableperiph1(SAM_PID_EMAC)
|
||||
#define sam_emac0_disableclk() sam_disableperiph1(SAM_PID_EMAC0)
|
||||
#define sam_afec1_disableclk() sam_disableperiph1(SAM_PID_AFEC1)
|
||||
#define sam_twihs2_disableclk() sam_disableperiph1(SAM_PID_TWIHS2)
|
||||
#define sam_spi1_disableclk() sam_disableperiph1(SAM_PID_SPI1)
|
||||
|
||||
@ -15,6 +15,7 @@ Contents
|
||||
- Automounter
|
||||
- LEDs and Buttons
|
||||
- AT24MAC402 Serial EEPROM
|
||||
- Networking
|
||||
- Debugging
|
||||
- Configurations
|
||||
|
||||
@ -87,6 +88,11 @@ The BASIC nsh configuration is fully function (as desribed below under
|
||||
drivers will port easily from either the SAM3/4 or from the SAMA5Dx.
|
||||
So there is still plenty to be done.
|
||||
|
||||
6. There has been a quick'n'dirty port of the SAMA5D4-EK Ethernet logic
|
||||
for the SAMV71-XULT. There are still some cache-related issues to
|
||||
be verified. No testing has yet been performed and so the driver should
|
||||
be considered non-functional.
|
||||
|
||||
Serial Console
|
||||
==============
|
||||
|
||||
@ -360,6 +366,243 @@ I2C address:
|
||||
of the A0, A1, and A3 pins on the part. On the SAMV71-XULT board, these
|
||||
are all pulled high so the full, 7-bit address is 0x5f.
|
||||
|
||||
Networking
|
||||
==========
|
||||
|
||||
KSZ8061RNBVA Connections
|
||||
------------------------
|
||||
|
||||
------ --------- --------- --------------------------
|
||||
SAMV71 SAMV71 Ethernet Shared functionality
|
||||
Pin Function Function
|
||||
------ --------- --------- --------------------------
|
||||
PD00 GTXCK REF_CLK Shield
|
||||
PD01 GTXEN TXEN
|
||||
PD02 GTX0 TXD0
|
||||
PD03 GTX1 TXD1
|
||||
PD04 GRXDV CRS_DV Trace
|
||||
PD05 GRX0 RXD0 Trace
|
||||
PD06 GRX1 RXD1 Trace
|
||||
PD07 GRXER RXER Trace
|
||||
PD08 GMDC MDC Trace
|
||||
PD09 GMDIO MDIO
|
||||
PA19 GPIO INTERRUPT EXT1, Shield
|
||||
PA29 GPIO SIGDET
|
||||
PC10 GPIO RESET
|
||||
------ --------- --------- --------------------------
|
||||
|
||||
Selecting the GMAC peripheral
|
||||
-----------------------------
|
||||
|
||||
System Type -> SAMV7 Peripheral Support
|
||||
CONFIG_SAMV7_EMAC0=y : Enable the GMAC peripheral (aka, EMAC0)
|
||||
|
||||
System Type -> EMAC device driver options
|
||||
CONFIG_SAMV7_EMAC0_NRXBUFFERS=16 : Set aside some RS and TX buffers
|
||||
CONFIG_SAMV7_EMAC0_NTXBUFFERS=8
|
||||
CONFIG_SAMV7_EMAC0_RMII=y : The RMII interfaces is used on the board
|
||||
CONFIG_SAMV7_EMAC0_AUTONEG=y : Use autonegotiation
|
||||
CONFIG_SAMV7_EMAC0_PHYADDR=1 : KSZ8061 PHY is at address 1
|
||||
CONFIG_SAMV7_EMAC0_PHYSR=30 : Address of PHY status register on KSZ8061
|
||||
CONFIG_SAMV7_EMAC0_PHYSR_ALTCONFIG=y : Needed for KSZ8061
|
||||
CONFIG_SAMV7_EMAC0_PHYSR_ALTMODE=0x7 : " " " " " "
|
||||
CONFIG_SAMV7_EMAC0_PHYSR_10HD=0x1 : " " " " " "
|
||||
CONFIG_SAMV7_EMAC0_PHYSR_100HD=0x2 : " " " " " "
|
||||
CONFIG_SAMV7_EMAC0_PHYSR_10FD=0x5 : " " " " " "
|
||||
CONFIG_SAMV7_EMAC0_PHYSR_100FD=0x6 : " " " " " "
|
||||
|
||||
PHY selection. Later in the configuration steps, you will need to select
|
||||
the KSZ8061 PHY for EMAC (See below)
|
||||
|
||||
Networking Support
|
||||
CONFIG_NET=y : Enable Neworking
|
||||
CONFIG_NET_SOCKOPTS=y : Enable socket operations
|
||||
CONFIG_NET_ETH_MTU=562 : Maximum packet size (MTU) 1518 is more standard
|
||||
CONFIG_NET_ETH_TCP_RECVWNDO=562 : Should be the same as CONFIG_NET_ETH_MTU
|
||||
CONFIG_NET_ARP=y : ARP support should be enabled
|
||||
CONFIG_NET_ARP_SEND=y : Use ARP to get peer address before sending
|
||||
CONFIG_NET_TCP=y : Enable TCP/IP networking
|
||||
CONFIG_NET_TCPBACKLOG=y : Support TCP/IP backlog
|
||||
CONFIG_NET_TCP_READAHEAD=y : Enable TCP read-ahead buffering
|
||||
CONFIG_NET_TCP_WRITE_BUFFERS=y : Enable TCP write buffering
|
||||
CONFIG_NET_UDP=y : Enable UDP networking
|
||||
CONFIG_NET_BROADCAST=y : Support UDP broadcase packets
|
||||
CONFIG_NET_ICMP=y : Enable ICMP networking
|
||||
CONFIG_NET_ICMP_PING=y : Needed for NSH ping command
|
||||
: Defaults should be okay for other options
|
||||
Device drivers -> Network Device/PHY Support
|
||||
CONFIG_NETDEVICES=y : Enabled PHY selection
|
||||
CONFIG_ETH0_PHY_KSZ8061=y : Select the KSZ8061 PHY used with EMAC0
|
||||
|
||||
Application Configuration -> Network Utilities
|
||||
CONFIG_NETUTILS_DNSCLIENT=y : Enable host address resolution
|
||||
CONFIG_NETUTILS_TELNETD=y : Enable the Telnet daemon
|
||||
CONFIG_NETUTILS_TFTPC=y : Enable TFTP data file transfers for get and put commands
|
||||
CONFIG_NETUTILS_NETLIB=y : Network library support is needed
|
||||
CONFIG_NETUTILS_WEBCLIENT=y : Needed for wget support
|
||||
: Defaults should be okay for other options
|
||||
Application Configuration -> NSH Library
|
||||
CONFIG_NSH_TELNET=y : Enable NSH session via Telnet
|
||||
CONFIG_NSH_IPADDR=0x0a000002 : Select an IP address
|
||||
CONFIG_NSH_DRIPADDR=0x0a000001 : IP address of gateway/host PC
|
||||
CONFIG_NSH_NETMASK=0xffffff00 : Netmask
|
||||
CONFIG_NSH_NOMAC=y : Need to make up a bogus MAC address
|
||||
: Defaults should be okay for other options
|
||||
|
||||
Using the network with NSH
|
||||
--------------------------
|
||||
|
||||
So what can you do with this networking support? First you see that
|
||||
NSH has several new network related commands:
|
||||
|
||||
ifconfig, ifdown, ifup: Commands to help manage your network
|
||||
get and put: TFTP file transfers
|
||||
wget: HTML file transfers
|
||||
ping: Check for access to peers on the network
|
||||
Telnet console: You can access the NSH remotely via telnet.
|
||||
|
||||
You can also enable other add on features like full FTP or a Web
|
||||
Server or XML RPC and others. There are also other features that
|
||||
you can enable like DHCP client (or server) or network name
|
||||
resolution.
|
||||
|
||||
By default, the IP address of the SAMA4D4-EK will be 10.0.0.2 and
|
||||
it will assume that your host is the gateway and has the IP address
|
||||
10.0.0.1.
|
||||
|
||||
nsh> ifconfig
|
||||
eth0 HWaddr 00:e0:de:ad:be:ef at UP
|
||||
IPaddr:10.0.0.2 DRaddr:10.0.0.1 Mask:255.255.255.0
|
||||
|
||||
You can use ping to test for connectivity to the host (Careful,
|
||||
Window firewalls usually block ping-related ICMP traffic). On the
|
||||
target side, you can:
|
||||
|
||||
nsh> ping 10.0.0.1
|
||||
PING 10.0.0.1 56 bytes of data
|
||||
56 bytes from 10.0.0.1: icmp_seq=1 time=0 ms
|
||||
56 bytes from 10.0.0.1: icmp_seq=2 time=0 ms
|
||||
56 bytes from 10.0.0.1: icmp_seq=3 time=0 ms
|
||||
56 bytes from 10.0.0.1: icmp_seq=4 time=0 ms
|
||||
56 bytes from 10.0.0.1: icmp_seq=5 time=0 ms
|
||||
56 bytes from 10.0.0.1: icmp_seq=6 time=0 ms
|
||||
56 bytes from 10.0.0.1: icmp_seq=7 time=0 ms
|
||||
56 bytes from 10.0.0.1: icmp_seq=8 time=0 ms
|
||||
56 bytes from 10.0.0.1: icmp_seq=9 time=0 ms
|
||||
56 bytes from 10.0.0.1: icmp_seq=10 time=0 ms
|
||||
10 packets transmitted, 10 received, 0% packet loss, time 10100 ms
|
||||
|
||||
NOTE: In this configuration is is normal to have packet loss > 0%
|
||||
the first time you ping due to the default handling of the ARP
|
||||
table.
|
||||
|
||||
On the host side, you should also be able to ping the SAMA4D4-EK:
|
||||
|
||||
$ ping 10.0.0.2
|
||||
|
||||
You can also log into the NSH from the host PC like this:
|
||||
|
||||
$ telnet 10.0.0.2
|
||||
Trying 10.0.0.2...
|
||||
Connected to 10.0.0.2.
|
||||
Escape character is '^]'.
|
||||
sh_telnetmain: Session [3] Started
|
||||
|
||||
NuttShell (NSH) NuttX-7.9
|
||||
nsh> help
|
||||
help usage: help [-v] [<cmd>]
|
||||
|
||||
[ echo ifconfig mkdir mw sleep
|
||||
? exec ifdown mkfatfs ping test
|
||||
cat exit ifup mkfifo ps umount
|
||||
cp free kill mkrd put usleep
|
||||
cmp get losetup mh rm wget
|
||||
dd help ls mount rmdir xd
|
||||
df hexdump mb mv sh
|
||||
|
||||
Builtin Apps:
|
||||
nsh>
|
||||
|
||||
NOTE: If you enable this feature, you experience a delay on booting.
|
||||
That is because the start-up logic waits for the network connection
|
||||
to be established before starting NuttX. In a real application, you
|
||||
would probably want to do the network bringup on a separate thread
|
||||
so that access to the NSH prompt is not delayed.
|
||||
|
||||
This delay will be especially long if the board is not connected to
|
||||
a network. On the order of a minute! You will probably think that
|
||||
NuttX has crashed! And then, when it finally does come up, the
|
||||
network will not be available.
|
||||
|
||||
Network Initialization Thread
|
||||
-----------------------------
|
||||
There is a configuration option enabled by CONFIG_NSH_NETINIT_THREAD
|
||||
that will do the NSH network bring-up asynchronously in parallel on
|
||||
a separate thread. This eliminates the (visible) networking delay
|
||||
altogether. This networking initialization feature by itself has
|
||||
some limitations:
|
||||
|
||||
- If no network is connected, the network bring-up will fail and
|
||||
the network initialization thread will simply exit. There are no
|
||||
retries and no mechanism to know if the network initialization was
|
||||
successful.
|
||||
|
||||
- Furthermore, there is no support for detecting loss of the network
|
||||
connection and recovery of networking when the connection is restored.
|
||||
|
||||
Both of these shortcomings can be eliminated by enabling the network
|
||||
monitor:
|
||||
|
||||
Network Monitor
|
||||
---------------
|
||||
By default the network initialization thread will bring-up the network
|
||||
then exit, freeing all of the resources that it required. This is a
|
||||
good behavior for systems with limited memory.
|
||||
|
||||
If the CONFIG_NSH_NETINIT_MONITOR option is selected, however, then the
|
||||
network initialization thread will persist forever; it will monitor the
|
||||
network status. In the event that the network goes down (for example, if
|
||||
a cable is removed), then the thread will monitor the link status and
|
||||
attempt to bring the network back up. In this case the resources
|
||||
required for network initialization are never released.
|
||||
|
||||
Pre-requisites:
|
||||
|
||||
- CONFIG_NSH_NETINIT_THREAD as described above.
|
||||
|
||||
- CONFIG_NETDEV_PHY_IOCTL. Enable PHY IOCTL commands in the Ethernet
|
||||
device driver. Special IOCTL commands must be provided by the Ethernet
|
||||
driver to support certain PHY operations that will be needed for link
|
||||
management. There operations are not complex and are implemented for
|
||||
the Atmel SAMV7 family.
|
||||
|
||||
- CONFIG_ARCH_PHY_INTERRUPT. This is not a user selectable option.
|
||||
Rather, it is set when you select a board that supports PHY interrupts.
|
||||
In most architectures, the PHY interrupt is not associated with the
|
||||
Ethernet driver at all. Rather, the PHY interrupt is provided via some
|
||||
board-specific GPIO and the board-specific logic must provide support
|
||||
for that GPIO interrupt. To do this, the board logic must do two things:
|
||||
(1) It must provide the function arch_phy_irq() as described and
|
||||
prototyped in the nuttx/include/nuttx/arch.h, and (2) it must select
|
||||
CONFIG_ARCH_PHY_INTERRUPT in the board configuration file to advertise
|
||||
that it supports arch_phy_irq(). This logic can be found at
|
||||
nuttx/configs/sama5d4-ek/src/sam_ethernet.c.
|
||||
|
||||
- And a few other things: UDP support is required (CONFIG_NET_UDP) and
|
||||
signals must not be disabled (CONFIG_DISABLE_SIGNALS).
|
||||
|
||||
Given those prerequisites, the network monitor can be selected with these
|
||||
additional settings.
|
||||
|
||||
Networking Support -> Networking Device Support
|
||||
CONFIG_NETDEV_PHY_IOCTL=y : Enable PHY ioctl support
|
||||
|
||||
Application Configuration -> NSH Library -> Networking Configuration
|
||||
CONFIG_NSH_NETINIT_THREAD : Enable the network initialization thread
|
||||
CONFIG_NSH_NETINIT_MONITOR=y : Enable the network monitor
|
||||
CONFIG_NSH_NETINIT_RETRYMSEC=2000 : Configure the network monitor as you like
|
||||
CONFIG_NSH_NETINIT_SIGNO=18
|
||||
|
||||
Debugging
|
||||
=========
|
||||
|
||||
|
||||
272
configs/samv71-xult/src/sam_ethernet.c
Normal file
272
configs/samv71-xult/src/sam_ethernet.c
Normal file
@ -0,0 +1,272 @@
|
||||
/************************************************************************************
|
||||
* configs/samv71-xult/src/sam_ethernet.c
|
||||
*
|
||||
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/* Force verbose debug on in this file only to support unit-level testing. */
|
||||
|
||||
#ifdef CONFIG_NETDEV_PHY_DEBUG
|
||||
# undef CONFIG_DEBUG_VERBOSE
|
||||
# define CONFIG_DEBUG_VERBOSE 1
|
||||
# undef CONFIG_DEBUG_NET
|
||||
# define CONFIG_DEBUG_NET 1
|
||||
#endif
|
||||
|
||||
#include <string.h>
|
||||
#include <assert.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/irq.h>
|
||||
#include <nuttx/arch.h>
|
||||
|
||||
#include "sam_gpio.h"
|
||||
#include "sam_ethernet.h"
|
||||
|
||||
#include "samv71-xult.h"
|
||||
|
||||
#ifdef HAVE_NETWORK
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
#define SAMV7_EMAC0_DEVNAME "eth0"
|
||||
|
||||
/* Debug ********************************************************************/
|
||||
/* Extra, in-depth debug output that is only available if
|
||||
* CONFIG_NETDEV_PHY_DEBUG us defined.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_NETDEV_PHY_DEBUG
|
||||
# define phydbg dbg
|
||||
# define phylldbg lldbg
|
||||
#else
|
||||
# define phydbg(x...)
|
||||
# define phylldbg(x...)
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Private Data
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMV7_PIOA_IRQ
|
||||
static xcpt_t g_emac0_handler;
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Private Functions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: sam_emac_phy_enable and sam_gmac_enable
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMV7_PIOA_IRQ
|
||||
static void sam_emac0_phy_enable(bool enable)
|
||||
{
|
||||
phydbg("IRQ%d: enable=%d\n", IRQ_INT_ETH0, enable);
|
||||
if (enable)
|
||||
{
|
||||
sam_pioirqenable(IRQ_INT_ETH0);
|
||||
}
|
||||
else
|
||||
{
|
||||
sam_pioirqdisable(IRQ_INT_ETH0);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: sam_netinitialize
|
||||
*
|
||||
* Description:
|
||||
* Configure board resources to support networking.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
void weak_function sam_netinitialize(void)
|
||||
{
|
||||
phydbg("Configuring %08x\n", GPIO_INT_ETH0);
|
||||
sam_configgpio(GPIO_INT_ETH0);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arch_phy_irq
|
||||
*
|
||||
* Description:
|
||||
* This function may be called to register an interrupt handler that will
|
||||
* be called when a PHY interrupt occurs. This function both attaches
|
||||
* the interrupt handler and enables the interrupt if 'handler' is non-
|
||||
* NULL. If handler is NULL, then the interrupt is detached and disabled
|
||||
* instead.
|
||||
*
|
||||
* The PHY interrupt is always disabled upon return. The caller must
|
||||
* call back through the enable function point to control the state of
|
||||
* the interrupt.
|
||||
*
|
||||
* This interrupt may or may not be available on a given platform depending
|
||||
* on how the network hardware architecture is implemented. In a typical
|
||||
* case, the PHY interrupt is provided to board-level logic as a GPIO
|
||||
* interrupt (in which case this is a board-specific interface and really
|
||||
* should be called board_phy_irq()); In other cases, the PHY interrupt
|
||||
* may be cause by the chip's MAC logic (in which case arch_phy_irq()) is
|
||||
* an appropriate name. Other other boards, there may be no PHY interrupts
|
||||
* available at all. If client attachable PHY interrupts are available
|
||||
* from the board or from the chip, then CONFIG_ARCH_PHY_INTERRUPT should
|
||||
* be defined to indicate that fact.
|
||||
*
|
||||
* Typical usage:
|
||||
* a. OS service logic (not application logic*) attaches to the PHY
|
||||
* PHY interrupt and enables the PHY interrupt.
|
||||
* b. When the PHY interrupt occurs: (1) the interrupt should be
|
||||
* disabled and () work should be scheduled on the worker thread (or
|
||||
* perhaps a dedicated application thread).
|
||||
* c. That worker thread should use the SIOCGMIIPHY, SIOCGMIIREG,
|
||||
* and SIOCSMIIREG ioctl calls** to communicate with the PHY,
|
||||
* determine what network event took place (Link Up/Down?), and
|
||||
* take the appropriate actions.
|
||||
* d. It should then interact the the PHY to clear any pending
|
||||
* interrupts, then re-enable the PHY interrupt.
|
||||
*
|
||||
* * This is an OS internal interface and should not be used from
|
||||
* application space. Rather applications should use the SIOCMIISIG
|
||||
* ioctl to receive a signal when a PHY event occurs.
|
||||
* ** This interrupt is really of no use if the Ethernet MAC driver
|
||||
* does not support these ioctl calls.
|
||||
*
|
||||
* Input Parameters:
|
||||
* intf - Identifies the network interface. For example "eth0". Only
|
||||
* useful on platforms that support multiple Ethernet interfaces
|
||||
* and, hence, multiple PHYs and PHY interrupts.
|
||||
* handler - The client interrupt handler to be invoked when the PHY
|
||||
* asserts an interrupt. Must reside in OS space, but can
|
||||
* signal tasks in user space. A value of NULL can be passed
|
||||
* in order to detach and disable the PHY interrupt.
|
||||
* enable - A function pointer that be unsed to enable or disable the
|
||||
* PHY interrupt.
|
||||
*
|
||||
* Returned Value:
|
||||
* The previous PHY interrupt handler address is returned. This allows you
|
||||
* to temporarily replace an interrupt handler, then restore the original
|
||||
* interrupt handler. NULL is returned if there is was not handler in
|
||||
* place when the call was made.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMV7_PIOA_IRQ
|
||||
xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
|
||||
{
|
||||
irqstate_t flags;
|
||||
xcpt_t *phandler;
|
||||
xcpt_t oldhandler;
|
||||
pio_pinset_t pinset;
|
||||
phy_enable_t enabler;
|
||||
int irq;
|
||||
|
||||
DEBUGASSERT(intf);
|
||||
|
||||
nvdbg("%s: handler=%p\n", intf, handler);
|
||||
phydbg("EMAC0: devname=%s\n", SAMV7_EMAC0_DEVNAME);
|
||||
phydbg("EMAC1: devname=%s\n", SAMV7_EMAC1_DEVNAME);
|
||||
|
||||
if (strcmp(intf, SAMV7_EMAC0_DEVNAME) == 0)
|
||||
{
|
||||
phydbg("Select EMAC0\n");
|
||||
phandler = &g_emac0_handler;
|
||||
pinset = GPIO_INT_ETH0;
|
||||
irq = IRQ_INT_ETH0;
|
||||
enabler = sam_emac0_phy_enable;
|
||||
}
|
||||
else
|
||||
{
|
||||
ndbg("Unsupported interface: %s\n", intf);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* Disable interrupts until we are done. This guarantees that the
|
||||
* following operations are atomic.
|
||||
*/
|
||||
|
||||
flags = irqsave();
|
||||
|
||||
/* Get the old interrupt handler and save the new one */
|
||||
|
||||
oldhandler = *phandler;
|
||||
*phandler = handler;
|
||||
|
||||
/* Configure the interrupt */
|
||||
|
||||
if (handler)
|
||||
{
|
||||
phydbg("Configure pin: %08x\n", pinset);
|
||||
sam_pioirq(pinset);
|
||||
|
||||
phydbg("Attach IRQ%d\n", irq);
|
||||
(void)irq_attach(irq, handler);
|
||||
}
|
||||
else
|
||||
{
|
||||
phydbg("Detach IRQ%d\n", irq);
|
||||
(void)irq_detach(irq);
|
||||
enabler = NULL;
|
||||
}
|
||||
|
||||
/* Return with the interrupt disabled in either case */
|
||||
|
||||
sam_pioirqdisable(irq);
|
||||
|
||||
/* Return the enabling function pointer */
|
||||
|
||||
if (enable)
|
||||
{
|
||||
*enable = enabler;
|
||||
}
|
||||
|
||||
/* Return the old handler (so that it can be restored) */
|
||||
|
||||
irqrestore(flags);
|
||||
return oldhandler;
|
||||
}
|
||||
#endif /* CONFIG_SAMV7_PIOA_IRQ */
|
||||
|
||||
#endif /* HAVE_NETWORK */
|
||||
@ -169,9 +169,34 @@
|
||||
*/
|
||||
|
||||
/* Ethernet MAC.
|
||||
* to be provided
|
||||
*
|
||||
* KSZ8061RNBVA Connections
|
||||
* ------------------------
|
||||
*
|
||||
* ------ --------- --------- --------------------------
|
||||
* SAMV71 SAMV71 Ethernet Shared functionality
|
||||
* Pin Function Function
|
||||
* ------ --------- --------- --------------------------
|
||||
* PD00 GTXCK REF_CLK Shield
|
||||
* PD01 GTXEN TXEN
|
||||
* PD02 GTX0 TXD0
|
||||
* PD03 GTX1 TXD1
|
||||
* PD04 GRXDV CRS_DV Trace
|
||||
* PD05 GRX0 RXD0 Trace
|
||||
* PD06 GRX1 RXD1 Trace
|
||||
* PD07 GRXER RXER Trace
|
||||
* PD08 GMDC MDC Trace
|
||||
* PD09 GMDIO MDIO
|
||||
* PA19 GPIO INTERRUPT EXT1, Shield
|
||||
* PA29 GPIO SIGDET
|
||||
* PC10 GPIO RESET
|
||||
* ------ --------- --------- --------------------------
|
||||
*/
|
||||
|
||||
#define GPIO_INT_ETH0 (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \
|
||||
GPIO_INT_FALLING | GPIO_PORT_PIOA | GPIO_PIN19)
|
||||
#define IRQ_INT_ETH0 SAM_IRQ_PA19
|
||||
|
||||
/* LEDs
|
||||
*
|
||||
* There are two yellow LED available on the SAM V71 Xplained Ultra board that
|
||||
|
||||
@ -296,6 +296,9 @@ config ETH0_PHY_KS8721
|
||||
config ETH0_PHY_KSZ8051
|
||||
bool "Micrel KSZ8051 PHY"
|
||||
|
||||
config ETH0_PHY_KSZ8061
|
||||
bool "Micrel KSZ8061 PHY"
|
||||
|
||||
config ETH0_PHY_KSZ8081
|
||||
bool "Micrel KSZ8081 PHY"
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user