arch: armv7-a: Disable IRQ to make the A core
policy consistent with the M core for TEE Signed-off-by: hujun5 <hujun5@xiaomi.com>
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@ -137,13 +137,18 @@ void up_initial_state(struct tcb_s *tcb)
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cpsr |= (PSR_I_BIT | PSR_F_BIT);
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#elif !defined(CONFIG_ARCH_TRUSTZONE_SECURE) && !defined(CONFIG_ARCH_HIPRI_INTERRUPT)
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#elif defined(CONFIG_ARCH_TRUSTZONE_SECURE)
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/* In tee, we need to disable the IRQ interrupt to make the A core
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* policy consistent with the M core.
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*/
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cpsr |= PSR_I_BIT;
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#elif !defined(CONFIG_ARCH_HIPRI_INTERRUPT)
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/* Leave IRQs enabled (Also FIQs if CONFIG_ARCH_TRUSTZONE_SECURE or
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* CONFIG_ARCH_HIPRI_INTERRUPT is selected)
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*/
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cpsr |= PSR_F_BIT;
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#endif
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#ifdef CONFIG_ARM_THUMB
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