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Merged in alinjerpelea/nuttx (pull request #890)

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Add syscontrol for cxd56xx

* arch: arm: cxd56xx: add sysctl

    Add the syscontrol implementation for cxd56xx.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: timer updates

    Add the function to change the clock speed.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: cxd56_uart updates

    Add pinctrl and clock ctrl functionality.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add conditional for SDHCI

    The cxd56_sdhci should be built only if CONFIG_CXD56_SDIO is selected

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
This commit is contained in:
Alin Jerpelea 2019-06-11 11:19:31 +00:00 committed by Gregory Nutt
parent 6d4c99f2aa
commit 32f89d63f7
5 changed files with 632 additions and 52 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
arch/arm/src/cxd56xx/Make.defs
View File

@ -97,6 +97,7 @@ CHIP_CSRCS += cxd56_cpufifo.c
CHIP_CSRCS += cxd56_icc.c
CHIP_CSRCS += cxd56_powermgr.c
CHIP_CSRCS += cxd56_farapi.c
CHIP_CSRCS += cxd56_sysctl.c
ifeq ($(CONFIG_CXD56_GPIO_IRQ),y)
CHIP_CSRCS += cxd56_gpioint.c
@ -105,3 +106,7 @@ endif
ifeq ($(CONFIG_USBDEV),y)
CHIP_CSRCS += cxd56_usbdev.c
endif
ifeq ($(CONFIG_CXD56_SDIO),y)
CHIP_CSRCS += cxd56_sdhci.c
endif

159
arch/arm/src/cxd56xx/cxd56_sysctl.c Normal file
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@ -0,0 +1,159 @@
/****************************************************************************
* arch/arm/src/cxd56xx/cxd56_sysctl.c
*
* Copyright 2018 Sony Semiconductor Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name of Sony Semiconductor Solutions Corporation nor
* the names of its contributors may be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <nuttx/fs/fs.h>
#include <nuttx/fs/ioctl.h>
#include <stdio.h>
#include <string.h>
#include <debug.h>
#include <errno.h>
#include <semaphore.h>
#include "cxd56_icc.h"
#include "cxd56_sysctl.h"
#ifdef CONFIG_CXD56_SYSCTL_TIMEOUT
# define SYSCTL_TIMEOUT CONFIG_CXD56_SYSCTL_TIMEOUT
#else
# define SYSCTL_TIMEOUT 5000
#endif
static int sysctl_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
static sem_t g_exc;
static sem_t g_sync;
static int g_errcode = 0;
static const struct file_operations g_sysctlfops =
{
.ioctl = sysctl_ioctl,
};
static int sysctl_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
{
int ret = OK;
switch (cmd)
{
default:
{
_err("cmd %x(%x)\n", cmd, arg);
ret = cxd56_sysctlcmd(cmd & 0xff, arg);
if (ret)
{
set_errno(ret);
}
}
}
return ret;
}
static void sysctl_semtake(sem_t *semid)
{
while (sem_wait(semid) != 0)
{
ASSERT(errno == EINTR);
}
}
static void sysctl_semgive(sem_t *semid)
{
sem_post(semid);
}
static int sysctl_rxhandler(int cpuid, int protoid,
uint32_t pdata, uint32_t data,
FAR void *userdata)
{
DEBUGASSERT(cpuid == 0);
DEBUGASSERT(protoid == CXD56_PROTO_SYSCTL);
g_errcode = (int)data;
sysctl_semgive(&g_sync);
return OK;
}
int cxd56_sysctlcmd(uint8_t id, uint32_t data)
{
iccmsg_t msg;
int ret;
/* Get exclusive access */
sysctl_semtake(&g_exc);
msg.cpuid = 0;
msg.msgid = id;
msg.data = data;
/* Send any message to system CPU */
ret = cxd56_iccsend(CXD56_PROTO_SYSCTL, &msg, SYSCTL_TIMEOUT);
if (ret < 0)
{
_err("Timeout.\n");
return ret;
}
/* Wait for reply message from system CPU */
sysctl_semtake(&g_sync);
/* Get the error code returned from system cpu */
ret = g_errcode;
sysctl_semgive(&g_exc);
return ret;
}
void cxd56_sysctlinitialize(void)
{
cxd56_iccinit(CXD56_PROTO_SYSCTL);
sem_init(&g_exc, 0, 1);
sem_init(&g_sync, 0, 0);
cxd56_iccregisterhandler(CXD56_PROTO_SYSCTL, sysctl_rxhandler, NULL);
(void)register_driver("/dev/sysctl", &g_sysctlfops, 0666, NULL);
}

158
arch/arm/src/cxd56xx/cxd56_sysctl.h Normal file
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@ -0,0 +1,158 @@
/****************************************************************************
* arch/arm/src/cxd56xx/cxd56_sysctl.h
*
* Copyright 2018 Sony Semiconductor Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name of Sony Semiconductor Solutions Corporation nor
* the names of its contributors may be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/**
* @file cxd56_sysctl.h
*/
#ifndef __ARCH_ARM_SRC_CXD56XX_CXD56_SYSCTL_H
#define __ARCH_ARM_SRC_CXD56XX_CXD56_SYSCTL_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* System control commands */
/* XXX: Command assignments are experimental */
#define SYSCTL_INVALID 0
#define SYSCTL_MAP 1
#define SYSCTL_UNMAP 2
#define SYSCTL_GETFWSIZE 3
#define SYSCTL_LOADFW 4
#define SYSCTL_UNLOADFW 5
#define SYSCTL_GETPGOFFSETS 6
#define SYSCTL_LOADFWUNIFY 7
#define SYSCTL_LOADFWCLONE 8
#define SYSCTL_UNLOADFWGP 9
/* Number of sub cores */
#define SYSCTL_NR_CPUS 5
/* Limit length of filename */
#define SYSCTL_FNLEN 32
/****************************************************************************
* Public Types
****************************************************************************/
/* Arguments for SYSCTL_MAP */
typedef struct sysctl_map_s
{
int cpuid;
uint32_t virt;
uint32_t phys;
uint32_t size;
} sysctl_map_t;
/* Arguments for SYSCTL_UNMAP */
typedef struct sysctl_unmap_s
{
int cpuid;
uint32_t virt;
uint32_t size;
} sysctl_unmap_t;
/* Arguments for SYSCTL_GETFWSIZE */
typedef struct sysctl_getfwsize_s
{
char filename[SYSCTL_FNLEN];
} sysctl_getfwsize_t;
/* Arguments for SYSCTL_LOADFW */
typedef struct sysctl_loadfw_s
{
int cpuid;
uint32_t addr;
char filename[SYSCTL_FNLEN];
} sysctl_loadfw_t;
/* Arguments for SYSCTL_UNLOADFW */
typedef struct sysctl_unloadfw_s
{
int cpuid;
} sysctl_unloadfw_t;
/* Arguments for SYSCTL_GETPGOFFSETS */
typedef struct sysctl_getpgoffsets_s
{
uint8_t offset[SYSCTL_NR_CPUS];
uint8_t size[SYSCTL_NR_CPUS];
int nr_offsets;
char filename[SYSCTL_FNLEN];
} sysctl_getpgoffsets_t;
/* Arguments for SYSCTL_LOADFWUNIFY and SYSCTL_LOADFWCLONE */
typedef struct sysctl_loadfwgp_s
{
uint32_t cpuids;
uint32_t addr[SYSCTL_NR_CPUS];
int nr_addrs;
char filename[SYSCTL_FNLEN];
} sysctl_loadfwgp_t;
/* Arguments for SYSCTL_UNLOADFWGP */
typedef struct sysctl_unloadfwgp_s
{
int groupid;
} sysctl_unloadfwgp_t;
/****************************************************************************
* Public Functions
****************************************************************************/
/**
* Initialize system control block
*/
void cxd56_sysctlinitialize(void);
/**
* Send system control command
*/
int cxd56_sysctlcmd(uint8_t id, uint32_t data);
#endif

60
arch/arm/src/cxd56xx/cxd56_timerisr.c
View File

@ -1,10 +1,9 @@
/****************************************************************************
* arch/arm/src/cxd56xx/cxd56_timerisr.c
*
* Copyright 2018 Sony Semiconductor Solutions Corporation
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Copyright 2018 Sony Semiconductor Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -52,6 +51,9 @@
#include "clock/clock.h"
#include "up_internal.h"
#include "up_arch.h"
#include "cxd56_powermgr.h"
#include "cxd56_timerisr.h"
#include "cxd56_clock.h"
#include "chip.h"
@ -79,12 +81,55 @@ static uint32_t g_systrvr;
* Private Function Prototypes
****************************************************************************/
static int cxd56_changeclock(uint8_t id);
static int cxd56_timerisr(int irq, uint32_t *regs, FAR void *arg);
/****************************************************************************
* Private Functions
****************************************************************************/
static int cxd56_changeclock(uint8_t id)
{
irqstate_t flags;
uint32_t systcsr;
uint32_t current;
if (id == CXD56_PM_CALLBACK_ID_CLK_CHG_START)
{
flags = enter_critical_section();
{
systcsr = getreg32(NVIC_SYSTICK_CTRL);
systcsr &= ~NVIC_SYSTICK_CTRL_ENABLE;
putreg32(systcsr, NVIC_SYSTICK_CTRL);
}
leave_critical_section(flags);
}
else if ((id == CXD56_PM_CALLBACK_ID_CLK_CHG_END) ||
(id == CXD56_PM_CALLBACK_ID_HOT_BOOT))
{
current = (cxd56_get_cpu_baseclk() / CLK_TCK) - 1;
flags = enter_critical_section();
{
if (g_systrvr != current)
{
putreg32(current, NVIC_SYSTICK_RELOAD);
g_systrvr = current;
putreg32(0, NVIC_SYSTICK_CURRENT);
}
if (id == CXD56_PM_CALLBACK_ID_CLK_CHG_END)
{
systcsr = getreg32(NVIC_SYSTICK_CTRL);
systcsr |= NVIC_SYSTICK_CTRL_ENABLE;
putreg32(systcsr, NVIC_SYSTICK_CTRL);
}
}
leave_critical_section(flags);
}
return 0;
}
/****************************************************************************
* Public Functions
****************************************************************************/
@ -107,7 +152,7 @@ static int cxd56_timerisr(int irq, uint32_t *regs, FAR void *arg)
}
/****************************************************************************
* Function: arm_timer_initialize
* Function: up_timer_initialize
*
* Description:
* This function is called during start-up to initialize
@ -134,7 +179,7 @@ void arm_timer_initialize(void)
/* Configure SysTick to interrupt at the requested rate */
g_systrvr = (CXD56_CCLK / CLK_TCK) - 1;
g_systrvr = (cxd56_get_cpu_baseclk() / CLK_TCK) - 1;
putreg32(g_systrvr, NVIC_SYSTICK_RELOAD);
/* Attach the timer interrupt vector */
@ -150,3 +195,10 @@ void arm_timer_initialize(void)
up_enable_irq(CXD56_IRQ_SYSTICK);
}
int cxd56_timerisr_initialize(void)
{
cxd56_pm_register_callback(PM_CLOCK_APP_CPU, cxd56_changeclock);
return 0;
}

302
arch/arm/src/cxd56xx/cxd56_uart.c
View File

@ -1,10 +1,9 @@
/****************************************************************************
* arch/arm/src/cxd56xx/cxd56_uart.c
*
* Copyright 2018 Sony Semiconductor Solutions Corporation
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Copyright 2018 Sony Semiconductor Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -53,7 +52,10 @@
#include "chip.h"
#include "cxd56_config.h"
#include "cxd56_clock.h"
#include "cxd56_uart.h"
#include "cxd56_pinconfig.h"
#include "cxd56_powermgr.h"
/****************************************************************************
* Pre-processor Definitions
@ -62,60 +64,60 @@
/* Select UART parameters for the selected console */
#if defined(CONFIG_UART0_SERIAL_CONSOLE)
# define CONSOLE_BASE CXD56_UART0_BASE
# define CONSOLE_BASEFREQ BOARD_UART0_BASEFREQ
# define CONSOLE_BAUD CONFIG_UART0_BAUD
# define CONSOLE_BITS CONFIG_UART0_BITS
# define CONSOLE_PARITY CONFIG_UART0_PARITY
# define CONSOLE_2STOP CONFIG_UART0_2STOP
#define CONSOLE_BASE CXD56_UART0_BASE
#define CONSOLE_BASEFREQ BOARD_UART0_BASEFREQ
#define CONSOLE_BAUD CONFIG_UART0_BAUD
#define CONSOLE_BITS CONFIG_UART0_BITS
#define CONSOLE_PARITY CONFIG_UART0_PARITY
#define CONSOLE_2STOP CONFIG_UART0_2STOP
#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
# define CONSOLE_BASE CXD56_UART1_BASE
# define CONSOLE_BASEFREQ BOARD_UART1_BASEFREQ
# define CONSOLE_BAUD CONFIG_UART1_BAUD
# define CONSOLE_BITS CONFIG_UART1_BITS
# define CONSOLE_PARITY CONFIG_UART1_PARITY
# define CONSOLE_2STOP CONFIG_UART1_2STOP
#define CONSOLE_BASE CXD56_UART1_BASE
#define CONSOLE_BASEFREQ BOARD_UART1_BASEFREQ
#define CONSOLE_BAUD CONFIG_UART1_BAUD
#define CONSOLE_BITS CONFIG_UART1_BITS
#define CONSOLE_PARITY CONFIG_UART1_PARITY
#define CONSOLE_2STOP CONFIG_UART1_2STOP
#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
# define CONSOLE_BASE CXD56_UART2_BASE
# define CONSOLE_BASEFREQ BOARD_UART2_BASEFREQ
# define CONSOLE_BAUD CONFIG_UART2_BAUD
# define CONSOLE_BITS CONFIG_UART2_BITS
# define CONSOLE_PARITY CONFIG_UART2_PARITY
# define CONSOLE_2STOP CONFIG_UART2_2STOP
#define CONSOLE_BASE CXD56_UART2_BASE
#define CONSOLE_BASEFREQ BOARD_UART2_BASEFREQ
#define CONSOLE_BAUD CONFIG_UART2_BAUD
#define CONSOLE_BITS CONFIG_UART2_BITS
#define CONSOLE_PARITY CONFIG_UART2_PARITY
#define CONSOLE_2STOP CONFIG_UART2_2STOP
#elif defined(HAVE_CONSOLE)
# error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
#error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
#endif
/* Get word length setting for the console */
#if CONSOLE_BITS >= 5 && CONSOLE_BITS <= 8
# define CONSOLE_LCR_WLS UART_LCR_WLEN(CONSOLE_BITS)
#define CONSOLE_LCR_WLS UART_LCR_WLEN(CONSOLE_BITS)
#elif defined(HAVE_CONSOLE)
# error "Invalid CONFIG_UARTn_BITS setting for console "
#error "Invalid CONFIG_UARTn_BITS setting for console "
#endif
/* Get parity setting for the console */
#if CONSOLE_PARITY == 0
# define CONSOLE_LCR_PAR 0
#define CONSOLE_LCR_PAR 0
#elif CONSOLE_PARITY == 1
# define CONSOLE_LCR_PAR (UART_LCR_PEN)
#define CONSOLE_LCR_PAR (UART_LCR_PEN)
#elif CONSOLE_PARITY == 2
# define CONSOLE_LCR_PAR (UART_LCR_PEN | UART_LCR_EPS)
#define CONSOLE_LCR_PAR (UART_LCR_PEN | UART_LCR_EPS)
#elif CONSOLE_PARITY == 3
# define CONSOLE_LCR_PAR (UART_LCR_PEN | UART_LCR_SPS)
#define CONSOLE_LCR_PAR (UART_LCR_PEN | UART_LCR_SPS)
#elif CONSOLE_PARITY == 4
# define CONSOLE_LCR_PAR (UART_LCR_PEN | UART_LCR_EPS | UART_LCR_SPS)
#define CONSOLE_LCR_PAR (UART_LCR_PEN | UART_LCR_EPS | UART_LCR_SPS)
#elif defined(HAVE_CONSOLE)
# error "Invalid CONFIG_UARTn_PARITY setting for CONSOLE"
#error "Invalid CONFIG_UARTn_PARITY setting for CONSOLE"
#endif
/* Get stop-bit setting for the console and UART0/1/2 */
#if CONSOLE_2STOP != 0
# define CONSOLE_LCR_STOP UART_LCR_STP2
#define CONSOLE_LCR_STOP UART_LCR_STP2
#else
# define CONSOLE_LCR_STOP 0
#define CONSOLE_LCR_STOP 0
#endif
/* LCR and FCR values for the console */
@ -156,10 +158,166 @@ static struct uartdev g_uartdevs[] =
}
};
static uint32_t g_lcr;
static uint32_t g_cr;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: cxd56_uart_pincontrol
*
* Description:
* Configure the UART pin
*
* Input Parameter:
* ch - channel numer
* on - true: enable pin, false: disable pin
*
****************************************************************************/
static void cxd56_uart_pincontrol(int ch, bool on)
{
switch (ch)
{
#ifdef CONFIG_CXD56_UART1
case 1:
if (on)
{
CXD56_PIN_CONFIGS(PINCONFS_SPI0A_UART1);
}
else
{
CXD56_PIN_CONFIGS(PINCONFS_SPI0A_GPIO);
}
break;
#endif
#ifdef CONFIG_CXD56_UART2
case 2:
if (on)
{
CXD56_PIN_CONFIGS(PINCONFS_UART2);
}
else
{
CXD56_PIN_CONFIGS(PINCONFS_UART2_GPIO);
}
break;
#endif
default:
break;
}
}
/****************************************************************************
* Name: cxd56_uart_start
*
* Description:
* Start a UART. These functions are used by the serial driver when a
* UART is start.
*
****************************************************************************/
static void cxd56_uart_start(int ch)
{
cxd56_setbaud(CONSOLE_BASE, CONSOLE_BASEFREQ, CONSOLE_BAUD);
putreg32(g_lcr, g_uartdevs[ch].uartbase + CXD56_UART_LCR_H);
putreg32(g_cr, g_uartdevs[ch].uartbase + CXD56_UART_CR);
}
/****************************************************************************
* Name: cxd56_uart_stop
*
* Description:
* Stop a UART. These functions are used by the serial driver when a
* UART is stop.
*
****************************************************************************/
static void cxd56_uart_stop(int ch)
{
uint32_t cr;
while (UART_FR_BUSY & getreg32(g_uartdevs[ch].uartbase + CXD56_UART_FR));
cr = getreg32(g_uartdevs[ch].uartbase + CXD56_UART_CR);
g_cr = cr;
cr &= ~UART_CR_EN;
putreg32(cr, g_uartdevs[ch].uartbase + CXD56_UART_CR);
g_lcr = getreg32(g_uartdevs[ch].uartbase + CXD56_UART_LCR_H);
putreg32(0, g_uartdevs[ch].uartbase + CXD56_UART_LCR_H);
}
/****************************************************************************
* Name: cxd56_uart_have_rxdata
*
* Description:
* Check if there is the remaining data in received FIFO or not
*
****************************************************************************/
static int cxd56_uart_have_rxdata(int ch)
{
if (UART_FR_RXFE & getreg32(g_uartdevs[ch].uartbase + CXD56_UART_FR))
{
return 0; /* Rx FIFO is empty */
}
else
{
return 1; /* Rx FIFO have data */
}
}
/****************************************************************************
* Name: cxd56_uart_clockchange
*
* Description:
* pm event callback for uart console
*
****************************************************************************/
static int cxd56_uart_clockchange(uint8_t id)
{
#ifdef HAVE_CONSOLE
#if defined(CONFIG_UART0_SERIAL_CONSOLE)
int ch = 0;
#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
int ch = 1;
#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
int ch = 2;
#endif
switch (id)
{
case CXD56_PM_CALLBACK_ID_CLK_CHG_START:
cxd56_uart_stop(ch);
break;
case CXD56_PM_CALLBACK_ID_CLK_CHG_END:
cxd56_uart_start(ch);
break;
case CXD56_PM_CALLBACK_ID_HOT_BOOT:
if (cxd56_uart_have_rxdata(ch))
{
return -1; /* don't restart if processing data in rxfifo */
}
cxd56_uart_stop(ch);
cxd56_uart_start(ch);
break;
default:
break;
}
#endif
return 0;
}
/****************************************************************************
* Public Functions
****************************************************************************/
@ -218,20 +376,19 @@ void cxd56_lowsetup(void)
* other UARTs
*/
# if defined(CONFIG_UART0_SERIAL_CONSOLE)
#if defined(CONFIG_UART0_SERIAL_CONSOLE)
cxd56_uart_setup(0);
# elif defined(CONFIG_UART1_SERIAL_CONSOLE)
#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
cxd56_uart_setup(1);
# elif defined(CONFIG_UART2_SERIAL_CONSOLE)
#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
cxd56_uart_setup(2);
# endif
#endif
/* Configure the console (only) */
# if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
{
uint32_t val;
val = getreg32(CONSOLE_BASE + CXD56_UART_CR);
if (val & UART_CR_EN)
{
@ -244,8 +401,8 @@ void cxd56_lowsetup(void)
putreg32(0, CONSOLE_BASE + CXD56_UART_IFLS);
putreg32(UART_INTR_ALL, CONSOLE_BASE + CXD56_UART_ICR);
# endif
#endif /* HAVE_UART */
#endif
#endif
}
/****************************************************************************
@ -259,6 +416,18 @@ void cxd56_lowsetup(void)
void cxd56_uart_reset(int ch)
{
/* Configure pin */
cxd56_uart_pincontrol(ch, false);
/* TODO: clock down */
#ifdef CONFIG_CXD56_UART2
if (ch == 2)
{
cxd56_img_uart_clock_disable();
}
#endif
}
void cxd56_uart_setup(int ch)
@ -271,11 +440,9 @@ void cxd56_uart_setup(int ch)
#ifdef CONFIG_CXD56_UART2
if (ch == 2)
{
/* Not supported yet. */
return;
cxd56_img_uart_clock_enable();
}
#endif /* CONFIG_CXD56_UART2 */
#endif
cr = getreg32(g_uartdevs[ch].uartbase + CXD56_UART_CR);
putreg32(cr & ~(1 << 0), g_uartdevs[ch].uartbase + CXD56_UART_CR);
@ -284,6 +451,10 @@ void cxd56_uart_setup(int ch)
putreg32(lcr & ~(1 << 4), g_uartdevs[ch].uartbase + CXD56_UART_LCR_H);
putreg32(cr, g_uartdevs[ch].uartbase + CXD56_UART_CR);
/* Configure pin */
cxd56_uart_pincontrol(ch, true);
}
/****************************************************************************
@ -297,18 +468,31 @@ void cxd56_setbaud(uintptr_t uartbase, uint32_t basefreq, uint32_t baud)
uint32_t fbrd;
uint32_t div;
uint32_t lcr_h;
irqstate_t flags = enter_critical_section();
if (uartbase == CXD56_UART2_BASE)
{
basefreq = cxd56_get_img_uart_baseclock();
}
else if (uartbase == CXD56_UART1_BASE)
{
basefreq = cxd56_get_com_baseclock();
}
else
{
leave_critical_section(flags);
return;
}
div = basefreq / (16 * baud / 100);
ibrd = div / 100;
/* fbrd will be up to 63.
* ((99 * 64 + 50) / 100 = 6386 / 100 = 63)
*/
/* fbrd will be up to 63 ((99 * 64 + 50) / 100 = 6386 / 100 = 63) */
fbrd = (((div % 100) * 64) + 50) / 100;
/* Check invalid baud rate divider setting combination. */
/* Invalid baud rate divider setting combination */
if (ibrd == 0 || (ibrd == 65535 && fbrd != 0))
{
@ -318,7 +502,7 @@ void cxd56_setbaud(uintptr_t uartbase, uint32_t basefreq, uint32_t baud)
putreg32(ibrd, uartbase + CXD56_UART_IBRD);
putreg32(fbrd, uartbase + CXD56_UART_FBRD);
/* Baud rate is updated by writing to LCR_H. */
/* Baud rate is updated by writing to LCR_H */
lcr_h = getreg32(uartbase + CXD56_UART_LCR_H);
putreg32(lcr_h, uartbase + CXD56_UART_LCR_H);
@ -326,3 +510,25 @@ void cxd56_setbaud(uintptr_t uartbase, uint32_t basefreq, uint32_t baud)
finish:
leave_critical_section(flags);
}
/****************************************************************************
* Name: cxd56_uart_initialize
*
* Description:
* Various initial registration
*
****************************************************************************/
int cxd56_uart_initialize(void)
{
#ifdef HAVE_UART
# if defined(CONFIG_UART0_SERIAL_CONSOLE)
cxd56_pm_register_callback(PM_CLOCK_HIF_UART0, cxd56_uart_clockchange);
# elif defined(CONFIG_UART1_SERIAL_CONSOLE)
cxd56_pm_register_callback(PM_CLOCK_SYS_UART1, cxd56_uart_clockchange);
# elif defined(CONFIG_UART2_SERIAL_CONSOLE)
cxd56_pm_register_callback(PM_CLOCK_APP_UART, cxd56_uart_clockchange);
# endif
#endif
return 0;
}