From 331ab68daba243b26abdb6fd748f6a23be2c015d Mon Sep 17 00:00:00 2001 From: patacongo Date: Wed, 16 Feb 2011 01:45:35 +0000 Subject: [PATCH] m9s12x context save structure git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3298 42af7a65-404d-4744-a932-0658087f49c3 --- arch/hc/include/hcs12/irq.h | 77 ++++++++++++++++++++++++- arch/hc/src/m9s12/m9s12_vectors.S | 95 ++++++++++++++++++++++++++++++- 2 files changed, 167 insertions(+), 5 deletions(-) diff --git a/arch/hc/include/hcs12/irq.h b/arch/hc/include/hcs12/irq.h index b6adf73226..3149c543a4 100755 --- a/arch/hc/include/hcs12/irq.h +++ b/arch/hc/include/hcs12/irq.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/hc/include/hcs12/irq.h * - * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -50,6 +50,79 @@ /************************************************************************************ * Definitions ************************************************************************************/ +/************************************************************************************ + * Register state save strucure + * Low Address <-- SP after state save + * [PPAGE] + * [soft regisers] + * XYH + * XYL + * ZH + * ZL + * TMPH + * TMPL + * FRAMEH + * FRAMEL <-- SP after interrupt + * CCR + * B + * A + * XH + * XL + * YH + * YL + * PCH + * High Address PCL <-- SP before interrupt + * + ************************************************************************************/ + +/* Byte offsets */ + +#ifndef CONFIG_HCS12_NONBANKED +# define REG_PPAGE 0 +# define REG_FIRST_SOFTREG 1 +#else +# define REG_FIRST_SOFTREG 0 +#endif + +#if CONFIG_HCS12_MSOFTREGS > 2 +# error "Need to save more registers" +#elif CONFIG_HCS12_MSOFTREGS == 2 +# define REG_SOFTREG1 REG_FIRST_SOFTREG +# define REG_SOFTREG2 (REG_FIRST_SOFTREG+2) +# define REG_FIRST_HARDREG (REG_FIRST_SOFTREG+4) +#elif CONFIG_HCS12_MSOFTREGS == 1 +# define REG_SOFTREG1 REG_FIRST_SOFTREG +# define REG_FIRST_HARDREG (REG_FIRST_SOFTREG+2) +#else +# define REG_FIRST_HARDREG REG_FIRST_SOFTREG +#endif + +#define REG_XY REG_FIRST_HARDREG +#define REG_Z (REG_FIRST_HARDREG+2) +# define REG_ZH (REG_FIRST_HARDREG+2) +# define REG_ZL (REG_FIRST_HARDREG+3) +#define REG_TMP (REG_FIRST_HARDREG+4) +# define REG_TMPH (REG_FIRST_HARDREG+4) +# define REG_TMPL (REG_FIRST_HARDREG+5) +#define REG_FRAME (REG_FIRST_HARDREG+6) +# define REG_FRAMEH (REG_FIRST_HARDREG+6) +# define REG_FRAMEL (REG_FIRST_HARDREG+7) + +#define REG_CCR (REG_FIRST_HARDREG+8) +#define REG_BA (REG_FIRST_HARDREG+9) +# define REG_B (REG_FIRST_HARDREG+9) +# define REG_A (REG_FIRST_HARDREG+10) +#define REG_X (REG_FIRST_HARDREG+11) +# define REG_XH (REG_FIRST_HARDREG+11) +# define REG_XL (REG_FIRST_HARDREG+12) +#define REG_Y (REG_FIRST_HARDREG+13) +# define REG_YH (REG_FIRST_HARDREG+13) +# define REG_YL (REG_FIRST_HARDREG+14) +#define REG_PC (REG_FIRST_HARDREG+15) +# define REG_PCH (REG_FIRST_HARDREG+15) +# define REG_PCL (REG_FIRST_HARDREG+16) + +#define XCPTCONTEXT_REGS (REG_FIRST_HARDREG+17) /************************************************************************************ * Public Types @@ -60,7 +133,7 @@ #ifndef __ASSEMBLY__ struct xcptcontext { - int dummy; /* For now */ + uint8_t regs[XCPTCONTEXT_REGS]; }; /**************************************************************************** diff --git a/arch/hc/src/m9s12/m9s12_vectors.S b/arch/hc/src/m9s12/m9s12_vectors.S index 147f92926c..f332c49a1a 100755 --- a/arch/hc/src/m9s12/m9s12_vectors.S +++ b/arch/hc/src/m9s12/m9s12_vectors.S @@ -2,7 +2,7 @@ * arch/hc/src/m9s12/m9s12_vectors.S * arch/hc/src/chip/m9s12_vectors.S * - * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -56,8 +56,24 @@ * Macros ************************************************************************************/ +/* On entry into an I- or X-interrupt, into an SWI, or into an undefined instruction + * interrupt, the stack frame created by hardware looks like: + * + * Low Address <-- SP after interrupt + * CCR + * B + * A + * XH + * XL + * YH + * YL + * PCH + * High Address PCL <-- SP before interrupt + */ + .macro HANDLER, label, irqno \label: +#warning "Missing Logic" .endm /************************************************************************************ @@ -189,11 +205,83 @@ handlers: * Common IRQ handling logic * * Description: - * To be provided + * On entry into an I- or X-interrupt, into an SWI, or into an undefined + * instruction interrupt, the stack frame created by hardware looks like: + * + * Low Address <-- SP after state save + * [PPAGE] + * [soft regisers] + * XYH + * XYL + * ZH + * ZL + * TMPH + * TMPL + * FRAMEH + * FRAMEL <-- SP after interrupt + * CCR + * B + * A + * XH + * XL + * YH + * YL + * PCH + * High Address PCL <-- SP before interrupt * ************************************************************************************/ vcommon: + /* Save the rest of the frame */ + + movw _.frame, 2, -sp + movw _.tmp, 2, -sp + movw _.z, 2, -sp + movw _.xy, 2, -sp + + /* Save the soft registers */ + +#if CONFIG_HCS12_MSOFTREGS > 2 +# error "Need to save more registers" +#endif +#if CONFIG_HCS12_MSOFTREGS > 1 + movw _.d2, 2, -sp +#endif +#if CONFIG_HCS12_MSOFTREGS > 0 + movw _.d1, 2, -sp +#endif + + /* Save the PPAGE register */ + +#ifndef CONFIG_HCS12_NONBANKED + movb HCS12_MMC_PPAGE, 1, -sp +#endif + + /* Handle the IRQ */ +#warning "Missing Logic" + + /* Restore registers and return */ + + /* Restore the PPAGE register */ + +#ifndef CONFIG_HCS12_NONBANKED + movb 1, sp+, HCS12_MMC_PPAGE +#endif + + /* Restore the soft registers */ + +#if CONFIG_HCS12_MSOFTREGS > 0 + movw 2, sp+, _.d1 +#endif +#if CONFIG_HCS12_MSOFTREGS > 1 + movw 2, sp+, _.d2 +#endif + + movw 2, sp+, _.xy + movw 2, sp+, _.z + movw 2, sp+, _.tmp + movw 2, sp+, _.frame + rti .size handlers, .-handlers /************************************************************************************ @@ -203,7 +291,8 @@ vcommon: * Name: up_interruptstack/g_userstack * * Description: - * Shouldn't happen + * If CONFIG_ARCH_INTERRUPTSTACK is defined, this sets aside memory for the + * interrupt stack. * ************************************************************************************/