arch/arm/src/stm32/stm32_usbdev.c
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2200 42af7a65-404d-4744-a932-0658087f49c3
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@ -919,7 +919,7 @@
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FLASH, EEPROM, NVRAM, etc. devices.
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* driver/mtd/m25px.c. Added a driver for SPI based FLASH parts M25P64 and M25P128.
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* configs/stm3210e-eval/usbserial. Add a USB serial configuration for the STM32.
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This is for test and development; the STM32 has not yet been checked in.
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Depends on the STM32 USB driver.
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* arch/arm/src/cortexm3/up_switchcontext.S & up_svccall.c. Made an improvement
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to context switching. There are two types of context switches: interrupt
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context switches and background/user context switches. This change should
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@ -934,7 +934,7 @@
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* arch/arm/src/stm32/stm32_usbdev.c - Added a USB device-side driver for the
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STM32.
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NOTE: This USB driver is completely untested as of the initial check-in
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NOTE: This STM32 USB driver is not yet fully untested
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* arch/arm/src/stm32/stm32_rcc.c - Fixed an error in clock initialization.
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On some boards (none of mine), the HSE (high speed external clock) delay
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@ -1571,7 +1571,7 @@ nuttx-0.4.13 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
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FLASH, EEPROM, NVRAM, etc. devices.
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* driver/mtd/m25px.c. Added a driver for SPI based FLASH parts M25P64 and M25P128.
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* configs/stm3210e-eval/usbserial. Add a USB serial configuration for the STM32.
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This is for test and development; the STM32 has not yet been checked in.
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Depends on the STM32 USB driver.
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* arch/arm/src/cortexm3/up_switchcontext.S & up_svccall.c. Made an improvement
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to context switching. There are two types of context switches: interrupt
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context switches and background/user context switches. This change should
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@ -1586,7 +1586,7 @@ nuttx-0.4.13 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
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* arch/arm/src/stm32/stm32_usbdev.c - Added a USB device-side driver for the
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STM32.
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NOTE: This USB driver is completely untested as of the initial check-in
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NOTE: This STM32 USB driver is not yet fully tested
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* arch/arm/src/stm32/stm32_rcc.c - Fixed an error in clock initialization.
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On some boards (none of mine), the HSE (high speed external clock) delay
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@ -228,7 +228,7 @@
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#define USB_COUNT_RX_NUM_BLOCK_SHIFT (10) /* Bits 14-10: Number of blocks */
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#define USB_COUNT_RX_NUM_BLOCK_MASK (0x1f << USB_COUNT_RX_NUM_BLOCK_SHIFT)
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#define USB_COUNT_RX_SHIFT (0) /* Bits 9-0: Reception Byte Count */
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#define USB_COUNT_RX_MASK (0x03ff << USB_COUNT_RX_COUNT_RX_SHIFT)
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#define USB_COUNT_RX_MASK (0x03ff << USB_COUNT_RX_SHIFT)
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/************************************************************************************
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* Public Types
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