Optimize stm32 RTC accuracy
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@ -394,42 +394,45 @@ int up_rtc_initialize(void)
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modifyreg32(STM32_RCC_BDCR, 0, RCC_BDCR_BDRST);
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modifyreg32(STM32_RCC_BDCR, RCC_BDCR_BDRST, 0);
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modifyreg16(STM32_RCC_BDCR, 0, RCC_BDCR_LSEON);
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/* Wait for the LSE clock to be ready */
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while ((getreg16(STM32_RCC_BDCR) & RCC_BDCR_LSERDY) == 0)
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{
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stm32_waste();
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}
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/* Select the lower power external 32,768Hz (Low-Speed External, LSE)
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* oscillator as RTC Clock Source and enable the Clock.
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*/
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modifyreg16(STM32_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, RCC_BDCR_RTCSEL_LSE);
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/* Enable RTC and wait for RSF */
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modifyreg16(STM32_RCC_BDCR, 0, RCC_BDCR_RTCEN);
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stm32_rtc_waitlasttask();
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stm32_rtc_wait4rsf();
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stm32_rtc_waitlasttask();
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/* Configure prescaler, note that these are write-only registers */
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stm32_rtc_beginwr();
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putreg16(STM32_RTC_PRESCALAR_VALUE >> 16, STM32_RTC_PRLH);
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putreg16(STM32_RTC_PRESCALAR_VALUE & 0xffff, STM32_RTC_PRLL);
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stm32_rtc_endwr();
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stm32_rtc_wait4rsf();
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stm32_rtc_waitlasttask();
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/* Write the magic register after RTC initialization. */
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putreg16(RTC_MAGIC, RTC_MAGIC_REG);
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}
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modifyreg16(STM32_RCC_BDCR, 0, RCC_BDCR_LSEON);
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/* Wait for the LSE clock to be ready */
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while ((getreg16(STM32_RCC_BDCR) & RCC_BDCR_LSERDY) == 0)
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{
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stm32_waste();
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}
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/* Select the lower power external 32,768Hz (Low-Speed External, LSE)
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* oscillator as RTC Clock Source and enable the Clock.
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*/
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modifyreg16(STM32_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, RCC_BDCR_RTCSEL_LSE);
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/* Enable RTC and wait for RSF */
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modifyreg16(STM32_RCC_BDCR, 0, RCC_BDCR_RTCEN);
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stm32_rtc_waitlasttask();
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stm32_rtc_wait4rsf();
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stm32_rtc_waitlasttask();
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/* Configure prescaler, note that these are write-only registers */
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stm32_rtc_beginwr();
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putreg16(STM32_RTC_PRESCALAR_VALUE >> 16, STM32_RTC_PRLH);
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putreg16(STM32_RTC_PRESCALAR_VALUE & 0xffff, STM32_RTC_PRLL);
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stm32_rtc_endwr();
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stm32_rtc_wait4rsf();
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stm32_rtc_waitlasttask();
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#ifdef CONFIG_RTC_HIRES
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/* Enable overflow interrupt - alarm interrupt is enabled in
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* stm32_rtc_setalarm.
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