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Fix Kconfig style

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simbit18 2023-12-09 16:35:33 +01:00 committed by Xiang Xiao
parent d6ac9e1aed
commit 3442af4a19
10 changed files with 114 additions and 92 deletions
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2
arch/arm/Kconfig
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@ -1347,7 +1347,7 @@ config ARM_SEMIHOSTING_HOSTFS_CACHE_COHERENCE
---help--- ---help---
Flush & Invalidte cache before & after bkpt instruction. Flush & Invalidte cache before & after bkpt instruction.
endif endif # ARM_SEMIHOSTING_HOSTFS
if SCHED_BACKTRACE if SCHED_BACKTRACE

32
arch/arm/src/at32/Kconfig
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@ -77,13 +77,13 @@ choice
ends with a number or letter that designates the FLASH size. ends with a number or letter that designates the FLASH size.
Designator Size in KiB Designator Size in KiB
8 64 8 64
B 128 B 128
C 256 C 256
E 512 E 512
G 1024 G 1024
I 2048 I 2048
M 4032 M 4032
This configuration option defaults to using the configuration based This configuration option defaults to using the configuration based
on that designator or the default smaller size if there is no last on that designator or the default smaller size if there is no last
@ -6855,7 +6855,7 @@ config AT32_PM_SERIAL_ACTIVITY
PM activity reported to power management logic on every serial PM activity reported to power management logic on every serial
interrupt. interrupt.
endif endif # PM
endmenu # U[S]ART Configuration endmenu # U[S]ART Configuration
@ -7518,7 +7518,7 @@ config AT32_TIM1_QEPSC
This prescaler divides the number of recorded encoder pulses, This prescaler divides the number of recorded encoder pulses,
limiting the count rate at the expense of resolution. limiting the count rate at the expense of resolution.
endif endif # AT32_TIM1_QE
config AT32_TIM2_QE config AT32_TIM2_QE
bool "TIM2 QE" bool "TIM2 QE"
@ -7536,7 +7536,7 @@ config AT32_TIM2_QEPSC
This prescaler divides the number of recorded encoder pulses, This prescaler divides the number of recorded encoder pulses,
limiting the count rate at the expense of resolution. limiting the count rate at the expense of resolution.
endif endif # AT32_TIM2_QE
config AT32_TIM3_QE config AT32_TIM3_QE
bool "TIM3 QE" bool "TIM3 QE"
@ -7554,7 +7554,7 @@ config AT32_TIM3_QEPSC
This prescaler divides the number of recorded encoder pulses, This prescaler divides the number of recorded encoder pulses,
limiting the count rate at the expense of resolution. limiting the count rate at the expense of resolution.
endif endif # AT32_TIM3_QE
config AT32_TIM4_QE config AT32_TIM4_QE
bool "TIM4 QE" bool "TIM4 QE"
@ -7572,7 +7572,7 @@ config AT32_TIM4_QEPSC
This prescaler divides the number of recorded encoder pulses, This prescaler divides the number of recorded encoder pulses,
limiting the count rate at the expense of resolution. limiting the count rate at the expense of resolution.
endif endif # AT32_TIM4_QE
config AT32_TIM5_QE config AT32_TIM5_QE
bool "TIM5 QE" bool "TIM5 QE"
@ -7590,7 +7590,7 @@ config AT32_TIM5_QEPSC
This prescaler divides the number of recorded encoder pulses, This prescaler divides the number of recorded encoder pulses,
limiting the count rate at the expense of resolution. limiting the count rate at the expense of resolution.
endif endif # AT32_TIM5_QE
config AT32_TIM8_QE config AT32_TIM8_QE
bool "TIM8 QE" bool "TIM8 QE"
@ -7608,7 +7608,7 @@ config AT32_TIM8_QEPSC
This prescaler divides the number of recorded encoder pulses, This prescaler divides the number of recorded encoder pulses,
limiting the count rate at the expense of resolution. limiting the count rate at the expense of resolution.
endif endif # AT32_TIM8_QE
config AT32_QENCODER_FILTER config AT32_QENCODER_FILTER
bool "Enable filtering on AT32 QEncoder input" bool "Enable filtering on AT32 QEncoder input"
@ -7640,7 +7640,7 @@ config AT32_QENCODER_SAMPLE_FDTS_16
config AT32_QENCODER_SAMPLE_FDTS_32 config AT32_QENCODER_SAMPLE_FDTS_32
bool "fDTS/32" bool "fDTS/32"
endchoice endchoice # Input channel sampling frequency
choice choice
depends on AT32_QENCODER_FILTER depends on AT32_QENCODER_FILTER
@ -7671,7 +7671,7 @@ config AT32_QENCODER_SAMPLE_EVENT_8
depends on !AT32_QENCODER_SAMPLE_FDTS depends on !AT32_QENCODER_SAMPLE_FDTS
bool "8" bool "8"
endchoice endchoice # Input channel event count
endmenu endmenu

31
arch/arm/src/cxd56xx/Kconfig
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@ -83,7 +83,7 @@ config CXD56_PMIC_INT
---help--- ---help---
Enable PMIC interrupt. Enable PMIC interrupt.
endif endif # CXD56_PMIC
config CXD56_CPUFIFO config CXD56_CPUFIFO
bool bool
@ -125,7 +125,8 @@ config CXD56_FARAPI_VERSION_FAILED_PANIC
default n default n
---help--- ---help---
If the version mismatch is detected, do PANIC() to stop the system. If the version mismatch is detected, do PANIC() to stop the system.
endif
endif # CXD56_FARAPI_VERSION_CHECK
config CXD56_FARAPI_DEBUG config CXD56_FARAPI_DEBUG
bool "Debug Far API" bool "Debug Far API"
@ -290,7 +291,8 @@ config CXD56_CHARGER_TEMP_PRECISE
Get temperature precisely. If this option is enabled, driver calculate precisely Get temperature precisely. If this option is enabled, driver calculate precisely
from register value to degrees Celsius. from register value to degrees Celsius.
This option requires libm. This option requires libm.
endif
endif # CXD56_CHARGER
comment "NuttX style Audio Driver Support" comment "NuttX style Audio Driver Support"
@ -390,7 +392,7 @@ config CXD56_UART0_FLOWCONTROL
---help--- ---help---
Enable CXD56 UART0 RTS flow control Enable CXD56 UART0 RTS flow control
endif endif # CXD56_UART0
config CXD56_UART1 config CXD56_UART1
bool "UART1" bool "UART1"
@ -538,7 +540,8 @@ config CXD56_SPI5_PINMAP_SDIO
bool "SPI5 pin assign to SDIO" bool "SPI5 pin assign to SDIO"
---help--- ---help---
SPI5 assigns to the shared pins with SDIO. SPI5 assigns to the shared pins with SDIO.
endchoice
endchoice # SPI5 pin configuration
config CXD56_DMAC_SPI5_TX config CXD56_DMAC_SPI5_TX
bool "DMAC support for SPI5 TX" bool "DMAC support for SPI5 TX"
@ -1113,7 +1116,8 @@ config CXD56_SCU_XOSC_DIV
int "SCU XOSC predivider" int "SCU XOSC predivider"
default 2 default 2
range 1 4 range 1 4
endif
endif # CXD56_SCU_XOSC
choice choice
prompt "SCU32K clock source" prompt "SCU32K clock source"
@ -1124,7 +1128,8 @@ config CXD56_SCU32K_RCRTC
config CXD56_SCU32K_RTC config CXD56_SCU32K_RTC
bool "RTC" bool "RTC"
endchoice
endchoice # SCU32K clock source
config CXD56_SCU_DEBUG config CXD56_SCU_DEBUG
bool "SCU Debug" bool "SCU Debug"
@ -1151,6 +1156,7 @@ config CXD56_UDMAC
select ARCH_DMA select ARCH_DMA
---help--- ---help---
Use DMAC for reading sensing data from SCU FIFO. Use DMAC for reading sensing data from SCU FIFO.
endif # CXD56_SCU endif # CXD56_SCU
config CXD56_CISIF config CXD56_CISIF
@ -1380,7 +1386,8 @@ config CXD56_GNSS_1PPS_PIN_HIF_IRQ_OUT
bool "Use PIN_HIF_IRQ_OUT" bool "Use PIN_HIF_IRQ_OUT"
---help--- ---help---
GNSS 1PPS output from PIN_HIF_IRQ_OUT pin. GNSS 1PPS output from PIN_HIF_IRQ_OUT pin.
endchoice
endchoice # GNSS 1PPS output
config CXD56_GNSS_DEBUG_FEATURE config CXD56_GNSS_DEBUG_FEATURE
bool "GNSS debug feature" bool "GNSS debug feature"
@ -1398,13 +1405,14 @@ config CXD56_GNSS_DEBUG_INFO
endif # CXD56_GNSS_DEBUG_FEATURE endif # CXD56_GNSS_DEBUG_FEATURE
endmenu endmenu # GNSS settings
config CXD56_GEOFENCE config CXD56_GEOFENCE
bool "Geofence Support" bool "Geofence Support"
default y default y
depends on CXD56_GNSS depends on CXD56_GNSS
endif endif # CXD56_GNSS
config CXD56_TESTSET config CXD56_TESTSET
bool "Use custom testset for spinlock" bool "Use custom testset for spinlock"
@ -1419,7 +1427,7 @@ config CXD56_TESTSET_WITH_HWSEM
bool "Use custom testset based on hardware semaphore" bool "Use custom testset based on hardware semaphore"
default !CXD56_USE_SYSBUS default !CXD56_USE_SYSBUS
endif endif # CXD56_TESTSET
config CXD56_USE_SYSBUS config CXD56_USE_SYSBUS
bool "Use the system bus for the data section" bool "Use the system bus for the data section"
@ -1427,4 +1435,5 @@ config CXD56_USE_SYSBUS
select ARCH_USE_TEXT_HEAP if ELF select ARCH_USE_TEXT_HEAP if ELF
---help--- ---help---
To make ldrex/strex work correctly, this option must be enabled To make ldrex/strex work correctly, this option must be enabled
endmenu endmenu

9
arch/arm/src/efm32/Kconfig
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@ -50,7 +50,7 @@ config ARCH_CHIP_EFM32GG990F1024
This chip is a Giant Gecko with 1024KiB flash and 128KiB RAM in a This chip is a Giant Gecko with 1024KiB flash and 128KiB RAM in a
BGA112 package. BGA112 package.
endchoice endchoice # EFM32 Chip Selection
# These hidden selections represent automatically selected MCU families and, # These hidden selections represent automatically selected MCU families and,
# in turn, select general capabilities of the MCU family # in turn, select general capabilities of the MCU family
@ -250,7 +250,7 @@ config EFM32_DMA_ALTDSEC
---help--- ---help---
Enable support for alternate descriptors. Not fully implemented. Enable support for alternate descriptors. Not fully implemented.
endif endif # EFM32_DMA
choice choice
prompt "USART0 Mode" prompt "USART0 Mode"
@ -419,6 +419,7 @@ config LEUART1_2STOP
endmenu # LEUART1 Configuration endmenu # LEUART1 Configuration
if EFM32_USART_ISSPI if EFM32_USART_ISSPI
menu "SPI Configuration" menu "SPI Configuration"
config EFM32_SPI_DMA config EFM32_SPI_DMA
@ -449,7 +450,9 @@ config EFM32_SPI_DMA_MINSIZE
based transfers. based transfers.
endif # EFM32_SPI_DMA endif # EFM32_SPI_DMA
endmenu # SPI Configuration endmenu # SPI Configuration
endif # EFM32_USART_ISSPI endif # EFM32_USART_ISSPI
menu "USB FS Host Configuration" menu "USB FS Host Configuration"
@ -485,7 +488,7 @@ config EFM32_OTGFS_SOFINTR
---help--- ---help---
Enable SOF interrupts. Why would you ever want to do that? Enable SOF interrupts. Why would you ever want to do that?
endmenu endmenu # USB FS Host Configuration
config EFM32_TIMER0 config EFM32_TIMER0
bool "TIMER0" bool "TIMER0"

15
arch/arm/src/gd32f4/Kconfig
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@ -85,10 +85,10 @@ choice
ends with a number or letter that designates the FLASH size. ends with a number or letter that designates the FLASH size.
Designator Size in KiB Designator Size in KiB
E 512 E 512
G 1024 G 1024
I 2048 I 2048
K 3072 K 3072
This configuration option defaults to using the configuration based This configuration option defaults to using the configuration based
on that designator or the default smaller size if there is no last on that designator or the default smaller size if there is no last
@ -2050,7 +2050,7 @@ config GD32F4_PM_SERIAL_ACTIVITY
PM activity reported to power management logic on every serial PM activity reported to power management logic on every serial
interrupt. interrupt.
endif endif # PM
endmenu # USART Configuration endmenu # USART Configuration
@ -2161,6 +2161,7 @@ config GD32F4_RTC_HXTALCLOCK
The RTC clock source is the HXTAL clock, divided down to 1MHz. The RTC clock source is the HXTAL clock, divided down to 1MHz.
endchoice # RTC clock source endchoice # RTC clock source
endmenu # RTC configuration endmenu # RTC configuration
@ -2196,7 +2197,7 @@ config GD32F4_SDIO_WIDTH_D1_ONLY
---help--- ---help---
Select 1-bit transfer mode. Default: 4-bit transfer mode. Select 1-bit transfer mode. Default: 4-bit transfer mode.
endmenu endmenu # SDIO Configuration
menu "SPI Configuration" menu "SPI Configuration"
depends on GD32F4_SPI depends on GD32F4_SPI
@ -2391,7 +2392,7 @@ config GD32F4_MII_EXTCLK
MII clock is provided by external clock. And not use CKOUT for MII clock is provided by external clock. And not use CKOUT for
MII clock. MII clock.
endchoice endchoice # MII clock configuration
config GD32F4_AUTO_NEGOTIATION config GD32F4_AUTO_NEGOTIATION
bool "Use autonegotiation" bool "Use autonegotiation"

13
arch/arm/src/lc823450/Kconfig
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@ -40,13 +40,16 @@ config LC823450_SPIFI
default n default n
if LC823450_SPIFI if LC823450_SPIFI
config LC823450_SPIFI_QUADIO config LC823450_SPIFI_QUADIO
bool "SPIFI 4bit access" bool "SPIFI 4bit access"
default y default y
config LC823450_SPIFI_BOOT config LC823450_SPIFI_BOOT
bool "Boot from an external SPI flash" bool "Boot from an external SPI flash"
default n default n
endif
endif # LC823450_SPIFI
config LC823450_SDIF config LC823450_SDIF
bool "SD/eMMC driver" bool "SD/eMMC driver"
@ -67,7 +70,7 @@ config LC823450_SDC_DMA
default y default y
select ARCH_DMA select ARCH_DMA
endif endif # LC823450_SPIFI
config LC823450_MTD config LC823450_MTD
bool "LC823450 MTD devices" bool "LC823450 MTD devices"
@ -186,7 +189,7 @@ config LC823450_PWM1_CH1
bool "MTM1-Ch1 PWM device" bool "MTM1-Ch1 PWM device"
default n default n
endif endif # PWM
choice choice
prompt "HS driver current boost" prompt "HS driver current boost"
@ -200,7 +203,7 @@ config LC823450_USBDEV_CUSTOM_HSDSEL_5
config LC823450_USBDEV_CUSTOM_HSDSEL_10 config LC823450_USBDEV_CUSTOM_HSDSEL_10
bool "10% boost" bool "10% boost"
endchoice endchoice # HS driver current boost
config LC823450_LSISTBY config LC823450_LSISTBY
bool "LSI Standby" bool "LSI Standby"
@ -222,4 +225,4 @@ config DVFS
bool "Dynamic Voltage and Frequency Scaling" bool "Dynamic Voltage and Frequency Scaling"
default n default n
endmenu endmenu # LC823450 Peripheral Support

8
arch/arm/src/nrf52/Kconfig
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@ -355,7 +355,7 @@ config NRF52_LFCLK_RC
config NRF52_LFCLK_SYNTH config NRF52_LFCLK_SYNTH
bool "Synthesized from HFCLK" bool "Synthesized from HFCLK"
endchoice endchoice # LFCLK source
endif # NRF52_USE_LFCLK endif # NRF52_USE_LFCLK
@ -397,7 +397,7 @@ config NRF52_SYSTIMER_RTC
---help--- ---help---
Use RTC timer in tickless mode. Use RTC timer in tickless mode.
endchoice endchoice # System Timer Source
if NRF52_SYSTIMER_RTC if NRF52_SYSTIMER_RTC
@ -409,7 +409,7 @@ config NRF52_SYSTIMER_RTC_INSTANCE
---help--- ---help---
Which RTC instance to use to drive the system timer Which RTC instance to use to drive the system timer
endif endif # NRF52_SYSTIMER_RTC
endmenu # System Timer endmenu # System Timer
@ -636,7 +636,7 @@ config NRF52_SAADC_TIMER_CC
default 0 default 0
range 80 2047 range 80 2047
endif #NRF52_SAADC_TIMER endif # NRF52_SAADC_TIMER
config NRF52_SAADC_OVERSAMPLE config NRF52_SAADC_OVERSAMPLE
int "SAADC oversample" int "SAADC oversample"

22
arch/arm/src/stm32/Kconfig
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@ -1216,17 +1216,17 @@ choice
ends with a number or letter that designates the FLASH size. ends with a number or letter that designates the FLASH size.
Designator Size in KiB Designator Size in KiB
4 16 4 16
6 32 6 32
8 64 8 64
B 128 B 128
Z 192 Z 192
C 256 C 256
D 384 D 384
E 512 E 512
F 768 F 768
G 1024 G 1024
I 2048 I 2048
This configuration option defaults to using the configuration based This configuration option defaults to using the configuration based
on that designator or the default smaller size if there is no last on that designator or the default smaller size if there is no last

44
boards/xtensa/esp32s2/common/Kconfig
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@ -22,34 +22,34 @@ choice ESP32S2_SPIFLASH_FS
bring-up. bring-up.
If not selected, the MTD will be registered as a device node on /dev. If not selected, the MTD will be registered as a device node on /dev.
config ESP32S2_SPIFLASH_SMARTFS config ESP32S2_SPIFLASH_SMARTFS
bool "SmartFS" bool "SmartFS"
select FS_SMARTFS select FS_SMARTFS
select MTD_SMART select MTD_SMART
depends on !ESP32S2_SECURE_FLASH_ENC_ENABLED depends on !ESP32S2_SECURE_FLASH_ENC_ENABLED
comment "SmartFS not supported with Flash Encryption" comment "SmartFS not supported with Flash Encryption"
depends on ESP32S2_SECURE_FLASH_ENC_ENABLED depends on ESP32S2_SECURE_FLASH_ENC_ENABLED
config ESP32S2_SPIFLASH_NXFFS config ESP32S2_SPIFLASH_NXFFS
bool "NXFFS" bool "NXFFS"
select FS_NXFFS select FS_NXFFS
depends on !ESP32S2_SECURE_FLASH_ENC_ENABLED depends on !ESP32S2_SECURE_FLASH_ENC_ENABLED
comment "NXFFS not supported with Flash Encryption" comment "NXFFS not supported with Flash Encryption"
depends on ESP32S2_SECURE_FLASH_ENC_ENABLED depends on ESP32S2_SECURE_FLASH_ENC_ENABLED
config ESP32S2_SPIFLASH_SPIFFS config ESP32S2_SPIFLASH_SPIFFS
bool "SPIFFS" bool "SPIFFS"
select FS_SPIFFS select FS_SPIFFS
depends on !ESP32S2_SECURE_FLASH_ENC_ENABLED depends on !ESP32S2_SECURE_FLASH_ENC_ENABLED
comment "SPIFFS not supported with Flash Encryption" comment "SPIFFS not supported with Flash Encryption"
depends on ESP32S2_SECURE_FLASH_ENC_ENABLED depends on ESP32S2_SECURE_FLASH_ENC_ENABLED
config ESP32S2_SPIFLASH_LITTLEFS config ESP32S2_SPIFLASH_LITTLEFS
bool "LittleFS" bool "LittleFS"
select FS_LITTLEFS select FS_LITTLEFS
endchoice endchoice

30
drivers/crypto/Kconfig
View File

@ -73,6 +73,7 @@ config DEV_URANDOM_ARCH
implementation. implementation.
endchoice # /dev/urandom algorithm endchoice # /dev/urandom algorithm
endif # DEV_URANDOM endif # DEV_URANDOM
menuconfig DEV_SE05X menuconfig DEV_SE05X
@ -100,7 +101,7 @@ config DEV_SE05X_SCP03
config DEV_SE05X_PLAIN config DEV_SE05X_PLAIN
bool "plain communication" bool "plain communication"
endchoice endchoice # Channel communication interface
config DEV_SE05X_SCP03_KEY_FILE config DEV_SE05X_SCP03_KEY_FILE
string "SCP03 keys" string "SCP03 keys"
@ -118,16 +119,21 @@ choice SE05X_LOG_LEVEL
---help--- ---help---
The SE05x log is divided into the following levels: ERROR,WARNING,INFO,DEBUG. The SE05x log is divided into the following levels: ERROR,WARNING,INFO,DEBUG.
config SE05X_LOG_NONE config SE05X_LOG_NONE
bool "No output" bool "No output"
config SE05X_LOG_ERROR
bool "Error" config SE05X_LOG_ERROR
config SE05X_LOG_WARNING bool "Error"
bool "Warning"
config SE05X_LOG_INFO config SE05X_LOG_WARNING
bool "Info" bool "Warning"
config SE05X_LOG_DEBUG
bool "Debug" config SE05X_LOG_INFO
endchoice bool "Info"
config SE05X_LOG_DEBUG
bool "Debug"
endchoice # SE05x debug log level
endif #DEV_SE05X endif #DEV_SE05X