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Improved description of CONFIG_ARMV7M_USEBASEPRI from Vijay Kumar

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Gregory Nutt 2014-03-19 07:16:44 -06:00
parent cba9127a86
commit 34467249b5
2 changed files with 9 additions and 5 deletions
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ChangeLog
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@ -7009,4 +7009,6 @@
driver (UDP) for the SAM4E (2014-3-17). driver (UDP) for the SAM4E (2014-3-17).
* Documentation/NuttxPortingGuide.html: Typo fixes from Vijay Kumar * Documentation/NuttxPortingGuide.html: Typo fixes from Vijay Kumar
(2014-3-18). (2014-3-18).
* arch/arm/Kconfig: Improved documentation of the use of the
BASEPRI register from Vijay Kumar (2014-3-19).

12
arch/arm/Kconfig
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@ -248,11 +248,13 @@ config ARMV7M_USEBASEPRI
default n default n
depends on ARCH_CORTEXM3 || ARCH_CORTEXM4 depends on ARCH_CORTEXM3 || ARCH_CORTEXM4
---help--- ---help---
Use the BASEPRI register to enable and disable able interrupts. By Use the BASEPRI register to enable and disable interrupts. By
default, the PRIMASK register is used for this purpose. This default, the PRIMASK register is used for this purpose. This
usually results in hardfaults that are properly handling by the usually results in hardfaults when supervisor calls are made.
RTOS. Using the BASEPRI register will avoid these hardfault. Though, these hardfaults are properly handled by the RTOS, the
That is needed primarily for integration with some toolchains. hardfaults can confuse some debuggers. With the BASEPRI
register, these hardfaults, will be avoided. For more details see
http://www.nuttx.org/doku.php?id=wiki:nxinternal:svcall
config ARCH_HAVE_CMNVECTOR config ARCH_HAVE_CMNVECTOR
bool bool