STM32F107 OTG FS clock presecaler cannot be configurated after the USB clock is enabled

This commit is contained in:
Gregory Nutt 2013-12-26 10:45:21 -06:00
parent f4d13c4acb
commit 345d5b2654
2 changed files with 3 additions and 3 deletions

View File

@ -111,7 +111,7 @@
* USB clock = PLLOUT / 1.5 = 72MHz / 1.5 = 48MHz
*/
#define STM32_CFGR_USBPRE 0
#define STM32_CFGR_OTGFSPRE 0
/* MCO output driven by PLL3. From above, we already have PLL3 input frequency as:
*