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Fix an error introduced into ALL implmentations of interrupt dispatch logic

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This commit is contained in:
Gregory Nutt 2014-08-28 08:41:57 -06:00
parent 8bdde7b2d1
commit 35b11a7533
12 changed files with 12 additions and 13 deletions
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2
arch/arm/src/arm/up_doirq.c
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@ -118,7 +118,7 @@ void up_doirq(int irq, uint32_t *regs)
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(rtcb);
(void)group_addrenv(NULL);
#endif
}
#endif

2
arch/arm/src/armv7-a/arm_doirq.c
View File

@ -118,7 +118,7 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(rtcb);
(void)group_addrenv(NULL);
#endif
}
#endif

2
arch/arm/src/dm320/dm320_decodeirq.c
View File

@ -134,7 +134,7 @@ void up_decodeirq(uint32_t* regs)
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(rtcb);
(void)group_addrenv(NULL);
#endif
}
#endif

2
arch/arm/src/imx/imx_decodeirq.c
View File

@ -141,7 +141,7 @@ void up_decodeirq(uint32_t* regs)
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(rtcb);
(void)group_addrenv(NULL);
#endif
}
#endif

3
arch/arm/src/lpc31xx/lpc31_decodeirq.c
View File

@ -1,6 +1,5 @@
/********************************************************************************
* arch/arm/src/lpc31xx/lpc31_decodeirq.c
* arch/arm/src/chip/lpc31_decodeirq.c
*
* Copyright (C) 2009, 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -142,7 +141,7 @@ void up_decodeirq(uint32_t *regs)
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(rtcb);
(void)group_addrenv(NULL);
#endif
}
#endif

2
arch/avr/src/avr32/up_doirq.c
View File

@ -113,7 +113,7 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(rtcb);
(void)group_addrenv(NULL);
#endif
}
#endif

2
arch/hc/src/common/up_doirq.c
View File

@ -113,7 +113,7 @@ uint8_t *up_doirq(int irq, uint8_t *regs)
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(rtcb);
(void)group_addrenv(NULL);
#endif
}
#endif

2
arch/mips/src/mips32/up_doirq.c
View File

@ -119,7 +119,7 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(rtcb);
(void)group_addrenv(NULL);
#endif
}
#endif

2
arch/mips/src/pic32mx/pic32mx-decodeirq.c
View File

@ -170,7 +170,7 @@ uint32_t *pic32mx_decodeirq(uint32_t *regs)
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(rtcb);
(void)group_addrenv(NULL);
#endif
}
#endif

2
arch/sh/src/common/up_doirq.c
View File

@ -121,7 +121,7 @@ uint32_t *up_doirq(int irq, uint32_t* regs)
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(rtcb);
(void)group_addrenv(NULL);
#endif
}
#endif

2
arch/x86/src/qemu/qemu_handlers.c
View File

@ -125,7 +125,7 @@ static uint32_t *common_handler(int irq, uint32_t *regs)
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(rtcb);
(void)group_addrenv(NULL);
#endif
}
#endif

2
arch/z80/src/common/up_doirq.c
View File

@ -112,7 +112,7 @@ FAR chipreg_t *up_doirq(uint8_t irq, FAR chipreg_t *regs)
* ready-to-run list.
*/
(void)group_addrenv(rtcb);
(void)group_addrenv(NULL);
}
regs = newregs;