Added basic support for nucleo-g431kb board.
This commit is contained in:
Daniel P. Carvalho
Xiang Xiao
parent
7ff6aac43a
commit
361703a881
@ -25,6 +25,403 @@
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* Pre-processor Definitions
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****************************************************************************/
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#error missing pinmap for STM32G4XXK
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/* Alternate Pin Functions. All members of the STM32G4xxxx family share the
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* same pin multiplexing (although they differ in the pins physically
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* available).
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*
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* Alternative pin selections are provided with a numeric suffix like _1, _2,
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* etc. Drivers, however, will use the pin selection without the numeric
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* suffix. Additional definitions are required in the board.h file. For
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* example, if CAN1_RX connects via PA11 on some board, then the following
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* definitions should appear in the board.h header file for that board:
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*
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* #define GPIO_CAN1_RX GPIO_CAN1_RX_1
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*
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* The driver will then automatically configure PA11 as the CAN1 RX pin.
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*/
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/* WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!!
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* Additional effort is required to select specific GPIO options such as
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* frequency, open-drain/push-pull, and pull-up/down! Just the basics are
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* defined for most pins in this file.
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*/
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/* ADC - Analog Digital Converter *******************************************/
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#define GPIO_ADC1_IN1 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN0)
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#define GPIO_ADC1_IN2 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN1)
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#define GPIO_ADC1_IN3 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN2)
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#define GPIO_ADC1_IN4 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN3)
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#define GPIO_ADC1_IN10 (GPIO_ANALOG | GPIO_PORTF | GPIO_PIN0)
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#define GPIO_ADC1_IN15 (GPIO_ANALOG | GPIO_PORTB | GPIO_PIN0)
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#define GPIO_ADC2_IN1 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN0)
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#define GPIO_ADC2_IN2 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN1)
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#define GPIO_ADC2_IN3 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN6)
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#define GPIO_ADC2_IN4 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN7)
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#define GPIO_ADC2_IN10 (GPIO_ANALOG | GPIO_PORTF | GPIO_PIN1)
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#define GPIO_ADC2_IN13 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN5)
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#define GPIO_ADC2_IN17 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN4)
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/* COMP - Comparator ********************************************************/
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#define GPIO_COMP1_OUT_1 (GPIO_ALT | GPIO_AF8 | GPIO_PORTA | GPIO_PIN0)
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#define GPIO_COMP1_OUT_2 (GPIO_ALT | GPIO_AF8 | GPIO_PORTA | GPIO_PIN6)
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#define GPIO_COMP1_OUT_3 (GPIO_ALT | GPIO_AF8 | GPIO_PORTA | GPIO_PIN11)
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#define GPIO_COMP1_OUT_4 (GPIO_ALT | GPIO_AF8 | GPIO_PORTB | GPIO_PIN8)
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#define GPIO_COMP2_OUT_1 (GPIO_ALT | GPIO_AF8 | GPIO_PORTA | GPIO_PIN2)
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#define GPIO_COMP2_OUT_2 (GPIO_ALT | GPIO_AF8 | GPIO_PORTA | GPIO_PIN7)
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#define GPIO_COMP2_OUT_3 (GPIO_ALT | GPIO_AF8 | GPIO_PORTA | GPIO_PIN12)
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#define GPIO_COMP3_OUT (GPIO_ALT | GPIO_AF8 | GPIO_PORTB | GPIO_PIN7)
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#define GPIO_COMP4_OUT (GPIO_ALT | GPIO_AF8 | GPIO_PORTB | GPIO_PIN6)
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/* DAC **********************************************************************/
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#define GPIO_DAC1_OUT1 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN4)
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#define GPIO_DAC1_OUT2 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN5)
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/* Clocks outputs ***********************************************************/
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/* MCU clock output */
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#define GPIO_MCO_1 (GPIO_ALT | GPIO_AF0 | GPIO_PORTA | GPIO_PIN8)
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#define GPIO_MCO_2 (GPIO_ALT | GPIO_AF0 | GPIO_PORTG | GPIO_PIN10)
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/* Event outputs ************************************************************/
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#define GPIO_PA0_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTA | GPIO_PIN0)
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#define GPIO_PA1_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTA | GPIO_PIN1)
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#define GPIO_PA2_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTA | GPIO_PIN2)
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#define GPIO_PA3_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTA | GPIO_PIN3)
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#define GPIO_PA4_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTA | GPIO_PIN4)
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#define GPIO_PA5_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTA | GPIO_PIN5)
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#define GPIO_PA6_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTA | GPIO_PIN6)
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#define GPIO_PA7_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTA | GPIO_PIN7)
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#define GPIO_PA8_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTA | GPIO_PIN8)
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#define GPIO_PA9_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTA | GPIO_PIN9)
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#define GPIO_PA10_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTA | GPIO_PIN10)
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#define GPIO_PA11_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTA | GPIO_PIN11)
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#define GPIO_PA12_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTA | GPIO_PIN12)
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#define GPIO_PA13_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTA | GPIO_PIN13)
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#define GPIO_PA14_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTA | GPIO_PIN14)
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#define GPIO_PA15_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTA | GPIO_PIN15)
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#define GPIO_PB0_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTB | GPIO_PIN0)
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#define GPIO_PB3_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTB | GPIO_PIN3)
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#define GPIO_PB4_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTB | GPIO_PIN4)
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#define GPIO_PB5_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTB | GPIO_PIN5)
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#define GPIO_PB6_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTB | GPIO_PIN6)
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#define GPIO_PB7_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTB | GPIO_PIN7)
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#define GPIO_PB8_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTB | GPIO_PIN8)
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#define GPIO_PF0_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTF | GPIO_PIN0)
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#define GPIO_PF1_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTF | GPIO_PIN1)
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#define GPIO_PG10_EVENTOUT (GPIO_ALT | GPIO_AF15 | GPIO_PORTG | GPIO_PIN10)
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/* FDCAN ********************************************************************/
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#define GPIO_FDCAN1_RX_1 (GPIO_ALT | GPIO_AF9 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN11)
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#define GPIO_FDCAN1_RX_2 (GPIO_ALT | GPIO_AF9 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN8)
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#define GPIO_FDCAN1_TX_1 (GPIO_ALT | GPIO_AF9 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN12)
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#define GPIO_FDCAN2_RX_1 (GPIO_ALT | GPIO_AF9 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN5)
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#define GPIO_FDCAN2_TX_1 (GPIO_ALT | GPIO_AF9 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN6)
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/* I2C **********************************************************************/
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#define GPIO_I2C1_SCL_1 (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_OPENDRAIN | GPIO_PORTA | GPIO_PIN13)
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#define GPIO_I2C1_SCL_2 (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_OPENDRAIN | GPIO_PORTA | GPIO_PIN15)
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#define GPIO_I2C1_SCL_3 (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_OPENDRAIN | GPIO_PORTB | GPIO_PIN8)
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#define GPIO_I2C1_SDA_1 (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_OPENDRAIN | GPIO_PORTA | GPIO_PIN14)
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#define GPIO_I2C1_SDA_2 (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_OPENDRAIN | GPIO_PORTB | GPIO_PIN7)
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#define GPIO_I2C1_SMBA (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN5)
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#define GPIO_I2C2_SCL_1 (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_OPENDRAIN | GPIO_PORTA | GPIO_PIN9)
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#define GPIO_I2C2_SDA_1 (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_OPENDRAIN | GPIO_PORTA | GPIO_PIN8)
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#define GPIO_I2C2_SDA_2 (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_OPENDRAIN | GPIO_PORTF | GPIO_PIN0)
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#define GPIO_I2C2_SMBA_1 (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN10)
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#define GPIO_I2C3_SCL (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_OPENDRAIN | GPIO_PORTA | GPIO_PIN8)
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#define GPIO_I2C3_SDA_1 (GPIO_ALT | GPIO_AF8 | GPIO_SPEED_50MHz | GPIO_OPENDRAIN | GPIO_PORTB | GPIO_PIN5)
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#define GPIO_I2C3_SMBA_1 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN9)
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/* I2S **********************************************************************/
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#define GPIO_I2S_CKIN (GPIO_ALT | GPIO_AF5 | GPIO_PORTA | GPIO_PIN12)
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#define GPIO_I2S2_CK (GPIO_ALT | GPIO_AF5 | GPIO_PORTF | GPIO_PIN1)
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#define GPIO_I2S2_MCK (GPIO_ALT | GPIO_AF5 | GPIO_PORTA | GPIO_PIN8)
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#define GPIO_I2S2_SD (GPIO_ALT | GPIO_AF5 | GPIO_PORTA | GPIO_PIN11)
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#define GPIO_I2S2_WS (GPIO_ALT | GPIO_AF5 | GPIO_PORTF | GPIO_PIN0)
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#define GPIO_I2S3_CK (GPIO_ALT | GPIO_AF6 | GPIO_PORTB | GPIO_PIN3)
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#define GPIO_I2S3_MCK (GPIO_ALT | GPIO_AF5 | GPIO_PORTA | GPIO_PIN9)
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#define GPIO_I2S3_SD (GPIO_ALT | GPIO_AF6 | GPIO_PORTB | GPIO_PIN5)
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#define GPIO_I2S3_WS_1 (GPIO_ALT | GPIO_AF6 | GPIO_PORTA | GPIO_PIN4)
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#define GPIO_I2S3_WS_2 (GPIO_ALT | GPIO_AF6 | GPIO_PORTA | GPIO_PIN15)
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/* IR - Infrared with TIM16 channel 1 and TIM17 channel 1 *******************/
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#define GPIO_IR_OUT (GPIO_ALT | GPIO_AF5 | GPIO_PORTA | GPIO_PIN13)
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/* LPTIM - Low Power Timer **************************************************/
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#define GPIO_LPTIM1_ETR (GPIO_ALT | GPIO_AF11 | GPIO_PORTB | GPIO_PIN6)
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#define GPIO_LPTIM1_IN1 (GPIO_ALT | GPIO_AF11 | GPIO_PORTB | GPIO_PIN5)
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#define GPIO_LPTIM1_IN2 (GPIO_ALT | GPIO_AF11 | GPIO_PORTB | GPIO_PIN7)
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#define GPIO_LPTIM1_OUT_1 (GPIO_ALT | GPIO_AF1 | GPIO_PORTA | GPIO_PIN14)
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/* LPUART - Low-Power Universal Asynchronous Receiver Transmitter ***********/
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#define GPIO_LPUART1_CTS (GPIO_ALT | GPIO_AF12 | GPIO_PORTA | GPIO_PIN6)
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#define GPIO_LPUART1_RX (GPIO_ALT | GPIO_AF12 | GPIO_PORTA | GPIO_PIN3)
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#define GPIO_LPUART1_TX (GPIO_ALT | GPIO_AF12 | GPIO_PORTA | GPIO_PIN2)
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/* JTAG *********************************************************************/
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#define GPIO_JTCK (GPIO_ALT | GPIO_AF0 | GPIO_PORTA | GPIO_PIN14)
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#define GPIO_JTDI (GPIO_ALT | GPIO_AF0 | GPIO_PORTA | GPIO_PIN15)
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#define GPIO_JTDO (GPIO_ALT | GPIO_AF0 | GPIO_PORTB | GPIO_PIN3)
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#define GPIO_JTMS (GPIO_ALT | GPIO_AF0 | GPIO_PORTA | GPIO_PIN13)
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#define GPIO_NJTRST (GPIO_ALT | GPIO_AF0 | GPIO_PORTB | GPIO_PIN4)
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#define GPIO_SWCLK (GPIO_ALT | GPIO_AF0 | GPIO_PORTA | GPIO_PIN14)
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#define GPIO_SWDIO (GPIO_ALT | GPIO_AF0 | GPIO_PORTA | GPIO_PIN13)
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/* OPAMP ********************************************************************/
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#define GPIO_OPAMP1_VINM (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN3)
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#define GPIO_OPAMP1_VINP_1 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN1)
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#define GPIO_OPAMP1_VINP_2 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN3)
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#define GPIO_OPAMP1_VINP_3 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN7)
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#define GPIO_OPAMP1_VOUT (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN2)
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#define GPIO_OPAMP2_VINM (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN5)
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#define GPIO_OPAMP2_VINP_1 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN7)
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#define GPIO_OPAMP2_VINP_2 (GPIO_ANALOG | GPIO_PORTB | GPIO_PIN0)
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#define GPIO_OPAMP2_VOUT (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN6)
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#define GPIO_OPAMP3_VINP_1 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN1)
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#define GPIO_OPAMP3_VINP_2 (GPIO_ANALOG | GPIO_PORTB | GPIO_PIN0)
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#define GPIO_OPAMP6_VINM_1 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN1)
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/* QUADSPI ******************************************************************/
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#define GPIO_QUADSPI1_BK1_IO1 (GPIO_ALT | GPIO_AF10 | GPIO_PORTB | GPIO_PIN0)
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#define GPIO_QUADSPI1_BK1_IO2 (GPIO_ALT | GPIO_AF10 | GPIO_PORTA | GPIO_PIN7)
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#define GPIO_QUADSPI1_BK1_IO3 (GPIO_ALT | GPIO_AF10 | GPIO_PORTA | GPIO_PIN6)
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#define GPIO_QUADSPI1_BK1_NCS_1 (GPIO_ALT | GPIO_AF10 | GPIO_PORTA | GPIO_PIN2)
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#define GPIO_QUADSPI1_CLK_1 (GPIO_ALT | GPIO_AF10 | GPIO_PORTA | GPIO_PIN3)
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/* RTC **********************************************************************/
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#define GPIO_RTC_REFIN (GPIO_ALT | GPIO_AF0 | GPIO_PORTA | GPIO_PIN1)
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/* SAI - Serial Audio Interface *********************************************/
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#define GPIO_SAI1_CK1_1 (GPIO_ALT | GPIO_AF3 | GPIO_PORTA | GPIO_PIN3)
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#define GPIO_SAI1_CK1_2 (GPIO_ALT | GPIO_AF3 | GPIO_PORTB | GPIO_PIN8)
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#define GPIO_SAI1_CK2 (GPIO_ALT | GPIO_AF12 | GPIO_PORTA | GPIO_PIN8)
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#define GPIO_SAI1_D1 (GPIO_ALT | GPIO_AF12 | GPIO_PORTA | GPIO_PIN10)
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#define GPIO_SAI1_FS_A_1 (GPIO_ALT | GPIO_AF14 | GPIO_PORTA | GPIO_PIN9)
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#define GPIO_SAI1_FS_B_1 (GPIO_ALT | GPIO_AF13 | GPIO_PORTA | GPIO_PIN4)
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#define GPIO_SAI1_FS_B_2 (GPIO_ALT | GPIO_AF13 | GPIO_PORTA | GPIO_PIN14)
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#define GPIO_SAI1_FS_B_3 (GPIO_ALT | GPIO_AF14 | GPIO_PORTB | GPIO_PIN6)
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#define GPIO_SAI1_MCLK_A_1 (GPIO_ALT | GPIO_AF13 | GPIO_PORTA | GPIO_PIN3)
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#define GPIO_SAI1_MCLK_A_2 (GPIO_ALT | GPIO_AF14 | GPIO_PORTB | GPIO_PIN8)
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#define GPIO_SAI1_MCLK_B (GPIO_ALT | GPIO_AF14 | GPIO_PORTB | GPIO_PIN4)
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#define GPIO_SAI1_SCK_A_1 (GPIO_ALT | GPIO_AF14 | GPIO_PORTA | GPIO_PIN8)
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#define GPIO_SAI1_SCK_B (GPIO_ALT | GPIO_AF14 | GPIO_PORTB | GPIO_PIN3)
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#define GPIO_SAI1_SD_A (GPIO_ALT | GPIO_AF14 | GPIO_PORTA | GPIO_PIN10)
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#define GPIO_SAI1_SD_B_1 (GPIO_ALT | GPIO_AF13 | GPIO_PORTA | GPIO_PIN13)
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#define GPIO_SAI1_SD_B_2 (GPIO_ALT | GPIO_AF12 | GPIO_PORTB | GPIO_PIN5)
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/* SPI - Serial Peripheral Interface ****************************************/
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#define GPIO_SPI1_MISO_1 (GPIO_ALT | GPIO_AF5 | GPIO_SPEED_50MHz | GPIO_PORTA | GPIO_PIN6)
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#define GPIO_SPI1_MISO_2 (GPIO_ALT | GPIO_AF5 | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN4)
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#define GPIO_SPI1_MOSI_1 (GPIO_ALT | GPIO_AF5 | GPIO_SPEED_50MHz | GPIO_PORTA | GPIO_PIN7)
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#define GPIO_SPI1_MOSI_2 (GPIO_ALT | GPIO_AF5 | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN5)
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#define GPIO_SPI1_NSS_1 (GPIO_ALT | GPIO_AF5 | GPIO_SPEED_50MHz | GPIO_PORTA | GPIO_PIN4)
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#define GPIO_SPI1_NSS_2 (GPIO_ALT | GPIO_AF5 | GPIO_SPEED_50MHz | GPIO_PORTA | GPIO_PIN15)
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#define GPIO_SPI1_SCK_1 (GPIO_ALT | GPIO_AF5 | GPIO_SPEED_50MHz | GPIO_PORTA | GPIO_PIN5)
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#define GPIO_SPI1_SCK_2 (GPIO_ALT | GPIO_AF5 | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN3)
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#define GPIO_SPI2_MISO (GPIO_ALT | GPIO_AF5 | GPIO_SPEED_50MHz | GPIO_PORTA | GPIO_PIN10)
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#define GPIO_SPI2_MOSI (GPIO_ALT | GPIO_AF5 | GPIO_SPEED_50MHz | GPIO_PORTA | GPIO_PIN11)
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#define GPIO_SPI2_NSS (GPIO_ALT | GPIO_AF5 | GPIO_SPEED_50MHz | GPIO_PORTF | GPIO_PIN0)
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#define GPIO_SPI2_SCK (GPIO_ALT | GPIO_AF5 | GPIO_SPEED_50MHz | GPIO_PORTF | GPIO_PIN1)
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#define GPIO_SPI3_MISO (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN4)
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#define GPIO_SPI3_MOSI (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN5)
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#define GPIO_SPI3_NSS_1 (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PORTA | GPIO_PIN4)
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#define GPIO_SPI3_NSS_2 (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PORTA | GPIO_PIN15)
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#define GPIO_SPI3_SCK (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PORTB | GPIO_PIN3)
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/* TIM - Timers *************************************************************/
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#define GPIO_TIM1_BKIN2 (GPIO_ALT | GPIO_AF12 | GPIO_PORTA | GPIO_PIN11)
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#define GPIO_TIM1_BKIN_1 (GPIO_ALT | GPIO_AF6 | GPIO_PORTA | GPIO_PIN6)
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#define GPIO_TIM1_BKIN_2 (GPIO_ALT | GPIO_AF6 | GPIO_PORTA | GPIO_PIN14)
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#define GPIO_TIM1_BKIN_3 (GPIO_ALT | GPIO_AF9 | GPIO_PORTA | GPIO_PIN15)
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#define GPIO_TIM1_BKIN_4 (GPIO_ALT | GPIO_AF12 | GPIO_PORTB | GPIO_PIN8)
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#define GPIO_TIM1_CH1IN (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN8)
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#define GPIO_TIM1_CH1NIN_1 (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN7)
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#define GPIO_TIM1_CH1NIN_2 (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN11)
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#define GPIO_TIM1_CH1NOUT_1 (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN7)
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#define GPIO_TIM1_CH1NOUT_2 (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN11)
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#define GPIO_TIM1_CH1OUT (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN8)
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#define GPIO_TIM1_CH2IN (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN9)
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#define GPIO_TIM1_CH2NIN_1 (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN12)
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#define GPIO_TIM1_CH2NIN_2 (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN0)
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#define GPIO_TIM1_CH2NOUT_1 (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN12)
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#define GPIO_TIM1_CH2NOUT_2 (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN0)
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#define GPIO_TIM1_CH2OUT (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN9)
|
||||
#define GPIO_TIM1_CH3IN (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN10)
|
||||
#define GPIO_TIM1_CH3NIN_1 (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN1)
|
||||
#define GPIO_TIM1_CH3NOUT_1 (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN1)
|
||||
#define GPIO_TIM1_CH3OUT (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN10)
|
||||
#define GPIO_TIM1_CH4IN (GPIO_ALT | GPIO_AF11 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN11)
|
||||
#define GPIO_TIM1_CH4OUT (GPIO_ALT | GPIO_AF11 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN11)
|
||||
#define GPIO_TIM1_ETR (GPIO_ALT | GPIO_AF11 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN12)
|
||||
|
||||
#define GPIO_TIM2_CH1IN_1 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN0)
|
||||
#define GPIO_TIM2_CH1IN_2 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN5)
|
||||
#define GPIO_TIM2_CH1IN_3 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN15)
|
||||
#define GPIO_TIM2_CH1OUT_1 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN0)
|
||||
#define GPIO_TIM2_CH1OUT_2 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN5)
|
||||
#define GPIO_TIM2_CH1OUT_3 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN15)
|
||||
#define GPIO_TIM2_CH2IN_1 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN1)
|
||||
#define GPIO_TIM2_CH2IN_2 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN3)
|
||||
#define GPIO_TIM2_CH2OUT_1 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN1)
|
||||
#define GPIO_TIM2_CH2OUT_2 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN3)
|
||||
#define GPIO_TIM2_CH3IN_1 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN2)
|
||||
#define GPIO_TIM2_CH3IN_2 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN9)
|
||||
#define GPIO_TIM2_CH3OUT_1 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN2)
|
||||
#define GPIO_TIM2_CH3OUT_2 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN9)
|
||||
#define GPIO_TIM2_CH4IN_1 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN3)
|
||||
#define GPIO_TIM2_CH4IN_2 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN10)
|
||||
#define GPIO_TIM2_CH4OUT_1 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN3)
|
||||
#define GPIO_TIM2_CH4OUT_2 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN10)
|
||||
#define GPIO_TIM2_ETR_1 (GPIO_ALT | GPIO_AF14 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN0)
|
||||
#define GPIO_TIM2_ETR_2 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN5)
|
||||
#define GPIO_TIM2_ETR_3 (GPIO_ALT | GPIO_AF14 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN15)
|
||||
|
||||
#define GPIO_TIM3_CH1IN_1 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN6)
|
||||
#define GPIO_TIM3_CH1IN_2 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN4)
|
||||
#define GPIO_TIM3_CH1OUT_1 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN6)
|
||||
#define GPIO_TIM3_CH1OUT_2 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN4)
|
||||
#define GPIO_TIM3_CH2IN_1 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN4)
|
||||
#define GPIO_TIM3_CH2IN_2 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN7)
|
||||
#define GPIO_TIM3_CH2IN_3 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN5)
|
||||
#define GPIO_TIM3_CH2OUT_1 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN4)
|
||||
#define GPIO_TIM3_CH2OUT_2 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN7)
|
||||
#define GPIO_TIM3_CH2OUT_3 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN5)
|
||||
#define GPIO_TIM3_CH3IN (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN0)
|
||||
#define GPIO_TIM3_CH3OUT (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN0)
|
||||
#define GPIO_TIM3_CH4IN_2 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN7)
|
||||
#define GPIO_TIM3_CH4OUT_2 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN7)
|
||||
#define GPIO_TIM3_ETR (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN3)
|
||||
|
||||
#define GPIO_TIM4_CH1IN_1 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN11)
|
||||
#define GPIO_TIM4_CH1IN_2 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN6)
|
||||
#define GPIO_TIM4_CH1OUT_1 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN11)
|
||||
#define GPIO_TIM4_CH1OUT_2 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN6)
|
||||
#define GPIO_TIM4_CH2IN_1 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN12)
|
||||
#define GPIO_TIM4_CH2IN_2 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN7)
|
||||
#define GPIO_TIM4_CH2OUT_1 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN12)
|
||||
#define GPIO_TIM4_CH2OUT_2 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN7)
|
||||
#define GPIO_TIM4_CH3IN_1 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN13)
|
||||
#define GPIO_TIM4_CH3IN_2 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN8)
|
||||
#define GPIO_TIM4_CH3OUT_1 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN13)
|
||||
#define GPIO_TIM4_CH3OUT_2 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN8)
|
||||
#define GPIO_TIM4_ETR_1 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN8)
|
||||
#define GPIO_TIM4_ETR_2 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN3)
|
||||
|
||||
#define GPIO_TIM8_BKIN2 (GPIO_ALT | GPIO_AF10 | GPIO_PORTB | GPIO_PIN6)
|
||||
#define GPIO_TIM8_BKIN_1 (GPIO_ALT | GPIO_AF9 | GPIO_PORTA | GPIO_PIN0)
|
||||
#define GPIO_TIM8_BKIN_2 (GPIO_ALT | GPIO_AF4 | GPIO_PORTA | GPIO_PIN6)
|
||||
#define GPIO_TIM8_BKIN_3 (GPIO_ALT | GPIO_AF11 | GPIO_PORTA | GPIO_PIN10)
|
||||
#define GPIO_TIM8_BKIN_4 (GPIO_ALT | GPIO_AF5 | GPIO_PORTB | GPIO_PIN7)
|
||||
#define GPIO_TIM8_CH1IN_1 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN15)
|
||||
#define GPIO_TIM8_CH1IN_2 (GPIO_ALT | GPIO_AF5 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN6)
|
||||
#define GPIO_TIM8_CH1NIN_1 (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN7)
|
||||
#define GPIO_TIM8_CH1NIN_2 (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN3)
|
||||
#define GPIO_TIM8_CH1NOUT_1 (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN7)
|
||||
#define GPIO_TIM8_CH1NOUT_2 (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN3)
|
||||
#define GPIO_TIM8_CH1OUT_1 (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN15)
|
||||
#define GPIO_TIM8_CH1OUT_2 (GPIO_ALT | GPIO_AF5 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN6)
|
||||
#define GPIO_TIM8_CH2IN_1 (GPIO_ALT | GPIO_AF5 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN14)
|
||||
#define GPIO_TIM8_CH2IN_2 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN8)
|
||||
#define GPIO_TIM8_CH2NIN_1 (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN0)
|
||||
#define GPIO_TIM8_CH2NIN_2 (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN4)
|
||||
#define GPIO_TIM8_CH2NOUT_1 (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN0)
|
||||
#define GPIO_TIM8_CH2NOUT_2 (GPIO_ALT | GPIO_AF4 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN4)
|
||||
#define GPIO_TIM8_CH2OUT_1 (GPIO_ALT | GPIO_AF5 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN14)
|
||||
#define GPIO_TIM8_CH2OUT_2 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN8)
|
||||
#define GPIO_TIM8_CH3NIN_2 (GPIO_ALT | GPIO_AF3 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN5)
|
||||
#define GPIO_TIM8_CH3NOUT_2 (GPIO_ALT | GPIO_AF3 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN5)
|
||||
#define GPIO_TIM8_ETR_1 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN0)
|
||||
#define GPIO_TIM8_ETR_2 (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN6)
|
||||
|
||||
#define GPIO_TIM15_BKIN (GPIO_ALT | GPIO_AF9 | GPIO_PORTA | GPIO_PIN9)
|
||||
#define GPIO_TIM15_CH1IN_1 (GPIO_ALT | GPIO_AF9 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN2)
|
||||
#define GPIO_TIM15_CH1NIN_1 (GPIO_ALT | GPIO_AF9 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN1)
|
||||
#define GPIO_TIM15_CH1NOUT_1 (GPIO_ALT | GPIO_AF9 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN1)
|
||||
#define GPIO_TIM15_CH1OUT_1 (GPIO_ALT | GPIO_AF9 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN2)
|
||||
#define GPIO_TIM15_CH2IN_1 (GPIO_ALT | GPIO_AF9 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN3)
|
||||
#define GPIO_TIM15_CH2OUT_1 (GPIO_ALT | GPIO_AF9 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN3)
|
||||
|
||||
#define GPIO_TIM16_BKIN (GPIO_ALT | GPIO_AF1 | GPIO_PORTB | GPIO_PIN5)
|
||||
#define GPIO_TIM16_CH1IN_1 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN6)
|
||||
#define GPIO_TIM16_CH1IN_2 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN12)
|
||||
#define GPIO_TIM16_CH1IN_3 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN4)
|
||||
#define GPIO_TIM16_CH1IN_4 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN8)
|
||||
#define GPIO_TIM16_CH1NIN_1 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN13)
|
||||
#define GPIO_TIM16_CH1NIN_2 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN6)
|
||||
#define GPIO_TIM16_CH1NOUT_1 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN13)
|
||||
#define GPIO_TIM16_CH1NOUT_2 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN6)
|
||||
#define GPIO_TIM16_CH1OUT_1 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN6)
|
||||
#define GPIO_TIM16_CH1OUT_2 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN12)
|
||||
#define GPIO_TIM16_CH1OUT_3 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN4)
|
||||
#define GPIO_TIM16_CH1OUT_4 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN8)
|
||||
|
||||
#define GPIO_TIM17_BKIN_1 (GPIO_ALT | GPIO_AF1 | GPIO_PORTA | GPIO_PIN10)
|
||||
#define GPIO_TIM17_BKIN_2 (GPIO_ALT | GPIO_AF10 | GPIO_PORTB | GPIO_PIN4)
|
||||
#define GPIO_TIM17_CH1IN_1 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN7)
|
||||
#define GPIO_TIM17_CH1IN_2 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN5)
|
||||
#define GPIO_TIM17_CH1NIN (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN7)
|
||||
#define GPIO_TIM17_CH1NOUT (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN7)
|
||||
#define GPIO_TIM17_CH1OUT_1 (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN7)
|
||||
#define GPIO_TIM17_CH1OUT_2 (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN5)
|
||||
|
||||
/* UARTs/USARTs *************************************************************/
|
||||
|
||||
#define GPIO_USART1_CK (GPIO_ALT | GPIO_AF7 | GPIO_PORTA | GPIO_PIN8)
|
||||
#define GPIO_USART1_CTS (GPIO_ALT | GPIO_AF7 | GPIO_PORTA | GPIO_PIN11)
|
||||
#define GPIO_USART1_DE (GPIO_ALT | GPIO_AF7 | GPIO_PORTA | GPIO_PIN12)
|
||||
#define GPIO_USART1_NSS (GPIO_ALT | GPIO_AF7 | GPIO_PORTA | GPIO_PIN11)
|
||||
#define GPIO_USART1_RTS (GPIO_ALT | GPIO_AF7 | GPIO_PORTA | GPIO_PIN12)
|
||||
#define GPIO_USART1_RX_1 (GPIO_ALT | GPIO_AF7 | GPIO_PORTA | GPIO_PIN10)
|
||||
#define GPIO_USART1_RX_2 (GPIO_ALT | GPIO_AF7 | GPIO_PORTB | GPIO_PIN7)
|
||||
#define GPIO_USART1_TX_1 (GPIO_ALT | GPIO_AF7 | GPIO_PORTA | GPIO_PIN9)
|
||||
#define GPIO_USART1_TX_2 (GPIO_ALT | GPIO_AF7 | GPIO_PORTB | GPIO_PIN6)
|
||||
|
||||
#define GPIO_USART2_CK_1 (GPIO_ALT | GPIO_AF7 | GPIO_PORTA | GPIO_PIN4)
|
||||
#define GPIO_USART2_CK_2 (GPIO_ALT | GPIO_AF7 | GPIO_PORTB | GPIO_PIN5)
|
||||
#define GPIO_USART2_CTS (GPIO_ALT | GPIO_AF7 | GPIO_PORTA | GPIO_PIN0)
|
||||
#define GPIO_USART2_DE (GPIO_ALT | GPIO_AF7 | GPIO_PORTA | GPIO_PIN1)
|
||||
#define GPIO_USART2_NSS (GPIO_ALT | GPIO_AF7 | GPIO_PORTA | GPIO_PIN0)
|
||||
#define GPIO_USART2_RTS (GPIO_ALT | GPIO_AF7 | GPIO_PORTA | GPIO_PIN1)
|
||||
#define GPIO_USART2_RX_1 (GPIO_ALT | GPIO_AF7 | GPIO_PORTA | GPIO_PIN3)
|
||||
#define GPIO_USART2_RX_2 (GPIO_ALT | GPIO_AF7 | GPIO_PORTA | GPIO_PIN15)
|
||||
#define GPIO_USART2_RX_3 (GPIO_ALT | GPIO_AF7 | GPIO_PORTB | GPIO_PIN4)
|
||||
#define GPIO_USART2_TX_1 (GPIO_ALT | GPIO_AF7 | GPIO_PORTA | GPIO_PIN2)
|
||||
#define GPIO_USART2_TX_2 (GPIO_ALT | GPIO_AF7 | GPIO_PORTA | GPIO_PIN14)
|
||||
#define GPIO_USART2_TX_3 (GPIO_ALT | GPIO_AF7 | GPIO_PORTB | GPIO_PIN3)
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXK_PINMAP_H */
|
||||
|
||||
@ -1877,6 +1877,13 @@ config ARCH_BOARD_B_G431B_ESC1
|
||||
ST Micro B-G431B-ESC1 Discovery Kit, based on the STM32G431CB
|
||||
MCU, a Cortex-M4 with FPU, 170 MHz, 32 KB SRAM, 128 KB code.
|
||||
|
||||
config ARCH_BOARD_NUCLEO_G431KB
|
||||
bool "STM32G431KB Nucleo G431KB"
|
||||
depends on ARCH_CHIP_STM32G431K
|
||||
select ARCH_HAVE_LEDS
|
||||
---help---
|
||||
STMicro Nucleo-G431KB board based on the STMicro STM32G431KB MCU.
|
||||
|
||||
config ARCH_BOARD_NUCLEO_G431RB
|
||||
bool "STM32G431RB Nucleo G431RB"
|
||||
depends on ARCH_CHIP_STM32G431R
|
||||
@ -2481,6 +2488,7 @@ config ARCH_BOARD
|
||||
default "stm32f746-ws" if ARCH_BOARD_STM32F746_WS
|
||||
default "b-g474e-dpow1" if ARCH_BOARD_B_G474E_DPOW1
|
||||
default "b-g431b-esc1" if ARCH_BOARD_B_G431B_ESC1
|
||||
default "nucleo-g431kb" if ARCH_BOARD_NUCLEO_G431KB
|
||||
default "nucleo-g431rb" if ARCH_BOARD_NUCLEO_G431RB
|
||||
default "b-l072z-lrwan1" if ARCH_BOARD_B_L072Z_LRWAN1
|
||||
default "b-l475e-iot01a" if ARCH_BOARD_B_L475E_IOT01A
|
||||
@ -2826,6 +2834,9 @@ endif
|
||||
if ARCH_BOARD_B_G431B_ESC1
|
||||
source "boards/arm/stm32/b-g431b-esc1/Kconfig"
|
||||
endif
|
||||
if ARCH_BOARD_NUCLEO_G431KB
|
||||
source "boards/arm/stm32/nucleo-g431kb/Kconfig"
|
||||
endif
|
||||
if ARCH_BOARD_NUCLEO_G431RB
|
||||
source "boards/arm/stm32/nucleo-g431rb/Kconfig"
|
||||
endif
|
||||
|
||||
@ -186,6 +186,9 @@ boards/arm/stm32/b-g474e-dpow1
|
||||
Initial support for booting NuttX to a functional NSH prompt on the
|
||||
STMicro B-G474E-DPOW1 Discovery kit with STM32G474RE MCU.
|
||||
|
||||
boards/arm/stm32/nucleo-g431kb
|
||||
STMicro Nucleo G431KB board based on the STMicro STM32G431KB MCU.
|
||||
|
||||
boards/arm/stm32/nucleo-g431rb
|
||||
STMicro Nucleo G431RB board based on the STMicro STM32G431RB MCU.
|
||||
|
||||
|
||||
8
boards/arm/stm32/nucleo-g431kb/Kconfig
Executable file
8
boards/arm/stm32/nucleo-g431kb/Kconfig
Executable file
@ -0,0 +1,8 @@
|
||||
#
|
||||
# For a description of the syntax of this configuration file,
|
||||
# see the file kconfig-language.txt in the NuttX tools repository.
|
||||
#
|
||||
|
||||
if ARCH_BOARD_NUCLEO_G431KB
|
||||
|
||||
endif # ARCH_BOARD_NUCLEO_G431KB
|
||||
13
boards/arm/stm32/nucleo-g431kb/README.txt
Executable file
13
boards/arm/stm32/nucleo-g431kb/README.txt
Executable file
@ -0,0 +1,13 @@
|
||||
README
|
||||
======
|
||||
|
||||
The Nucleo-G431KB is a member of the Nucleo-32 board family. The Nucleo-32
|
||||
is a standard board for use with several STM32 parts in the UFQFPN32 package.
|
||||
|
||||
STATUS
|
||||
======
|
||||
|
||||
2021-06-11: The basic NSH configuration is now functional.
|
||||
|
||||
Configurations
|
||||
==============
|
||||
49
boards/arm/stm32/nucleo-g431kb/configs/nsh/defconfig
Normal file
49
boards/arm/stm32/nucleo-g431kb/configs/nsh/defconfig
Normal file
@ -0,0 +1,49 @@
|
||||
#
|
||||
# This file is autogenerated: PLEASE DO NOT EDIT IT.
|
||||
#
|
||||
# You can use "make menuconfig" to make any modifications to the installed .config file.
|
||||
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
|
||||
# modifications.
|
||||
#
|
||||
# CONFIG_ARCH_FPU is not set
|
||||
# CONFIG_NSH_ARGCAT is not set
|
||||
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
|
||||
# CONFIG_NSH_CMDPARMS is not set
|
||||
# CONFIG_NSH_DISABLE_IFCONFIG is not set
|
||||
# CONFIG_NSH_DISABLE_PS is not set
|
||||
CONFIG_ARCH="arm"
|
||||
CONFIG_ARCH_BOARD="nucleo-g431kb"
|
||||
CONFIG_ARCH_BOARD_NUCLEO_G431KB=y
|
||||
CONFIG_ARCH_CHIP="stm32"
|
||||
CONFIG_ARCH_CHIP_STM32=y
|
||||
CONFIG_ARCH_CHIP_STM32G431K=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=2048
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=8499
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_HAVE_CXX=y
|
||||
CONFIG_HAVE_CXXINITIALIZE=y
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
CONFIG_MAX_TASKS=16
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_FILEIOSIZE=512
|
||||
CONFIG_NSH_LINELEN=64
|
||||
CONFIG_NSH_READLINE=y
|
||||
CONFIG_PREALLOC_TIMERS=4
|
||||
CONFIG_RAM_SIZE=22528
|
||||
CONFIG_RAM_START=0x20000000
|
||||
CONFIG_RAW_BINARY=y
|
||||
CONFIG_RR_INTERVAL=200
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_SDCLONE_DISABLE=y
|
||||
CONFIG_START_DAY=14
|
||||
CONFIG_START_MONTH=10
|
||||
CONFIG_START_YEAR=2014
|
||||
CONFIG_STM32_JTAG_SW_ENABLE=y
|
||||
CONFIG_STM32_USART2=y
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_TASK_NAME_SIZE=0
|
||||
CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_TESTING_OSTEST_STACKSIZE=1024
|
||||
CONFIG_USART2_SERIAL_CONSOLE=y
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
244
boards/arm/stm32/nucleo-g431kb/include/board.h
Executable file
244
boards/arm/stm32/nucleo-g431kb/include/board.h
Executable file
@ -0,0 +1,244 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32/nucleo-g431kb/include/board.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __BOARDS_ARM_STM32_NUCLEO_G431KB_INCLUDE_BOARD_H
|
||||
#define __BOARDS_ARM_STM32_NUCLEO_G431KB_INCLUDE_BOARD_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Clocking *****************************************************************/
|
||||
|
||||
/* The Nucleo-G431KB supports four ways to configure high-speed clock
|
||||
*
|
||||
* - HSI configuration (default): 16 MHz high-speed internal RC oscillator.
|
||||
* - HSE bypass configuration (from ST-LINK): The input clock is the
|
||||
* ST-LINK MCO output. The frequency is fixed to 25 MHz, and connected
|
||||
* to the PF0-OSC_IN of the STM32G4 microcontroller.
|
||||
* - HSE bypass configuration (from ARDUINO D7): The clock is coming from
|
||||
* an external oscillator through the pin PF0 (ARDUINO D7 pin 10 of the
|
||||
* CN4 connector).
|
||||
* - HSE oscillator configuration: The clock is provided by an external
|
||||
* 24MHz crystal (X2) available in the PCB.
|
||||
*/
|
||||
|
||||
#define STM32_BOARD_XTAL 24000000ul /* 24MHz */
|
||||
|
||||
#define STM32_HSI_FREQUENCY 16000000ul /* 16MHz */
|
||||
#define STM32_LSI_FREQUENCY 32000 /* 32kHz */
|
||||
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
|
||||
#undef STM32_LSE_FREQUENCY /* Not available on this board */
|
||||
|
||||
/* Main PLL Configuration.
|
||||
*
|
||||
* PLL source is HSI = 16MHz
|
||||
* PLLN = 85, PLLM = 4, PLLP = 10, PLLQ = 2, PLLR = 2
|
||||
*
|
||||
* f(VCO Clock) = f(PLL Clock Input) x (PLLN / PLLM)
|
||||
* f(PLL_P) = f(VCO Clock) / PLLP
|
||||
* f(PLL_Q) = f(VCO Clock) / PLLQ
|
||||
* f(PLL_R) = f(VCO Clock) / PLLR
|
||||
*
|
||||
* Where:
|
||||
* 8 <= PLLN <= 127
|
||||
* 1 <= PLLM <= 16
|
||||
* PLLP = 2 through 31
|
||||
* PLLQ = 2, 4, 6, or 8
|
||||
* PLLR = 2, 4, 6, or 8
|
||||
*
|
||||
* Do not exceed 170MHz on f(PLL_P), f(PLL_Q), or f(PLL_R).
|
||||
* 64MHz <= f(VCO Clock) <= 344MHz.
|
||||
*
|
||||
* Given the above:
|
||||
*
|
||||
* f(VCO Clock) = HSI x PLLN / PLLM
|
||||
* = 16MHz x 85 / 4
|
||||
* = 340MHz
|
||||
*
|
||||
* PLLPCLK = f(VCO Clock) / PLLP
|
||||
* = 340MHz / 10
|
||||
* = 34MHz
|
||||
* (May be used for ADC)
|
||||
*
|
||||
* PLLQCLK = f(VCO Clock) / PLLQ
|
||||
* = 340MHz / 2
|
||||
* = 170MHz
|
||||
* (May be used for QUADSPI, FDCAN, SAI1, I2S3. If set to
|
||||
* 48MHz, may be used for USB, RNG.)
|
||||
*
|
||||
* PLLRCLK = f(VCO Clock) / PLLR
|
||||
* = 340MHz / 2
|
||||
* = 170MHz
|
||||
* (May be used for SYSCLK and most peripherals.)
|
||||
*/
|
||||
|
||||
#define STM32_PLLCFGR_PLLSRC RCC_PLLCFGR_PLLSRC_HSI
|
||||
#define STM32_PLLCFGR_PLLCFG (RCC_PLLCFGR_PLLPEN | \
|
||||
RCC_PLLCFGR_PLLQEN | \
|
||||
RCC_PLLCFGR_PLLREN)
|
||||
|
||||
#define STM32_PLLCFGR_PLLN RCC_PLLCFGR_PLLN(85)
|
||||
#define STM32_PLLCFGR_PLLM RCC_PLLCFGR_PLLM(4)
|
||||
#define STM32_PLLCFGR_PLLP RCC_PLLCFGR_PLLPDIV(10)
|
||||
#define STM32_PLLCFGR_PLLQ RCC_PLLCFGR_PLLQ_2
|
||||
#define STM32_PLLCFGR_PLLR RCC_PLLCFGR_PLLR_2
|
||||
|
||||
#define STM32_VCO_FREQUENCY ((STM32_HSI_FREQUENCY / 4) * 85)
|
||||
#define STM32_PLLP_FREQUENCY (STM32_VCO_FREQUENCY / 10)
|
||||
#define STM32_PLLQ_FREQUENCY (STM32_VCO_FREQUENCY / 2)
|
||||
#define STM32_PLLR_FREQUENCY (STM32_VCO_FREQUENCY / 2)
|
||||
|
||||
/* Use the PLL and set the SYSCLK source to be PLLR (170MHz) */
|
||||
|
||||
#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL
|
||||
#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL
|
||||
#define STM32_SYSCLK_FREQUENCY STM32_PLLR_FREQUENCY
|
||||
|
||||
/* AHB clock (HCLK) is SYSCLK (170MHz) */
|
||||
|
||||
#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK
|
||||
#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
|
||||
|
||||
/* APB1 clock (PCLK1) is HCLK (170MHz) */
|
||||
|
||||
#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK
|
||||
#define STM32_PCLK1_FREQUENCY STM32_HCLK_FREQUENCY
|
||||
|
||||
/* APB2 clock (PCLK2) is HCLK (170MHz) */
|
||||
|
||||
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
|
||||
#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY
|
||||
|
||||
/* APB2 timers 1, 8, 20 and 15-17 will receive PCLK2. */
|
||||
|
||||
/* Timers driven from APB2 will be PCLK2 */
|
||||
|
||||
#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY)
|
||||
#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY)
|
||||
#define STM32_APB1_TIM15_CLKIN (STM32_PCLK2_FREQUENCY)
|
||||
#define STM32_APB1_TIM16_CLKIN (STM32_PCLK2_FREQUENCY)
|
||||
#define STM32_APB1_TIM17_CLKIN (STM32_PCLK2_FREQUENCY)
|
||||
|
||||
/* APB1 timers 2-7 will be twice PCLK1 */
|
||||
|
||||
#define STM32_APB1_TIM2_CLKIN (STM32_PCLK1_FREQUENCY)
|
||||
#define STM32_APB1_TIM3_CLKIN (STM32_PCLK1_FREQUENCY)
|
||||
#define STM32_APB1_TIM4_CLKIN (STM32_PCLK1_FREQUENCY)
|
||||
#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY)
|
||||
#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY)
|
||||
|
||||
/* USB divider -- Divide PLL clock by 1.5 */
|
||||
|
||||
#define STM32_CFGR_USBPRE 0
|
||||
|
||||
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
|
||||
* otherwise frequency is 2xAPBx.
|
||||
*/
|
||||
|
||||
#define BOARD_TIM1_FREQUENCY (STM32_PCLK2_FREQUENCY)
|
||||
#define BOARD_TIM2_FREQUENCY (STM32_PCLK1_FREQUENCY)
|
||||
#define BOARD_TIM3_FREQUENCY (STM32_PCLK1_FREQUENCY)
|
||||
#define BOARD_TIM4_FREQUENCY (STM32_PCLK1_FREQUENCY)
|
||||
#define BOARD_TIM5_FREQUENCY (STM32_PCLK1_FREQUENCY)
|
||||
#define BOARD_TIM6_FREQUENCY (STM32_PCLK1_FREQUENCY)
|
||||
#define BOARD_TIM7_FREQUENCY (STM32_PCLK1_FREQUENCY)
|
||||
#define BOARD_TIM8_FREQUENCY (STM32_PCLK2_FREQUENCY)
|
||||
#define BOARD_TIM15_FREQUENCY (STM32_PCLK2_FREQUENCY)
|
||||
#define BOARD_TIM16_FREQUENCY (STM32_PCLK2_FREQUENCY)
|
||||
#define BOARD_TIM17_FREQUENCY (STM32_PCLK2_FREQUENCY)
|
||||
#define BOARD_TIM20_FREQUENCY (STM32_PCLK2_FREQUENCY)
|
||||
|
||||
/* LED definitions **********************************************************/
|
||||
|
||||
/* The Nucleo-G431KB board has only one user LED, LD2. LD2 is a green LED
|
||||
* connected to the following STM32G4 pins
|
||||
* - PB8 (default)
|
||||
* - PB3
|
||||
* It is also connected to Arduino signal D13.
|
||||
*
|
||||
* If CONFIG_ARCH_LEDS is not defined, then the user can control this LED in
|
||||
* any way. The following definitions are used to access individual LEDs.
|
||||
*/
|
||||
|
||||
/* LED index values for use with board_userled() */
|
||||
|
||||
#define BOARD_LED2 0 /* User LD2 */
|
||||
#define BOARD_NLEDS 1
|
||||
|
||||
/* LED bits for use with board_userled_all() */
|
||||
|
||||
#define BOARD_LED2_BIT (1 << BOARD_LED2)
|
||||
|
||||
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board
|
||||
* the Nucleo-G431KB. The following definitions describe how NuttX controls
|
||||
* the LED:
|
||||
*
|
||||
* SYMBOL Meaning LED1 state
|
||||
* ------------------ ----------------------- ----------
|
||||
* LED_STARTED NuttX has been started OFF
|
||||
* LED_HEAPALLOCATE Heap has been allocated OFF
|
||||
* LED_IRQSENABLED Interrupts enabled OFF
|
||||
* LED_STACKCREATED Idle stack created ON
|
||||
* LED_INIRQ In an interrupt No change
|
||||
* LED_SIGNAL In a signal handler No change
|
||||
* LED_ASSERTION An assertion failed No change
|
||||
* LED_PANIC The system has crashed Blinking
|
||||
* LED_IDLE STM32 is is sleep mode Not used
|
||||
*/
|
||||
|
||||
#define LED_STARTED 0
|
||||
#define LED_HEAPALLOCATE 0
|
||||
#define LED_IRQSENABLED 0
|
||||
#define LED_STACKCREATED 1
|
||||
#define LED_INIRQ 2
|
||||
#define LED_SIGNAL 2
|
||||
#define LED_ASSERTION 2
|
||||
#define LED_PANIC 1
|
||||
|
||||
/* Button definitions *******************************************************/
|
||||
|
||||
/* The Nucleo G431KB don't have buttons that are controllable by software:
|
||||
*
|
||||
* B1 RESET: push button connected to NRST is used to RESET the
|
||||
* STM32G431KB.
|
||||
*/
|
||||
|
||||
/* Alternate function pin selections ****************************************/
|
||||
|
||||
/* USART2 (STLINK Virtual COM Port) */
|
||||
|
||||
#define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2 */
|
||||
#define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3 */
|
||||
|
||||
/* DMA channels *************************************************************/
|
||||
|
||||
/* USART2 */
|
||||
|
||||
#define DMACHAN_USART2_TX DMAMAP_DMA12_USART2TX_0 /* DMA1 */
|
||||
#define DMACHAN_USART2_RX DMAMAP_DMA12_USART2RX_0 /* DMA1 */
|
||||
|
||||
#endif /* __BOARDS_ARM_STM32_NUCLEO_G431KB_INCLUDE_BOARD_H */
|
||||
77
boards/arm/stm32/nucleo-g431kb/scripts/Make.defs
Executable file
77
boards/arm/stm32/nucleo-g431kb/scripts/Make.defs
Executable file
@ -0,0 +1,77 @@
|
||||
############################################################################
|
||||
# boards/arm/stm32/nucleo-g431kb/scripts/Make.defs
|
||||
#
|
||||
# Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
# contributor license agreements. See the NOTICE file distributed with
|
||||
# this work for additional information regarding copyright ownership. The
|
||||
# ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
# "License"); you may not use this file except in compliance with the
|
||||
# License. You may obtain a copy of the License at
|
||||
#
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
# License for the specific language governing permissions and limitations
|
||||
# under the License.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
include $(TOPDIR)/.config
|
||||
include $(TOPDIR)/tools/Config.mk
|
||||
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
|
||||
|
||||
ifeq ($(CONFIG_STM32_DFU),y)
|
||||
LDSCRIPT = ld.script.dfu
|
||||
else
|
||||
LDSCRIPT = ld.script
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
|
||||
# Windows-native toolchains
|
||||
ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
|
||||
else
|
||||
# Linux/Cygwin-native toolchain
|
||||
ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
|
||||
ARCHOPTIMIZATION = -g
|
||||
endif
|
||||
|
||||
ifneq ($(CONFIG_DEBUG_NOOPT),y)
|
||||
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
|
||||
endif
|
||||
|
||||
ARCHCFLAGS = -fno-builtin -funwind-tables
|
||||
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -funwind-tables
|
||||
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
|
||||
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
|
||||
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
|
||||
|
||||
CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -ffunction-sections -fdata-sections -pipe
|
||||
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
|
||||
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -ffunction-sections -fdata-sections -pipe
|
||||
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
|
||||
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
|
||||
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
|
||||
|
||||
NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common
|
||||
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections
|
||||
LDNXFLATFLAGS = -e main -s 2048
|
||||
|
||||
ifneq ($(CROSSDEV),arm-nuttx-elf-)
|
||||
LDFLAGS += -nostartfiles -nodefaultlibs
|
||||
endif
|
||||
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
|
||||
LDFLAGS += -g
|
||||
endif
|
||||
|
||||
# Provide map file needed by the "Memory Allocation" view in Eclipse:
|
||||
LDFLAGS += -Wl,-Map=$(TOPDIR)/NuttX.map -Wl,--gc-sections
|
||||
|
||||
# Embed absolute path to source file in debug information so that Eclipse
|
||||
# source level debugging won't get confused. See:
|
||||
# https://stackoverflow.com/questions/1275476/gcc-gdb-how-to-embed-absolute-path-to-source-file-in-debug-information
|
||||
CFLAGS += -fdebug-prefix-map=..=$(readlink -f ..)
|
||||
124
boards/arm/stm32/nucleo-g431kb/scripts/ld.script
Executable file
124
boards/arm/stm32/nucleo-g431kb/scripts/ld.script
Executable file
@ -0,0 +1,124 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32/nucleo-g431kb/scripts/ld.script
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* The STM32G431KB has 128 KiB of FLASH beginning at address 0x0800:0000.
|
||||
*
|
||||
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
|
||||
* where the code expects to begin execution by jumping to the entry point in
|
||||
* the 0x0800:0000 address range.
|
||||
*
|
||||
* The STM32G431KB has a total of 32 KiB of SRAM in three separate areas:
|
||||
*
|
||||
* 1) 16 KiB SRAM1 mapped at 0x2000:0000 thru 0x2000:3fff.
|
||||
* 2) 6 KiB SRAM2 mapped at 0x2000:4000 thru 0x2000:57ff.
|
||||
*
|
||||
* CCM SRAM (Routine Booster):
|
||||
*
|
||||
* 3) 10 KiB CCM SRAM mapped at 0x1000:0000 thru 0x1000:27ff
|
||||
* but also aliased at at 0x2000:5800 thru 0x2000:7fff to be contiguous
|
||||
* with the SRAM1 and SRAM2.
|
||||
*
|
||||
* Because SRAM1 and SRAM2 are contiguous, they are treated as one region
|
||||
* by this logic.
|
||||
*
|
||||
* CCM SRAM is also contiguous to SRAM1 and SRAM2, however it is excluded
|
||||
* from this linker script, to keep it reserved for special uses in code.
|
||||
* REVISIT: Is this the correct way to handle CCM SRAM?
|
||||
*/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
|
||||
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 22K
|
||||
}
|
||||
|
||||
OUTPUT_ARCH(arm)
|
||||
EXTERN(_vectors)
|
||||
ENTRY(_stext)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text : {
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.vectors)
|
||||
*(.text .text.*)
|
||||
*(.fixup)
|
||||
*(.gnu.warning)
|
||||
*(.rodata .rodata.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.got)
|
||||
*(.gcc_except_table)
|
||||
*(.gnu.linkonce.r.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > flash
|
||||
|
||||
.init_section : ALIGN(4) {
|
||||
_sinit = ABSOLUTE(.);
|
||||
*(.init_array .init_array.*)
|
||||
_einit = ABSOLUTE(.);
|
||||
} > flash
|
||||
|
||||
.ARM.extab : ALIGN(4) {
|
||||
*(.ARM.extab*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : ALIGN(4) {
|
||||
__exidx_start = ABSOLUTE(.);
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = ABSOLUTE(.);
|
||||
} > flash
|
||||
|
||||
_eronly = ABSOLUTE(.);
|
||||
|
||||
.data : ALIGN(4) {
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
CONSTRUCTORS
|
||||
. = ALIGN(4);
|
||||
_edata = ABSOLUTE(.);
|
||||
} > sram AT > flash
|
||||
|
||||
.bss : ALIGN(4) {
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > sram
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_info 0 : { *(.debug_info) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
}
|
||||
2
boards/arm/stm32/nucleo-g431kb/src/.gitignore
vendored
Executable file
2
boards/arm/stm32/nucleo-g431kb/src/.gitignore
vendored
Executable file
@ -0,0 +1,2 @@
|
||||
/.depend
|
||||
/Make.dep
|
||||
38
boards/arm/stm32/nucleo-g431kb/src/Make.defs
Executable file
38
boards/arm/stm32/nucleo-g431kb/src/Make.defs
Executable file
@ -0,0 +1,38 @@
|
||||
############################################################################
|
||||
# boards/arm/stm32/nucleo-g431kb/src/Make.defs
|
||||
#
|
||||
# Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
# contributor license agreements. See the NOTICE file distributed with
|
||||
# this work for additional information regarding copyright ownership. The
|
||||
# ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
# "License"); you may not use this file except in compliance with the
|
||||
# License. You may obtain a copy of the License at
|
||||
#
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
# License for the specific language governing permissions and limitations
|
||||
# under the License.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
include $(TOPDIR)/Make.defs
|
||||
|
||||
ASRCS =
|
||||
CSRCS = stm32_boot.c stm32_bringup.c
|
||||
|
||||
ifeq ($(CONFIG_ARCH_LEDS),y)
|
||||
CSRCS += stm32_autoleds.c
|
||||
else
|
||||
CSRCS += stm32_userleds.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_LIB_BOARDCTL),y)
|
||||
CSRCS += stm32_appinit.c
|
||||
endif
|
||||
|
||||
DEPPATH += --dep-path board
|
||||
VPATH += :board
|
||||
CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board)
|
||||
88
boards/arm/stm32/nucleo-g431kb/src/nucleo-g431kb.h
Executable file
88
boards/arm/stm32/nucleo-g431kb/src/nucleo-g431kb.h
Executable file
@ -0,0 +1,88 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32/nucleo-g431kb/src/nucleo-g431kb.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __BOARDS_ARM_STM32_NUCLEO_G431KB_SRC_NUCLEO_G431KB_H
|
||||
#define __BOARDS_ARM_STM32_NUCLEO_G431KB_SRC_NUCLEO_G431KB_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* LED definitions **********************************************************/
|
||||
|
||||
/* The Nucleo G431KB board has four LEDs. Three of these are controlled by
|
||||
* logic on the board and are not available for software control:
|
||||
*
|
||||
* LD1 COM: LD1 default status is red. LD1 turns to green to indicate that
|
||||
* communications are in progress between the PC and the
|
||||
* ST-LINK/V3.
|
||||
* LD3 OC: indicates that the board power consumption on USB ST-LINK
|
||||
* exceeds 500mA.
|
||||
* LD4 PWR: green LED indicates that the board is powered.
|
||||
*
|
||||
* And one can be controlled by software:
|
||||
*
|
||||
* User LD2: green LED is a user LED connected to the I/O PA5 of the
|
||||
* STM32G431KB.
|
||||
*
|
||||
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LED in
|
||||
* any way. The following definition is used to access the LED.
|
||||
*/
|
||||
|
||||
#define GPIO_LED1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz| \
|
||||
GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN8)
|
||||
|
||||
#define LED_DRIVER_PATH "/dev/userleds"
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_bringup
|
||||
*
|
||||
* Description:
|
||||
* Perform architecture specific initialization
|
||||
*
|
||||
* CONFIG_LIB_BOARDCTL=y:
|
||||
* If CONFIG_NSH_ARCHINITIALIZE=y:
|
||||
* Called from the NSH library (or other application)
|
||||
* Otherwise, assumed to be called from some other application.
|
||||
*
|
||||
* Otherwise CONFIG_BOARD_LATE_INITIALIZE=y:
|
||||
* Called from board_late_initialize().
|
||||
*
|
||||
* Otherwise, bad news: Never called
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int stm32_bringup(void);
|
||||
|
||||
#endif /* __BOARDS_ARM_STM32_NUCLEO_G431KB_SRC_NUCLEO_G431KB_H */
|
||||
79
boards/arm/stm32/nucleo-g431kb/src/stm32_appinit.c
Executable file
79
boards/arm/stm32/nucleo-g431kb/src/stm32_appinit.c
Executable file
@ -0,0 +1,79 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32/nucleo-g431kb/src/stm32_appinit.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
|
||||
#include "nucleo-g431kb.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef OK
|
||||
# define OK 0
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_app_initialize
|
||||
*
|
||||
* Description:
|
||||
* Perform application specific initialization. This function is never
|
||||
* called directly from application code, but only indirectly via the
|
||||
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
|
||||
*
|
||||
* Input Parameters:
|
||||
* arg - The boardctl() argument is passed to the board_app_initialize()
|
||||
* implementation without modification. The argument has no
|
||||
* meaning to NuttX; the meaning of the argument is a contract
|
||||
* between the board-specific initialization logic and the
|
||||
* matching application logic. The value could be such things as a
|
||||
* mode enumeration value, a set of DIP switch settings, a pointer
|
||||
* to configuration data read from a file or serial FLASH, or
|
||||
* whatever you would like to do with it. Every implementation
|
||||
* should accept zero/NULL as a default configuration.
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) is returned on success; a negated errno value is returned on
|
||||
* any failure to indicate the nature of the failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int board_app_initialize(uintptr_t arg)
|
||||
{
|
||||
#ifdef CONFIG_BOARD_LATE_INITIALIZE
|
||||
/* Board initialization already performed by board_late_initialize() */
|
||||
|
||||
return OK;
|
||||
#else
|
||||
/* Perform board-specific initialization */
|
||||
|
||||
return stm32_bringup();
|
||||
#endif
|
||||
}
|
||||
78
boards/arm/stm32/nucleo-g431kb/src/stm32_autoleds.c
Executable file
78
boards/arm/stm32/nucleo-g431kb/src/stm32_autoleds.c
Executable file
@ -0,0 +1,78 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32/nucleo-g431kb/src/stm32_autoleds.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "stm32.h"
|
||||
#include "nucleo-g431kb.h"
|
||||
|
||||
#if defined(CONFIG_ARCH_LEDS)
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_autoled_initialize
|
||||
****************************************************************************/
|
||||
|
||||
void board_autoled_initialize(void)
|
||||
{
|
||||
/* Configure LED GPIOs for output */
|
||||
|
||||
stm32_configgpio(GPIO_LED1);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_autoled_on
|
||||
****************************************************************************/
|
||||
|
||||
void board_autoled_on(int led)
|
||||
{
|
||||
if (led == BOARD_LED2)
|
||||
{
|
||||
stm32_gpiowrite(GPIO_LED1, true);
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_autoled_off
|
||||
****************************************************************************/
|
||||
|
||||
void board_autoled_off(int led)
|
||||
{
|
||||
if (led == BOARD_LED2)
|
||||
{
|
||||
stm32_gpiowrite(GPIO_LED1, false);
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* CONFIG_ARCH_LEDS */
|
||||
93
boards/arm/stm32/nucleo-g431kb/src/stm32_boot.c
Executable file
93
boards/arm/stm32/nucleo-g431kb/src/stm32_boot.c
Executable file
@ -0,0 +1,93 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32/nucleo-g431kb/src/stm32_boot.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "nucleo-g431kb.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Private Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_boardinitialize
|
||||
*
|
||||
* Description:
|
||||
* All STM32 architectures must provide the following entry point. This
|
||||
* entry point is called early in the initialization -- after all memory
|
||||
* has been configured and mapped but before any devices have been
|
||||
* initialized.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void stm32_boardinitialize(void)
|
||||
{
|
||||
/* Configure on-board LEDs if LED support has been selected. */
|
||||
|
||||
#ifdef CONFIG_ARCH_LEDS
|
||||
board_autoled_initialize();
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_late_initialize
|
||||
*
|
||||
* Description:
|
||||
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
|
||||
* initialization call will be performed in the boot-up sequence to a
|
||||
* function called board_late_initialize(). board_late_initialize() will
|
||||
* be called immediately after up_initialize() is called and just before
|
||||
* the initial application is started. This additional initialization
|
||||
* phase may be used, for example, to initialize board-specific device
|
||||
* drivers.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_BOARD_LATE_INITIALIZE
|
||||
void board_late_initialize(void)
|
||||
{
|
||||
/* Perform board-specific initialization */
|
||||
|
||||
stm32_bringup();
|
||||
}
|
||||
#endif
|
||||
83
boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c
Executable file
83
boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c
Executable file
@ -0,0 +1,83 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <syslog.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
|
||||
#ifdef CONFIG_USERLED
|
||||
# include <nuttx/leds/userled.h>
|
||||
#endif
|
||||
|
||||
#include "nucleo-g431kb.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#undef HAVE_LEDS
|
||||
|
||||
#if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER)
|
||||
# define HAVE_LEDS 1
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_bringup
|
||||
*
|
||||
* Description:
|
||||
* Perform architecture-specific initialization
|
||||
*
|
||||
* CONFIG_BOARD_LATE_INITIALIZE=y :
|
||||
* Called from board_late_initialize().
|
||||
*
|
||||
* CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y :
|
||||
* Called from the NSH library
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int stm32_bringup(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
#ifdef HAVE_LEDS
|
||||
/* Register the LED driver */
|
||||
|
||||
ret = userled_lower_initialize(LED_DRIVER_PATH);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
UNUSED(ret);
|
||||
return OK;
|
||||
}
|
||||
75
boards/arm/stm32/nucleo-g431kb/src/stm32_userleds.c
Executable file
75
boards/arm/stm32/nucleo-g431kb/src/stm32_userleds.c
Executable file
@ -0,0 +1,75 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/stm32/nucleo-g431kb/src/stm32_userleds.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "stm32.h"
|
||||
#include "nucleo-g431kb.h"
|
||||
|
||||
#if !defined(CONFIG_ARCH_LEDS)
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_userled_initialize
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t board_userled_initialize(void)
|
||||
{
|
||||
/* Configure LED GPIOs for output */
|
||||
|
||||
stm32_configgpio(GPIO_LED1);
|
||||
return BOARD_NLEDS;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_userled
|
||||
****************************************************************************/
|
||||
|
||||
void board_userled(int led, bool ledon)
|
||||
{
|
||||
if (led == BOARD_LED1)
|
||||
{
|
||||
stm32_gpiowrite(GPIO_LED1, ledon);
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_userled_all
|
||||
****************************************************************************/
|
||||
|
||||
void board_userled_all(uint32_t ledset)
|
||||
{
|
||||
stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) != 0);
|
||||
}
|
||||
|
||||
#endif /* !CONFIG_ARCH_LEDS */
|
||||
Loading…
Reference in New Issue
Block a user