Xtensa: Fix some compile issues

This commit is contained in:
Gregory Nutt 2016-10-20 16:42:37 -06:00
parent 7a89808deb
commit 363fe19ff6
6 changed files with 37 additions and 29 deletions

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@ -248,6 +248,11 @@ void xtensa_dumpstate(void);
uint32_t *xtensa_int_decode(uint32_t *regs); uint32_t *xtensa_int_decode(uint32_t *regs);
uint32_t *xtensa_irq_dispatch(int irq, uint32_t *regs); uint32_t *xtensa_irq_dispatch(int irq, uint32_t *regs);
void xtensa_context_save(uint32_t *regs);
void xtensa_full_context_save(uint32_t *regs);
void xtensa_context_restore(uint32_t *regs);
void xtensa_full_context_restore(uint32_t *regs);
/* Software interrupt handler */ /* Software interrupt handler */
int xtensa_swint(int irq, FAR void *context); int xtensa_swint(int irq, FAR void *context);

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@ -76,8 +76,8 @@
.text .text
/**************************************************************************** /****************************************************************************
* Name: _xtensa_context_save * Name: xtensa_context_save
* _xtensa_full_context_save * xtensa_full_context_save
* *
* Description: * Description:
* *
@ -85,14 +85,14 @@
* *
* These functions save Xtensa processor state: * These functions save Xtensa processor state:
* *
* - _xtensa_full_context_save saves all registers except PC, PS, A0, and * - xtensa_full_context_save saves all registers except PC, PS, A0, and
* A1 (SP) * A1 (SP)
* - _xtensa_context_save, in addition, does not save A12-A15 which * - xtensa_context_save, in addition, does not save A12-A15 which
* are preserved by the callee). * are preserved by the callee).
* *
* Caller is expected to have saved PC, PS, A0, and A1 (SP). * Caller is expected to have saved PC, PS, A0, and A1 (SP).
* *
* The counterparts to these functions are _xtensa_context_restore() and * The counterparts to these functions are xtensa_context_restore() and
* xtensa_full_context_restore(). * xtensa_full_context_restore().
* *
* Entry Conditions: * Entry Conditions:
@ -110,16 +110,16 @@
* *
****************************************************************************/ ****************************************************************************/
.global _xtensa_full_context_save .global xtensa_full_context_save
.global _xtensa_context_save .global xtensa_context_save
.type _xtensa_full_context_save, @function .type xtensa_full_context_save, @function
.type _xtensa_context_save, @function .type xtensa_context_save, @function
.align 4 .align 4
.literal_position .literal_position
.align 4 .align 4
_xtensa_full_context_save: xtensa_full_context_save:
#ifndef CONFIG_XTENSA_CALL0_ABI #ifndef CONFIG_XTENSA_CALL0_ABI
/* Save Call0 ABI callee-saved regs a12-15. */ /* Save Call0 ABI callee-saved regs a12-15. */
@ -130,7 +130,7 @@ _xtensa_full_context_save:
s32i a15, sp, (4 * REG_A15) s32i a15, sp, (4 * REG_A15)
#endif #endif
_xtensa_context_save: xtensa_context_save:
s32i a2, sp, (4 * REG_A2) s32i a2, sp, (4 * REG_A2)
s32i a3, sp, (4 * REG_A3) s32i a3, sp, (4 * REG_A3)
@ -238,8 +238,8 @@ _xtensa_context_save:
ret ret
/**************************************************************************** /****************************************************************************
* Name: _xtensa_context_restore * Name: xtensa_context_restore
* _xtensa_full_context_restore * xtensa_full_context_restore
* *
* Description: * Description:
* *
@ -248,14 +248,14 @@ _xtensa_context_save:
* These functions restores Xtensa processor state and differ in which * These functions restores Xtensa processor state and differ in which
* registers are saved: * registers are saved:
* *
* - _xtensa_full_context_restore restores all registers except PC, PS, * - xtensa_full_context_restore restores all registers except PC, PS,
* A0, and A1 (SP) * A0, and A1 (SP)
* - _xtensa_context_restore, in addition, does not restore A12-A15 which * - xtensa_context_restore, in addition, does not restore A12-A15 which
* are preserved by the callee). * are preserved by the callee).
* *
* The caller is responsible for restoring PC, PS, A0, A1 (SP) in both cases. * The caller is responsible for restoring PC, PS, A0, A1 (SP) in both cases.
* *
* _xtensa_context_save and _xtensa_full_context_save are the counterparts * xtensa_context_save and xtensa_full_context_save are the counterparts
* to these functions. * to these functions.
* *
* Entry Conditions: * Entry Conditions:
@ -269,16 +269,16 @@ _xtensa_context_save:
* *
****************************************************************************/ ****************************************************************************/
.global _xtensa_full_context_restore .global xtensa_full_context_restore
.global _xtensa_context_restore .global xtensa_context_restore
.type _xtensa_full_context_restore,@function .type xtensa_full_context_restore,@function
.type _xtensa_context_restore,@function .type xtensa_context_restore,@function
.align 4 .align 4
.literal_position .literal_position
.align 4 .align 4
_xtensa_full_context_restore: xtensa_full_context_restore:
#ifndef CONFIG_XTENSA_CALL0_ABI #ifndef CONFIG_XTENSA_CALL0_ABI
/* Restore Call0 ABI callee-saved regs a12-15. */ /* Restore Call0 ABI callee-saved regs a12-15. */
@ -289,7 +289,7 @@ _xtensa_full_context_restore:
l32i a15, sp, (4 * REG_A15) l32i a15, sp, (4 * REG_A15)
#endif #endif
_xtensa_context_restore: xtensa_context_restore:
#if XTENSA_EXTRA_SA_SIZE > 0 #if XTENSA_EXTRA_SA_SIZE > 0
/* NOTE: Normally the xthal_restore_extra_nw macro only affects address /* NOTE: Normally the xthal_restore_extra_nw macro only affects address

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@ -95,7 +95,8 @@ static void xtensa_stackdump(uint32_t sp, uint32_t stack_base)
static inline void xtensa_registerdump(void) static inline void xtensa_registerdump(void)
{ {
uint32_ *regs = CURRENT_REGS; uint32_t *regs = (uint32_t *)CURRENT_REGS; /* Don't need volatile here */
/* Are user registers available from interrupt processing? */ /* Are user registers available from interrupt processing? */
if (regs != NULL) if (regs != NULL)

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@ -142,8 +142,8 @@ void _exit(int status)
{ {
struct tcb_s *tcb; struct tcb_s *tcb;
/* Disable interrupts. They will be restored when the next /* Disable interrupts. They will be restored when the next task is
* task is started. * started.
*/ */
(void)up_irq_save(); (void)up_irq_save();
@ -177,7 +177,7 @@ void _exit(int status)
/* Then switch contexts */ /* Then switch contexts */
up_fullcontextrestore(tcb->xcp.regs); xtensa_full_context_restore(tcb->xcp.regs);
/* up_fullcontextrestore() should not return but could if the software /* up_fullcontextrestore() should not return but could if the software
* interrupts are disabled. * interrupts are disabled.

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@ -272,7 +272,7 @@
* a CALL0 instruction. See "NOTES on the use of call0 ..." above. * a CALL0 instruction. See "NOTES on the use of call0 ..." above.
* *
* The corresponding handler sets up the appropriate stack frame, saves * The corresponding handler sets up the appropriate stack frame, saves
* a few vector-specific registers and calls _xtensa_full_context_save() * a few vector-specific registers and calls xtensa_full_context_save()
* to save the rest of the interrupted context. It then calls the C * to save the rest of the interrupted context. It then calls the C
* logic to decode the specific interrupt source and dispatch to the * logic to decode the specific interrupt source and dispatch to the
* appropriate C interrupt handler. * appropriate C interrupt handler.
@ -296,7 +296,7 @@ _xtensa_level2_handler:
/* Save rest of interrupt context and enter RTOS. */ /* Save rest of interrupt context and enter RTOS. */
call0 _xtensa_full_context_save /* Save full register state */ call0 xtensa_full_context_save /* Save full register state */
/* Set up PS for C, enable interrupts above this level and clear EXCM. */ /* Set up PS for C, enable interrupts above this level and clear EXCM. */

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@ -39,6 +39,9 @@
#include <nuttx/config.h> #include <nuttx/config.h>
#include <arch/chip/irq.h>
#include "chip/esp32_dport.h"
#include "xtensa.h" #include "xtensa.h"
/**************************************************************************** /****************************************************************************
@ -70,7 +73,6 @@ uint32_t *xtensa_int_decode(uint32_t *regs)
int regndx; int regndx;
int bit; int bit;
int baseirq; int baseirq;
int irq;
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
int cpu; int cpu;