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STM32 Kconfig looks good. STM32 external ram configuration changed.

Browse Source 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5100 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-09-05 23:02:43 +00:00
parent 4ce326338e
commit 370b90721b
49 changed files with 37 additions and 381 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
configs/compal_e99/nsh_compalram/defconfig
View File

@ -45,8 +45,8 @@ CONFIG_ARCH_BOARD_COMPALE99=y
CONFIG_BOARD_LOOPSPERMSEC=1250
CONFIG_ROM_VECTORS=n
CONFIG_MM_REGIONS=2
CONFIG_HEAP2_START=0x01000000
CONFIG_HEAP2_END=0x01200000
CONFIG_HEAP2_BASE=0x01000000
CONFIG_HEAP2_SIZE=2097152
CONFIG_ARCH_LEDS=n
CONFIG_ARCH_INTERRUPTSTACK=1024
CONFIG_ARCH_STACKDUMP=y

4
configs/compal_e99/nsh_highram/defconfig
View File

@ -45,8 +45,8 @@ CONFIG_ARCH_BOARD_COMPALE99=y
CONFIG_BOARD_LOOPSPERMSEC=1250
CONFIG_ROM_VECTORS=n
CONFIG_MM_REGIONS=2
CONFIG_HEAP2_START=0x01000000
CONFIG_HEAP2_END=0x01200000
CONFIG_HEAP2_BASE=0x01000000
CONFIG_HEAP2_SIZE=2097152
CONFIG_ARCH_LEDS=n
CONFIG_ARCH_INTERRUPTSTACK=1024
CONFIG_ARCH_STACKDUMP=y

8
configs/hymini-stm32v/buttons/defconfig
View File

@ -155,14 +155,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=y
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# General build options
#

8
configs/hymini-stm32v/nsh/defconfig
View File

@ -153,14 +153,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103V specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# General build options
#

8
configs/hymini-stm32v/nsh2/defconfig
View File

@ -158,14 +158,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# General build options
#

8
configs/hymini-stm32v/nx/defconfig
View File

@ -153,14 +153,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103V specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# General build options
#

8
configs/hymini-stm32v/nxlines/defconfig
View File

@ -157,14 +157,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103V specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# General build options
#

8
configs/hymini-stm32v/usbserial/defconfig
View File

@ -155,14 +155,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103V specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# General build options
#

8
configs/hymini-stm32v/usbstorage/defconfig
View File

@ -154,14 +154,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103V specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# General build options
#

8
configs/kwikstik-k40/ostest/defconfig
View File

@ -165,14 +165,6 @@ CONFIG_UART3_PARITY=0
CONFIG_UART4_PARITY=0
CONFIG_UART5_PARITY=0
#
# K40X256VLQ100 specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# General build options
#

8
configs/olimex-stm32-p107/nsh/defconfig
View File

@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM3210E-EVAL specific LCD settings
#

8
configs/olimex-stm32-p107/ostest/defconfig
View File

@ -185,14 +185,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=y
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM3210E-EVAL specific LCD settings
#

2
configs/stm3210e-eval/README.txt
View File

@ -362,7 +362,7 @@ The on-board SRAM can be configured by setting
CONFIG_STM32_FSMC=y : Enables the FSMC
CONFIG_STM32_FSMC_SRAM=y : Enable external SRAM support
CONFIG_HEAP2_BASE=0x68000000 : SRAM will be located at 0x680000000
CONFIG_HEAP2_END=(0x68000000+(1*1024*1024)) : The size of the SRAM is 1Mbyte
CONFIG_HEAP2_SIZE=1048576 : The size of the SRAM is 1Mbyte
CONFIG_MM_REGIONS=2 : There will be two memory regions
: in the heap

8
configs/stm3210e-eval/RIDE/defconfig
View File

@ -151,14 +151,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM3210E-EVAL specific LCD settings
#

8
configs/stm3210e-eval/buttons/defconfig
View File

@ -162,14 +162,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=y
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM3210E-EVAL specific LCD settings
#

8
configs/stm3210e-eval/composite/defconfig
View File

@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM3210E-EVAL specific LCD settings
#

8
configs/stm3210e-eval/nsh/defconfig
View File

@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM3210E-EVAL specific LCD settings
#

8
configs/stm3210e-eval/nsh2/defconfig
View File

@ -181,14 +181,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM3210E-EVAL specific LCD settings
#

8
configs/stm3210e-eval/nx/defconfig
View File

@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM3210E-EVAL specific LCD settings
#

8
configs/stm3210e-eval/nxconsole/defconfig
View File

@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM3210E-EVAL specific LCD settings
#

8
configs/stm3210e-eval/nxlines/defconfig
View File

@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM3210E-EVAL specific LCD settings
#

8
configs/stm3210e-eval/nxtext/defconfig
View File

@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM3210E-EVAL specific LCD settings
#

8
configs/stm3210e-eval/ostest/defconfig
View File

@ -161,14 +161,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM3210E-EVAL specific LCD settings
#

8
configs/stm3210e-eval/pm/defconfig
View File

@ -191,14 +191,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM3210E-EVAL specific LCD settings
#

8
configs/stm3210e-eval/usbserial/defconfig
View File

@ -161,14 +161,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM3210E-EVAL specific LCD settings
#

8
configs/stm3210e-eval/usbstorage/defconfig
View File

@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM3210E-EVAL specific LCD settings
#

8
configs/stm3220g-eval/README.txt
View File

@ -352,7 +352,7 @@ The on-board SRAM can be configured by setting
CONFIG_STM32_FSMC=y
CONFIG_STM32_FSMC_SRAM=y
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=(0x64000000+(2*1024*1024))
CONFIG_HEAP2_SIZE=2097152
CONFIG_MM_REGIONS=2
Configuration Options
@ -368,7 +368,7 @@ NuttX configuration file:
FSMC (as opposed to an LCD or FLASH).
CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC
address space
CONFIG_HEAP2_END : The end (+1) of the SRAM in the FSMC
CONFIG_HEAP2_SIZE : The size of the SRAM in the FSMC
address space
CONFIG_MM_REGIONS : Must be set to a large enough value to
include the FSMC SRAM
@ -475,9 +475,9 @@ STM3220G-EVAL-specific Configuration Options
CONFIG_STM32_FSMC_SRAM - Indicates that SRAM is available via the
FSMC (as opposed to an LCD or FLASH).
CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space
CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space (hex)
CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space
CONFIG_HEAP2_SIZE - The size of the SRAM in the FSMC address space (decimal)
CONFIG_ARCH_IRQPRIO - The STM3220xxx supports interrupt prioritization

10
configs/stm3220g-eval/dhcpd/defconfig
View File

@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
#
CONFIG_STM32_FSMC_SRAM=y
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=0x64200000
CONFIG_HEAP2_SIZE=2097152
#
# Individual subsystems can be enabled:
@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F20xxx specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM32F20xxx specific CAN device driver settings
#

10
configs/stm3220g-eval/nettest/defconfig
View File

@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
#
CONFIG_STM32_FSMC_SRAM=y
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=0x64200000
CONFIG_HEAP2_SIZE=2097152
#
# Individual subsystems can be enabled:
@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F20xxx specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM32F20xxx specific CAN device driver settings
#

10
configs/stm3220g-eval/nsh/defconfig
View File

@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
#
CONFIG_STM32_FSMC_SRAM=y
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=0x64200000
CONFIG_HEAP2_SIZE=2097152
#
# Individual subsystems can be enabled:
@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F20xxx specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM32F20xxx specific CAN device driver settings
#

10
configs/stm3220g-eval/nsh2/defconfig
View File

@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
#
CONFIG_STM32_FSMC_SRAM=y
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=0x64200000
CONFIG_HEAP2_SIZE=2097152
#
# Individual subsystems can be enabled:
@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F20xxx specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM32F20xxx specific CAN device driver settings
#

10
configs/stm3220g-eval/nxwm/defconfig
View File

@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
#
CONFIG_STM32_FSMC_SRAM=n
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=0x64200000
CONFIG_HEAP2_SIZE=2097152
#
# Individual subsystems can be enabled:
@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F20xxx specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM32F20xxx specific CAN device driver settings
#

10
configs/stm3220g-eval/ostest/defconfig
View File

@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
#
CONFIG_STM32_FSMC_SRAM=y
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=0x64200000
CONFIG_HEAP2_SIZE=2097152
#
# Individual subsystems can be enabled:
@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F20xxx specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM32F20xxx specific CAN device driver settings
#

10
configs/stm3220g-eval/telnetd/defconfig
View File

@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
#
CONFIG_STM32_FSMC_SRAM=y
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=0x64200000
CONFIG_HEAP2_SIZE=2097152
#
# Individual subsystems can be enabled:
@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F20xxx specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM32F20xxx specific CAN device driver settings
#

8
configs/stm3240g-eval/README.txt
View File

@ -451,7 +451,7 @@ The on-board SRAM can be configured by setting
CONFIG_STM32_FSMC=y
CONFIG_STM32_FSMC_SRAM=y
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=(0x64000000+(2*1024*1024))
CONFIG_HEAP2_SIZE=2097152
CONFIG_MM_REGIONS=2 (or =3, see below)
Configuration Options
@ -472,7 +472,7 @@ present in the NuttX configuration file:
FSMC (as opposed to an LCD or FLASH).
CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC
address space
CONFIG_HEAP2_END : The end (+1) of the SRAM in the FSMC
CONFIG_HEAP2_SIZE : The size of the SRAM in the FSMC
address space
CONFIG_MM_REGIONS : Must be set to a large enough value to
include the FSMC SRAM
@ -591,9 +591,9 @@ STM3240G-EVAL-specific Configuration Options
CONFIG_STM32_FSMC_SRAM - Indicates that SRAM is available via the
FSMC (as opposed to an LCD or FLASH).
CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space
CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space (hex)
CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space
CONFIG_HEAP2_END - The size of the SRAM in the FSMC address space (decimal)
CONFIG_ARCH_IRQPRIO - The STM3240xxx supports interrupt prioritization

10
configs/stm3240g-eval/dhcpd/defconfig
View File

@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
#
CONFIG_STM32_FSMC_SRAM=y
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=0x64200000
CONFIG_HEAP2_SIZE=2097152
#
# Individual subsystems can be enabled:
@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F40xxx specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM32F40xxx specific CAN device driver settings
#

10
configs/stm3240g-eval/nettest/defconfig
View File

@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
#
CONFIG_STM32_FSMC_SRAM=y
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=0x64200000
CONFIG_HEAP2_SIZE=2097152
#
# Individual subsystems can be enabled:
@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F40xxx specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM32F40xxx specific CAN device driver settings
#

10
configs/stm3240g-eval/nsh/defconfig
View File

@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
#
CONFIG_STM32_FSMC_SRAM=y
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=0x64200000
CONFIG_HEAP2_SIZE=2097152
#
# Individual subsystems can be enabled:
@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F40xxx specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM32F40xxx specific CAN device driver settings
#

10
configs/stm3240g-eval/nsh2/defconfig
View File

@ -84,7 +84,7 @@ CONFIG_STM32_CCMEXCLUDE=y
#
CONFIG_STM32_FSMC_SRAM=y
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=0x64200000
CONFIG_HEAP2_SIZE=2097152
#
# Individual subsystems can be enabled:
@ -190,14 +190,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F40xxx specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM32F40xxx specific CAN device driver settings
#

10
configs/stm3240g-eval/nxconsole/defconfig
View File

@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
#
CONFIG_STM32_FSMC_SRAM=y
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=0x64200000
CONFIG_HEAP2_SIZE=2097152
#
# Individual subsystems can be enabled:
@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F40xxx specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM32F40xxx specific CAN device driver settings
#

10
configs/stm3240g-eval/nxwm/defconfig
View File

@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
#
CONFIG_STM32_FSMC_SRAM=n
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=0x64200000
CONFIG_HEAP2_SIZE=2097152
#
# Individual subsystems can be enabled:
@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F40xxx specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM32F40xxx specific CAN device driver settings
#

10
configs/stm3240g-eval/ostest/defconfig
View File

@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
#
CONFIG_STM32_FSMC_SRAM=y
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=0x64200000
CONFIG_HEAP2_SIZE=2097152
#
# Individual subsystems can be enabled:
@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F40xxx specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM32F40xxx specific CAN device driver settings
#

10
configs/stm3240g-eval/telnetd/defconfig
View File

@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
#
CONFIG_STM32_FSMC_SRAM=y
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=0x64200000
CONFIG_HEAP2_SIZE=2097152
#
# Individual subsystems can be enabled:
@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F40xxx specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM32F40xxx specific CAN device driver settings
#

10
configs/stm3240g-eval/webserver/defconfig
View File

@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
#
CONFIG_STM32_FSMC_SRAM=y
CONFIG_HEAP2_BASE=0x64000000
CONFIG_HEAP2_END=0x64200000
CONFIG_HEAP2_SIZE=2097152
#
# Individual subsystems can be enabled:
@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F40xxx specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM32F40xxx specific CAN device driver settings
#

14
configs/stm32f4discovery/README.txt
View File

@ -445,13 +445,13 @@ present in the NuttX configuration file:
CONFIG_STM32_FSMC=y : Enables the FSMC
CONFIG_STM32_FSMC_SRAM=y : Indicates that SRAM is available via the
FSMC (as opposed to an LCD or FLASH).
FSMC (as opposed to an LCD or FLASH).
CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC
address space
CONFIG_HEAP2_END : The end (+1) of the SRAM in the FSMC
address space
address space
CONFIG_HEAP2_SIZE : The size of the SRAM in the FSMC
address space
CONFIG_MM_REGIONS : Must be set to a large enough value to
include the FSMC SRAM
include the FSMC SRAM
SRAM Configurations
-------------------
@ -704,9 +704,9 @@ STM32F4Discovery-specific Configuration Options
CONFIG_STM32_FSMC_SRAM - Indicates that SRAM is available via the
FSMC (as opposed to an LCD or FLASH).
CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space
CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space (hex)
CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space
CONFIG_HEAP2_SIZE - The size of the SRAM in the FSMC address space (decimal)
CONFIG_ARCH_IRQPRIO - The STM32F4Discovery supports interrupt prioritization

8
configs/stm32f4discovery/ostest/defconfig
View File

@ -178,14 +178,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F40xxx specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# STM32F40xxx specific CAN device driver settings
#

8
configs/twr-k60n512/nsh/defconfig
View File

@ -164,14 +164,6 @@ CONFIG_UART3_PARITY=0
CONFIG_UART4_PARITY=0
CONFIG_UART5_PARITY=0
#
# K40X256VLQ100 specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# General build options
#

8
configs/twr-k60n512/ostest/defconfig
View File

@ -164,14 +164,6 @@ CONFIG_UART3_PARITY=0
CONFIG_UART4_PARITY=0
CONFIG_UART5_PARITY=0
#
# K40X256VLQ100 specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# General build options
#

10
configs/vsn/nsh/defconfig
View File

@ -3,7 +3,7 @@
#
# Copyright (C) 2009-2010, 2012 Gregory Nutt. All rights reserved.
# Copyright (c) 2011 Uros Platise. All rights reserved.
# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
# Author: Gregory Nutt <gnutt@nuttx.org>
# Uros Platise <uros.platise@isotel.eu>
#
# Redistribution and use in source and binary forms, with or without
@ -181,14 +181,6 @@ CONFIG_USART3_2STOP=0
CONFIG_UART4_2STOP=0
CONFIG_UART5_2STOP=0
#
# STM32F103Z specific SSI device driver settings
#
CONFIG_SSI0_DISABLE=y
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=y
#CONFIG_SSI_TXLIMIT=4
#
# OS support for I2C
#