Merged in juniskane/nuttx_stm32l4/stm32l4_adc_kconfig_pr (pull request #478)
STM32L4: ADC, Kconfig small changes * STM32L4 ADC: port analog watchdog ioctls from the Motorola MDK * STM32L4: Kconfig: add some L486 and L496 chips, remove duplicates Approved-by: Gregory Nutt <gnutt@nuttx.org>
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@ -28,30 +28,6 @@ config ARCH_CHIP_STM32L432KC
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---help---
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STM32 L4 Cortex M4, 256 Kb FLASH, 64 Kb SRAM
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config ARCH_CHIP_STM32L433RB
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bool "STM32L433RB"
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select STM32L4_STM32L433XX
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select STM32L4_FLASH_CONFIG_B
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select STM32L4_IO_CONFIG_K
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---help---
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STM32 L4 Cortex M4, 128 Kb FLASH, 64 Kb SRAM
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config ARCH_CHIP_STM32L433RC
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bool "STM32L433RC"
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select STM32L4_STM32L433XX
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select STM32L4_FLASH_CONFIG_C
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select STM32L4_IO_CONFIG_K
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---help---
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STM32 L4 Cortex M4, 256 Kb FLASH, 64 Kb SRAM
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config ARCH_CHIP_STM32L442KC
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bool "STM32L442KC"
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select STM32L4_STM32L442XX
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select STM32L4_FLASH_CONFIG_C
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select STM32L4_IO_CONFIG_K
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---help---
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STM32 L4 Cortex M4, AES, 256 Kb FLASH, 64 Kb SRAM
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config ARCH_CHIP_STM32L433CB
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bool "STM32L433CB"
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select STM32L4_STM32L433XX
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@ -92,6 +68,14 @@ config ARCH_CHIP_STM32L433VC
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---help---
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STM32 L4 Cortex M4, 256 Kb FLASH, 64 Kb SRAM
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config ARCH_CHIP_STM32L442KC
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bool "STM32L442KC"
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select STM32L4_STM32L442XX
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select STM32L4_FLASH_CONFIG_C
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select STM32L4_IO_CONFIG_K
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---help---
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STM32 L4 Cortex M4, AES, 256 Kb FLASH, 64 Kb SRAM
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config ARCH_CHIP_STM32L443CC
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bool "STM32L443CC"
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select STM32L4_STM32L443XX
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@ -300,13 +284,78 @@ config ARCH_CHIP_STM32L476RE
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---help---
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STM32 L4 Cortex M4, 512Kb FLASH, 96+32 Kb SRAM
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config ARCH_CHIP_STM32L486 # REVISIT: expand for each chip
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bool "STM32L486xx"
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config ARCH_CHIP_STM32L486RG
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bool "STM32L486RG"
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select STM32L4_STM32L486XX
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select STM32L4_FLASH_CONFIG_G
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select STM32L4_IO_CONFIG_R
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---help---
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STM32 L4 Cortex M4, AES, 1024Kb FLASH, 96+32 Kb SRAM
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config ARCH_CHIP_STM32L486JG
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bool "STM32L486JG"
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select STM32L4_STM32L486XX
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select STM32L4_FLASH_CONFIG_G
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select STM32L4_IO_CONFIG_J
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---help---
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STM32 L4 Cortex M4, AES, 1024Kb FLASH, 96+32 Kb SRAM
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config ARCH_CHIP_STM32L486VG
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bool "STM32L486VG"
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select STM32L4_STM32L486XX
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select STM32L4_FLASH_CONFIG_G
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select STM32L4_IO_CONFIG_V
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---help---
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STM32 L4 Cortex M4, AES, 1024Kb FLASH, 96+32 Kb SRAM
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config ARCH_CHIP_STM32L486QG
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bool "STM32L486QG"
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select STM32L4_STM32L486XX
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select STM32L4_FLASH_CONFIG_G
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select STM32L4_IO_CONFIG_Q
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---help---
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STM32 L4 Cortex M4, AES, 1024Kb FLASH, 96+32 Kb SRAM
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config ARCH_CHIP_STM32L486ZG
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bool "STM32L486ZG"
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select STM32L4_STM32L486XX
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select STM32L4_FLASH_CONFIG_G
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select STM32L4_IO_CONFIG_Z
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---help---
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STM32 L4 Cortex M4, AES, 1024Kb FLASH, 96+32 Kb SRAM
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config ARCH_CHIP_STM32L496RE
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bool "STM32L496RE"
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select STM32L4_STM32L496XX
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select STM32L4_FLASH_CONFIG_E
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select STM32L4_IO_CONFIG_R
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---help---
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STM32 L4 Cortex M4, 512Kb FLASH, 320 Kb SRAM
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config ARCH_CHIP_STM32L496RG
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bool "STM32L496RG"
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select STM32L4_STM32L496XX
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select STM32L4_FLASH_CONFIG_G
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select STM32L4_IO_CONFIG_R
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---help---
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STM32 L4 Cortex M4, 1024Kb FLASH, 320 Kb SRAM
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config ARCH_CHIP_STM32L496VE
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bool "STM32L496VE"
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select STM32L4_STM32L496XX
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select STM32L4_FLASH_CONFIG_E
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select STM32L4_IO_CONFIG_V
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---help---
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STM32 L4 Cortex M4, 512Kb FLASH, 320 Kb SRAM
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config ARCH_CHIP_STM32L496VG
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bool "STM32L496VG"
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select STM32L4_STM32L496XX
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select STM32L4_FLASH_CONFIG_G
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select STM32L4_IO_CONFIG_V
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---help---
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STM32 L4 Cortex M4, 1024Kb FLASH, 320 Kb SRAM
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config ARCH_CHIP_STM32L496ZE
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bool "STM32L496ZE"
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select STM32L4_STM32L496XX
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@ -323,6 +372,14 @@ config ARCH_CHIP_STM32L496ZG
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---help---
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STM32 L4 Cortex M4, 1024Kb FLASH, 320 Kb SRAM
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config ARCH_CHIP_STM32L496AG
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bool "STM32L496AG"
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select STM32L4_STM32L496XX
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select STM32L4_FLASH_CONFIG_G
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select STM32L4_IO_CONFIG_A
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---help---
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STM32 L4 Cortex M4, 1024Kb FLASH, 320 Kb SRAM
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config ARCH_CHIP_STM32L4A6 # REVISIT: expand for each chip
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bool "STM32L4A6xx"
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select STM32L4_STM32L4A6XX
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@ -1530,6 +1530,8 @@ static int adc_set_ch(FAR struct adc_dev_s *dev, uint8_t ch)
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static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
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{
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FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
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uint32_t regval;
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uint32_t tmp;
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int ret = OK;
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switch (cmd)
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@ -1538,6 +1540,56 @@ static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
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adc_startconv(priv, true);
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break;
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case ANIOC_WDOG_UPPER: /* Set watchdog upper threshold */
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{
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regval = adc_getreg(priv, STM32L4_ADC_TR1_OFFSET);
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/* Verify new upper threshold greater than lower threshold */
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tmp = (regval & ADC_TR1_LT_MASK) >> ADC_TR1_LT_SHIFT;
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if (arg < tmp)
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{
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ret = -EINVAL;
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break;
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}
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/* Set the watchdog threshold register */
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regval &= ~ADC_TR1_HT_MASK;
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regval |= ((arg << ADC_TR1_HT_SHIFT) & ADC_TR1_HT_MASK);
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adc_putreg(priv, STM32L4_ADC_TR1_OFFSET, regval);
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/* Ensure analog watchdog is enabled */
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adc_wdog_enable(priv);
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}
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break;
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case ANIOC_WDOG_LOWER: /* Set watchdog lower threshold */
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{
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regval = adc_getreg(priv, STM32L4_ADC_TR1_OFFSET);
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/* Verify new lower threshold less than upper threshold */
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tmp = (regval & ADC_TR1_HT_MASK) >> ADC_TR1_HT_SHIFT;
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if (arg > tmp)
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{
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ret = -EINVAL;
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break;
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}
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/* Set the watchdog threshold register */
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regval &= ~ADC_TR1_LT_MASK;
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regval |= ((arg << ADC_TR1_LT_SHIFT) & ADC_TR1_LT_MASK);
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adc_putreg(priv, STM32L4_ADC_TR1_OFFSET, regval);
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/* Ensure analog watchdog is enabled */
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adc_wdog_enable(priv);
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}
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break;
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default:
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aerr("ERROR: Unknown cmd: %d\n", cmd);
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ret = -ENOTTY;
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@ -58,9 +58,15 @@
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#define ANIOC_TRIGGER _ANIOC(0x0001) /* Trigger one conversion
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* IN: None
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* OUT: None */
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#define ANIOC_WDOG_UPPER _ANIOC(0x0002) /* Set upper threshold for watchdog
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* IN: Threshold value
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* OUT: None */
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#define ANIOC_WDOG_LOWER _ANIOC(0x0003) /* Set lower threshold for watchdog
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* IN: Threshold value
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* OUT: None */
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#define AN_FIRST 0x0001 /* First common command */
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#define AN_NCMDS 1 /* Two common commands */
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#define AN_NCMDS 3 /* Number of common commands */
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/* User defined ioctl commands are also supported. These will be forwarded
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* by the upper-half QE driver to the lower-half QE driver via the ioctl()
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@ -69,7 +75,7 @@
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* command numbers from overlapping.
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*/
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/* See include/nuttx/sensors/ads1242.h */
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/* See include/nuttx/analog/ads1242.h */
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#define AN_ADS2142_FIRST (AN_FIRST + AN_NCMDS)
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#define AN_ADS2142_NCMDS 6
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@ -1,5 +1,5 @@
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/****************************************************************************
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* include/nuttx/input/ioctl.h
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* include/nuttx/sensors/ioctl.h
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Alan Carvalho de Assis <acassis@gmail.com>
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