STM32 QEncoder: Add support for STM32F30xxx
This commit is contained in:
Paul A. Patience
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cd8d37f46b
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377d29f1a1
@ -6182,6 +6182,108 @@ menu "QEncoder Driver"
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depends on QENCODER
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depends on STM32_TIM1 || STM32_TIM2 || STM32_TIM3 || STM32_TIM4 || STM32_TIM5 || STM32_TIM8
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config STM32_TIM1_QE
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bool "TIM1"
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default n
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depends on STM32_TIM1
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---help---
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Reserve TIM1 for use by QEncoder.
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if STM32_TIM1_QE
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config STM32_TIM1_QECLKOUT
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int "TIM1 output clock"
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default 2800000
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---help---
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The output clock of TIM1.
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endif
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config STM32_TIM2_QE
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bool "TIM2"
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default n
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depends on STM32_TIM2
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---help---
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Reserve TIM2 for use by QEncoder.
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if STM32_TIM2_QE
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config STM32_TIM2_QECLKOUT
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int "TIM2 output clock"
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default 2800000
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---help---
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The output clock of TIM2.
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endif
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config STM32_TIM3_QE
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bool "TIM3"
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default n
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depends on STM32_TIM3
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---help---
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Reserve TIM3 for use by QEncoder.
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if STM32_TIM3_QE
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config STM32_TIM3_QECLKOUT
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int "TIM3 output clock"
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default 2800000
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---help---
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The output clock of TIM3.
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endif
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config STM32_TIM4_QE
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bool "TIM4"
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default n
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depends on STM32_TIM4
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---help---
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Reserve TIM4 for use by QEncoder.
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if STM32_TIM4_QE
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config STM32_TIM4_QECLKOUT
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int "TIM4 output clock"
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default 2800000
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---help---
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The output clock of TIM4.
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endif
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config STM32_TIM5_QE
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bool "TIM5"
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default n
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depends on STM32_TIM5
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---help---
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Reserve TIM5 for use by QEncoder.
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if STM32_TIM5_QE
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config STM32_TIM5_QECLKOUT
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int "TIM5 output clock"
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default 2800000
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---help---
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The output clock of TIM5.
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endif
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config STM32_TIM8_QE
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bool "TIM8"
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default n
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depends on STM32_TIM8
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---help---
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Reserve TIM8 for use by QEncoder.
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if STM32_TIM8_QE
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config STM32_TIM8_QECLKOUT
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int "TIM8 output clock"
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default 2800000
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---help---
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The output clock of TIM8.
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endif
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config STM32_QENCODER_FILTER
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bool "Enable filtering on STM32 QEncoder input"
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default y
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@ -93,11 +93,12 @@
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#endif
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/* Timers ***************************************************************************/
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/* On the F1 series, all timers are 16-bit. */
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#undef HAVE_32BIT_TIMERS
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#undef HAVE_16BIT_TIMERS
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/* On the F1 series, all timers are 16-bit. */
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#if defined(CONFIG_STM32_STM32F10XX)
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# define HAVE_16BIT_TIMERS 1
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@ -111,6 +112,33 @@
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# define TIM5_BITWIDTH 16
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# define TIM8_BITWIDTH 16
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/* On the F3 series, TIM5 is 32-bit. All of the rest are 16-bit */
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#elif defined(CONFIG_STM32_STM32F30XX)
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/* If TIM5 is enabled, then we have 32-bit timers */
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# if defined(CONFIG_STM32_TIM5_QE)
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# define HAVE_32BIT_TIMERS 1
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# endif
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/* If TIM1,2,3,4, or 8 are enabled, then we have 16-bit timers */
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# if defined(CONFIG_STM32_TIM1_QE) || defined(CONFIG_STM32_TIM2_QE) || \
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defined(CONFIG_STM32_TIM3_QE) || defined(CONFIG_STM32_TIM4_QE) || \
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defined(CONFIG_STM32_TIM8_QE)
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# define HAVE_16BIT_TIMERS 1
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# endif
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/* The width in bits of each timer */
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# define TIM1_BITWIDTH 16
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# define TIM2_BITWIDTH 16
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# define TIM3_BITWIDTH 16
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# define TIM4_BITWIDTH 16
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# define TIM5_BITWIDTH 32
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# define TIM8_BITWIDTH 16
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/* On the F4 series, TIM2 and TIM5 are 32-bit. All of the rest are 16-bit */
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#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
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@ -146,6 +174,7 @@
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#endif
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/* Input filter *********************************************************************/
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#ifdef CONFIG_STM32_QENCODER_FILTER
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# if defined(CONFIG_STM32_QENCODER_SAMPLE_FDTS)
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# if defined(CONFIG_STM32_QENCODER_SAMPLE_EVENT_1)
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@ -204,6 +233,17 @@
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# define STM32_QENCODER_ICF GTIM_CCMR_ICF_NOFILT
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#endif
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#if defined(CONFIG_STM32_STM32F10XX)
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# define STM32_GPIO_INPUT_FLOAT (GPIO_INPUT | GPIO_CNF_INFLOAT | \
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GPIO_MODE_INPUT)
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#elif defined(CONFIG_STM32_STM32F20XX) || \
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defined(CONFIG_STM32_STM32F30XX) || \
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defined(CONFIG_STM32_STM32F40XX)
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# define STM32_GPIO_INPUT_FLOAT (GPIO_INPUT | GPIO_FLOAT);
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#else
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# error "Unrecognized STM32 chip"
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#endif
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/* Debug ****************************************************************************/
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/* Non-standard debug that may be enabled just for testing the quadrature encoder */
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@ -234,12 +274,12 @@ struct stm32_qeconfig_s
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#ifdef HAVE_MIXEDWIDTH_TIMERS
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uint8_t width; /* Timer width (16- or 32-bits) */
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#endif
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#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
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uint32_t ti1cfg; /* TI1 input pin configuration (20-bit encoding) */
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uint32_t ti2cfg; /* TI2 input pin configuration (20-bit encoding) */
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#else
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#ifdef CONFIG_STM32_STM32F10XX
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uint16_t ti1cfg; /* TI1 input pin configuration (16-bit encoding) */
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uint16_t ti2cfg; /* TI2 input pin configuration (16-bit encoding) */
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#else
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uint32_t ti1cfg; /* TI1 input pin configuration (20-bit encoding) */
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uint32_t ti2cfg; /* TI2 input pin configuration (20-bit encoding) */
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#endif
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uint32_t base; /* Register base address */
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uint32_t psc; /* Timer input clock prescaler */
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@ -272,13 +312,13 @@ struct stm32_lowerhalf_s
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************************************************************************************/
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/* Helper functions */
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static uint16_t stm32_getreg16(struct stm32_lowerhalf_s *priv, int offset);
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static void stm32_putreg16(struct stm32_lowerhalf_s *priv, int offset, uint16_t value);
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static uint16_t stm32_getreg16(FAR struct stm32_lowerhalf_s *priv, int offset);
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static void stm32_putreg16(FAR struct stm32_lowerhalf_s *priv, int offset, uint16_t value);
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static uint32_t stm32_getreg32(FAR struct stm32_lowerhalf_s *priv, int offset);
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static void stm32_putreg32(FAR struct stm32_lowerhalf_s *priv, int offset, uint32_t value);
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#if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_VERBOSE)
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static void stm32_dumpregs(struct stm32_lowerhalf_s *priv, FAR const char *msg);
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static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv, FAR const char *msg);
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#else
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# define stm32_dumpregs(priv,msg)
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#endif
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@ -313,7 +353,7 @@ static int stm32_tim8interrupt(int irq, FAR void *context);
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static int stm32_setup(FAR struct qe_lowerhalf_s *lower);
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static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower);
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static int stm32_position(FAR struct qe_lowerhalf_s *lower, int32_t *pos);
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static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos);
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static int stm32_reset(FAR struct qe_lowerhalf_s *lower);
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static int stm32_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, unsigned long arg);
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@ -528,7 +568,7 @@ static uint16_t stm32_getreg16(struct stm32_lowerhalf_s *priv, int offset)
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*
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************************************************************************************/
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static void stm32_putreg16(struct stm32_lowerhalf_s *priv, int offset, uint16_t value)
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static void stm32_putreg16(FAR struct stm32_lowerhalf_s *priv, int offset, uint16_t value)
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{
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putreg16(value, priv->config->base + offset);
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}
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@ -592,7 +632,7 @@ static void stm32_putreg32(FAR struct stm32_lowerhalf_s *priv, int offset, uint3
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****************************************************************************/
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#if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_VERBOSE)
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static void stm32_dumpregs(struct stm32_lowerhalf_s *priv, FAR const char *msg)
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static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv, FAR const char *msg)
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{
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snvdbg("%s:\n", msg);
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snvdbg(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
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@ -615,8 +655,8 @@ static void stm32_dumpregs(struct stm32_lowerhalf_s *priv, FAR const char *msg)
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stm32_getreg16(priv, STM32_GTIM_CCR2_OFFSET),
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stm32_getreg16(priv, STM32_GTIM_CCR3_OFFSET),
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stm32_getreg16(priv, STM32_GTIM_CCR4_OFFSET));
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#if defined(CONFIG_STM32_TIM1_QENCODER) || defined(CONFIG_STM32_TIM8_QENCODER)
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if (priv->timtype == TIMTYPE_ADVANCED)
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#if defined(CONFIG_STM32_TIM1_QE) || defined(CONFIG_STM32_TIM8_QE)
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if (priv->config->timid == 1 || priv->config->timid == 8)
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{
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snvdbg(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
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stm32_getreg16(priv, STM32_ATIM_RCR_OFFSET),
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@ -819,7 +859,7 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
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stm32_putreg32(priv, STM32_GTIM_ARR_OFFSET, 0xffff);
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#endif
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/* Set the timerp rescaler value. The clock input value (CLKIN) is based on the
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/* Set the timer prescaler value. The clock input value (CLKIN) is based on the
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* peripheral clock (PCLK) and a multiplier. These CLKIN values are provided in
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* the board.h file. The prescaler value is then that CLKIN value divided by the
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* configured CLKOUT value (minus one)
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@ -837,7 +877,7 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
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#endif
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/* Generate an update event to reload the Prescaler
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* and the repetition counter(only for TIM1 and TIM8) value immediatly
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* and the repetition counter (only for TIM1 and TIM8) value immediately
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*/
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stm32_putreg16(priv, STM32_GTIM_EGR_OFFSET, GTIM_EGR_UG);
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@ -1090,29 +1130,15 @@ static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower)
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/* Put the TI1 GPIO pin back to its default state */
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pincfg = priv->config->ti1cfg & (GPIO_PORT_MASK | GPIO_PIN_MASK);
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#if defined(CONFIG_STM32_STM32F10XX)
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pincfg |= (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT);
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#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
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pincfg |= (GPIO_INPUT | GPIO_FLOAT);
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#else
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# error "Unrecognized STM32 chip"
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#endif
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pincfg = priv->config->ti1cfg & (GPIO_PORT_MASK | GPIO_PIN_MASK);
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pincfg |= STM32_GPIO_INPUT_FLOAT;
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stm32_configgpio(pincfg);
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/* Put the TI2 GPIO pin back to its default state */
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pincfg = priv->config->ti2cfg & (GPIO_PORT_MASK | GPIO_PIN_MASK);
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#if defined(CONFIG_STM32_STM32F10XX)
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pincfg |= (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT);
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#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
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pincfg |= (GPIO_INPUT | GPIO_FLOAT);
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#else
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# error "Unrecognized STM32 chip"
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#endif
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pincfg = priv->config->ti2cfg & (GPIO_PORT_MASK | GPIO_PIN_MASK);
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pincfg |= STM32_GPIO_INPUT_FLOAT;
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stm32_configgpio(pincfg);
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return -ENOSYS;
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@ -1126,7 +1152,7 @@ static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower)
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*
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************************************************************************************/
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static int stm32_position(FAR struct qe_lowerhalf_s *lower, int32_t *pos)
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static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos)
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{
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FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
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#ifdef HAVE_16BIT_TIMERS
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