arch/arm/src/tiva/hardware/: Add AON IOC header file.
This commit is contained in:
Gregory Nutt
parent
c137c6ef1f
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379a3b4bd5
102
arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_ioc.h
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arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_ioc.h
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/********************************************************************************************************************
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* arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_ioc.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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*
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* Technical content derives from a TI header file that has a compatible BSD license:
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*
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* Copyright (c) 2015-2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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********************************************************************************************************************/
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#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AON_IOC_H
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#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AON_IOC_H
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/********************************************************************************************************************
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* Included Files
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********************************************************************************************************************/
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#include <nuttx/config.h>
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#include "hardware/tiva_memorymap.h"
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/********************************************************************************************************************
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* Pre-processor Definitions
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********************************************************************************************************************/
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/* FCFG1 Register Offsets *******************************************************************************************/
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#define TIVA_AON_IOC_IOSTRMIN_OFFSET 0x0000
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#define TIVA_AON_IOC_IOSTRMED_OFFSET 0x0004
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#define TIVA_AON_IOC_IOSTRMAX_OFFSET 0x0008
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#define TIVA_AON_IOC_IOCLATCH_OFFSET 0x000c /* IO Latch Control */
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#define TIVA_AON_IOC_CLK32KCTL_OFFSET 0x0010 /* SCLK_LF External Output Control */
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#define TIVA_AON_IOC_TCKCTL_OFFSET 0x0014 /* TCK IO Pin Control */
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/* FCFG1 Register Addresses *****************************************************************************************/
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#define TIVA_AON_IOC_IOSTRMIN (TIVA_TIVA_AON_IOC_BASE + TIVA_AON_IOC_IOSTRMIN_OFFSET)
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#define TIVA_AON_IOC_IOSTRMED (TIVA_TIVA_AON_IOC_BASE + TIVA_AON_IOC_IOSTRMED_OFFSET)
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#define TIVA_AON_IOC_IOSTRMAX (TIVA_TIVA_AON_IOC_BASE + TIVA_AON_IOC_IOSTRMAX_OFFSET)
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#define TIVA_AON_IOC_IOCLATCH (TIVA_TIVA_AON_IOC_BASE + TIVA_AON_IOC_IOCLATCH_OFFSET)
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#define TIVA_AON_IOC_CLK32KCTL (TIVA_TIVA_AON_IOC_BASE + TIVA_AON_IOC_CLK32KCTL_OFFSET)
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/* FCFG1 Register Offsets *******************************************************************************************/
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/* TIVA_AON_IOC_IOSTRMIN */
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#define AON_IOC_IOSTRMIN_GRAY_CODE_SHIFT (0) /* Bits 0-2: Gray code */
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#define AON_IOC_IOSTRMIN_GRAY_CODE_MASK (7 << AON_IOC_IOSTRMIN_GRAY_CODE_SHIFT)
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# define AON_IOC_IOSTRMIN_GRAY_CODE(n) ((uint32_t)(n) << xx)
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/* TIVA_AON_IOC_IOSTRMED */
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#define AON_IOC_IOSTRMED_GRAY_CODE_SHIFT (0) /* Bits 0-2: Gray code */
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#define AON_IOC_IOSTRMED_GRAY_CODE_MASK (7 << AON_IOC_IOSTRMED_GRAY_CODE_SHIFT)
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# define AON_IOC_IOSTRMED_GRAY_CODE(n) ((uint32_t)(n) << xx)
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/* TIVA_AON_IOC_IOSTRMAX */
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#define AON_IOC_IOSTRMAX_GRAY_CODE_SHIFT (0) /* Bits 0-2: Gray code */
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#define AON_IOC_IOSTRMAX_GRAY_CODE_MASK (7 << AON_IOC_IOSTRMAX_GRAY_CODE_SHIFT)
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# define AON_IOC_IOSTRMAX_GRAY_CODE(n) ((uint32_t)(n) << xx)
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/* TIVA_AON_IOC_IOCLATCH */
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#define AON_IOC_IOCLATCH_EN (1 << 0) /* Bit 0: Controls latches between MCU IOC and AON_IOC */
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# define AON_IOC_IOCLATCH_EN_STATIC (0)
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# define AON_IOC_IOCLATCH_EN_TRANSP AON_IOC_IOCLATCH_EN
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/* TIVA_AON_IOC_CLK32KCTL */
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#define AON_IOC_CLK32KCTL_OE_N (1 << 0) /* Bit 0: Output enable */
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#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AON_IOC_H */
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107
arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_ioc.h
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arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_ioc.h
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/********************************************************************************************************************
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* arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_ioc.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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*
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* Technical content derives from a TI header file that has a compatible BSD license:
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*
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* Copyright (c) 2015-2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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||||
* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in
|
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
|
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* without specific prior written permission.
|
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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********************************************************************************************************************/
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#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_AON_IOC_H
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#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_AON_IOC_H
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/********************************************************************************************************************
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* Included Files
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********************************************************************************************************************/
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#include <nuttx/config.h>
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#include "hardware/tiva_memorymap.h"
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/********************************************************************************************************************
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* Pre-processor Definitions
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********************************************************************************************************************/
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/* FCFG1 Register Offsets *******************************************************************************************/
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#define TIVA_AON_IOC_IOSTRMIN_OFFSET 0x0000
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#define TIVA_AON_IOC_IOSTRMED_OFFSET 0x0004
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#define TIVA_AON_IOC_IOSTRMAX_OFFSET 0x0008
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#define TIVA_AON_IOC_IOCLATCH_OFFSET 0x000c /* IO Latch Control */
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#define TIVA_AON_IOC_CLK32KCTL_OFFSET 0x0010 /* SCLK_LF External Output Control */
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#define TIVA_AON_IOC_TCKCTL_OFFSET 0x0014 /* TCK IO Pin Control */
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/* FCFG1 Register Addresses *****************************************************************************************/
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#define TIVA_AON_IOC_IOSTRMIN (TIVA_TIVA_AON_IOC_BASE + TIVA_AON_IOC_IOSTRMIN_OFFSET)
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#define TIVA_AON_IOC_IOSTRMED (TIVA_TIVA_AON_IOC_BASE + TIVA_AON_IOC_IOSTRMED_OFFSET)
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#define TIVA_AON_IOC_IOSTRMAX (TIVA_TIVA_AON_IOC_BASE + TIVA_AON_IOC_IOSTRMAX_OFFSET)
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#define TIVA_AON_IOC_IOCLATCH (TIVA_TIVA_AON_IOC_BASE + TIVA_AON_IOC_IOCLATCH_OFFSET)
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#define TIVA_AON_IOC_CLK32KCTL (TIVA_TIVA_AON_IOC_BASE + TIVA_AON_IOC_CLK32KCTL_OFFSET)
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#define TIVA_AON_IOC_TCKCTL (TIVA_TIVA_AON_IOC_BASE + TIVA_AON_IOC_TCKCTL_OFFSET)
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/* FCFG1 Register Offsets *******************************************************************************************/
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/* TIVA_AON_IOC_IOSTRMIN */
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#define AON_IOC_IOSTRMIN_GRAY_CODE_SHIFT (0) /* Bits 0-2: Gray code */
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#define AON_IOC_IOSTRMIN_GRAY_CODE_MASK (7 << AON_IOC_IOSTRMIN_GRAY_CODE_SHIFT)
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# define AON_IOC_IOSTRMIN_GRAY_CODE(n) ((uint32_t)(n) << xx)
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/* TIVA_AON_IOC_IOSTRMED */
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#define AON_IOC_IOSTRMED_GRAY_CODE_SHIFT (0) /* Bits 0-2: Gray code */
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#define AON_IOC_IOSTRMED_GRAY_CODE_MASK (7 << AON_IOC_IOSTRMED_GRAY_CODE_SHIFT)
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# define AON_IOC_IOSTRMED_GRAY_CODE(n) ((uint32_t)(n) << xx)
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/* TIVA_AON_IOC_IOSTRMAX */
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#define AON_IOC_IOSTRMAX_GRAY_CODE_SHIFT (0) /* Bits 0-2: Gray code */
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#define AON_IOC_IOSTRMAX_GRAY_CODE_MASK (7 << AON_IOC_IOSTRMAX_GRAY_CODE_SHIFT)
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# define AON_IOC_IOSTRMAX_GRAY_CODE(n) ((uint32_t)(n) << xx)
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/* TIVA_AON_IOC_IOCLATCH */
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#define AON_IOC_IOCLATCH_EN (1 << 0) /* Bit 0: Controls latches between MCU IOC and AON_IOC */
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# define AON_IOC_IOCLATCH_EN_STATIC (0)
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# define AON_IOC_IOCLATCH_EN_TRANSP AON_IOC_IOCLATCH_EN
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/* TIVA_AON_IOC_CLK32KCTL */
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#define AON_IOC_CLK32KCTL_OE_N (1 << 0) /* Bit 0: Output enable */
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/* TIVA_AON_IOC_TCKCTL */
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#define AON_IOC_TCKCTL_EN (1 << 0) /* Bit 0: TCK input driver enable */
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#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_AON_IOC_H */
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