SAMA5D3/4: More renaming. Change SAMA5D3 EMAC to EMACA and SAMA5D4 to EMACB so that the configuration and build system can configure them. I might come up with something better later
This commit is contained in:
Gregory Nutt
parent
348e666278
commit
379f516780
@ -85,7 +85,7 @@
|
||||
#define SAM_PID_UHPHS (32) /* USB Host High Speed */
|
||||
#define SAM_PID_UDPHS (33) /* USB Device High Speed */
|
||||
#define SAM_PID_GMAC (34) /* Gigabit Ethernet MAC */
|
||||
#define SAM_PID_EMAC0 (35) /* Ethernet MAC 0 */
|
||||
#define SAM_PID_EMAC (35) /* Ethernet MAC */
|
||||
#define SAM_PID_LCDC (36) /* LCD Controller */
|
||||
#define SAM_PID_ISI (37) /* Image Sensor Interface */
|
||||
#define SAM_PID_SSC0 (38) /* Synchronous Serial Controller 0 */
|
||||
@ -139,7 +139,7 @@
|
||||
#define SAM_IRQ_UHPHS SAM_PID_UHPHS /* USB Host High Speed */
|
||||
#define SAM_IRQ_UDPHS SAM_PID_UDPHS /* USB Device High Speed */
|
||||
#define SAM_IRQ_GMAC SAM_PID_GMAC /* Gigabit Ethernet MAC */
|
||||
#define SAM_IRQ_EMAC0 SAM_PID_EMAC /* Ethernet MAC 0 */
|
||||
#define SAM_IRQ_EMAC SAM_PID_EMAC /* Ethernet MAC */
|
||||
#define SAM_IRQ_LCDC SAM_PID_LCDC /* LCD Controller */
|
||||
#define SAM_IRQ_ISI SAM_PID_ISI /* Image Sensor Interface */
|
||||
#define SAM_IRQ_SSC0 SAM_PID_SSC0 /* Synchronous Serial Controller 0 */
|
||||
|
||||
@ -61,11 +61,11 @@ config SAMA5_HAVE_GMAC
|
||||
bool
|
||||
default n
|
||||
|
||||
config SAMA5_HAVE_EMAC
|
||||
config SAMA5_HAVE_EMACA
|
||||
bool
|
||||
default n
|
||||
|
||||
config SAMA5_HAVE_EMAC0
|
||||
config SAMA5_HAVE_EMACB
|
||||
bool
|
||||
default n
|
||||
|
||||
@ -120,7 +120,7 @@ config ARCH_CHIP_SAMA5D4
|
||||
bool
|
||||
default n
|
||||
select SAMA5_HAVE_AESB
|
||||
select SAMA5_HAVE_EMAC0
|
||||
select SAMA5_HAVE_EMACB
|
||||
select SAMA5_HAVE_EMAC1
|
||||
select SAMA5_HAVE_ICM
|
||||
select SAMA5_HAVE_LCDC
|
||||
@ -145,7 +145,7 @@ choice
|
||||
config ARCH_CHIP_ATSAMA5D31
|
||||
bool "Atmel ATSAMA5D31"
|
||||
select ARCH_CHIP_SAMA5D3
|
||||
select SAMA5_HAVE_EMAC
|
||||
select SAMA5_HAVE_EMACA
|
||||
select SAMA5_HAVE_HSMCI2
|
||||
select SAMA5_HAVE_LCDC
|
||||
select SAMA5_HAVE_UART0
|
||||
@ -172,7 +172,7 @@ config ARCH_CHIP_ATSAMA5D34
|
||||
config ARCH_CHIP_ATSAMA5D35
|
||||
bool "Atmel ATSAMA5D35"
|
||||
select ARCH_CHIP_SAMA5D3
|
||||
select SAMA5_HAVE_EMAC
|
||||
select SAMA5_HAVE_EMACA
|
||||
select SAMA5_HAVE_GMAC
|
||||
select SAMA5_HAVE_HSMCI2
|
||||
select SAMA5_HAVE_UART0
|
||||
@ -185,7 +185,7 @@ config ARCH_CHIP_ATSAMA5D35
|
||||
config ARCH_CHIP_ATSAMA5D36
|
||||
bool "Atmel ATSAMA5D356"
|
||||
select ARCH_CHIP_SAMA5D3
|
||||
select SAMA5_HAVE_EMAC
|
||||
select SAMA5_HAVE_EMACA
|
||||
select SAMA5_HAVE_GMAC
|
||||
select SAMA5_HAVE_HSMCI2
|
||||
select SAMA5_HAVE_LCDC
|
||||
@ -422,24 +422,30 @@ config SAMA5_GMAC
|
||||
select NETDEVICES
|
||||
select ARCH_HAVE_PHY
|
||||
|
||||
config SAMA5_EMAC
|
||||
bool "10/100MBps Ethernet MAC (EMAC0)"
|
||||
config SAMA5_EMACA
|
||||
bool "10/100MBps Ethernet MAC (EMAC)"
|
||||
default n
|
||||
depends on SAMA5_HAVE_EMAC
|
||||
depends on SAMA5_HAVE_EMACA
|
||||
select NETDEVICES
|
||||
select ARCH_HAVE_PHY
|
||||
|
||||
config SAMA5_EMACB
|
||||
bool
|
||||
default n
|
||||
|
||||
config SAMA5_EMAC0
|
||||
bool "10/100MBps Ethernet MAC (EMAC0)"
|
||||
default n
|
||||
depends on SAMA5_HAVE_EMAC0
|
||||
depends on SAMA5_HAVE_EMACB
|
||||
select SAMA5_EMACB
|
||||
select NETDEVICES
|
||||
select ARCH_HAVE_PHY
|
||||
|
||||
config SAMA5_EMAC1
|
||||
bool "10/100MBps Ethernet MAC (EMAC1)"
|
||||
default n
|
||||
depends on SAMA5_HAVE_EMAC1
|
||||
depends on SAMA5_HAVE_EMACB && SAMA5_HAVE_EMAC1
|
||||
select SAMA5_EMACB
|
||||
select NETDEVICES
|
||||
select ARCH_HAVE_PHY
|
||||
|
||||
@ -1157,7 +1163,7 @@ config SAMA5_GMAC_REGDEBUG
|
||||
endmenu # GMAC device driver options
|
||||
endif # SAMA5_GMAC
|
||||
|
||||
if SAMA5_EMAC
|
||||
if SAMA5_EMACA
|
||||
|
||||
menu "EMAC device driver options"
|
||||
|
||||
@ -1326,7 +1332,7 @@ config SAMA5_EMAC_PHYSR_100FD
|
||||
This must be provided if SAMA5_EMAC_AUTONEG is defined. This is the value
|
||||
under the bit mask that represents the 100Mbps, full duplex setting.
|
||||
|
||||
config SAMA5_EMAC_REGDEBUG
|
||||
config SAMA5_EMACA_REGDEBUG
|
||||
bool "Register-Level Debug"
|
||||
default n
|
||||
depends on DEBUG
|
||||
@ -1334,8 +1340,9 @@ config SAMA5_EMAC_REGDEBUG
|
||||
Enable very low-level register access debug. Depends on DEBUG.
|
||||
|
||||
endmenu # EMAC device driver options
|
||||
endif # SAMA5_EMAC
|
||||
endif # SAMA5_EMACA
|
||||
|
||||
if SAMA5_EMACB
|
||||
if SAMA5_EMAC0
|
||||
|
||||
menu "EMAC0 device driver options"
|
||||
@ -1359,20 +1366,6 @@ config SAMA5_EMAC0_NTXBUFFERS
|
||||
that can be in flight. This is also equal to the number of TX
|
||||
descriptors that will be allocated.
|
||||
|
||||
config SAMA5_EMAC0_PREALLOCATE
|
||||
bool "Preallocate buffers"
|
||||
default n
|
||||
---help---
|
||||
Buffer an descriptor many may either be allocated from the memory
|
||||
pool or pre-allocated to lie in .bss. This options selected pre-
|
||||
allocated buffer memory.
|
||||
|
||||
config SAMA5_EMAC0_NBC
|
||||
bool "Disable Broadcast"
|
||||
default n
|
||||
---help---
|
||||
Select to disable receipt of broadcast packets.
|
||||
|
||||
config SAMA5_EMAC0_PHYADDR
|
||||
int "PHY address"
|
||||
default 1
|
||||
@ -1532,13 +1525,6 @@ config SAMA5_EMAC0_PHYSR_100FD
|
||||
This must be provided if SAMA5_EMAC0_AUTONEG is defined. This is the value
|
||||
under the bit mask that represents the 100Mbps, full duplex setting.
|
||||
|
||||
config SAMA5_EMAC0_REGDEBUG
|
||||
bool "Register-Level Debug"
|
||||
default n
|
||||
depends on DEBUG
|
||||
---help---
|
||||
Enable very low-level register access debug. Depends on DEBUG.
|
||||
|
||||
endmenu # EMAC0 device driver options
|
||||
endif # SAMA5_EMAC0
|
||||
|
||||
@ -1565,20 +1551,6 @@ config SAMA5_EMAC1_NTXBUFFERS
|
||||
that can be in flight. This is also equal to the number of TX
|
||||
descriptors that will be allocated.
|
||||
|
||||
config SAMA5_EMAC1_PREALLOCATE
|
||||
bool "Preallocate buffers"
|
||||
default n
|
||||
---help---
|
||||
Buffer an descriptor many may either be allocated from the memory
|
||||
pool or pre-allocated to lie in .bss. This options selected pre-
|
||||
allocated buffer memory.
|
||||
|
||||
config SAMA5_EMAC1_NBC
|
||||
bool "Disable Broadcast"
|
||||
default n
|
||||
---help---
|
||||
Select to disable receipt of broadcast packets.
|
||||
|
||||
config SAMA5_EMAC1_PHYADDR
|
||||
int "PHY address"
|
||||
default 1
|
||||
@ -1738,27 +1710,45 @@ config SAMA5_EMAC1_PHYSR_100FD
|
||||
This must be provided if SAMA5_EMAC1_AUTONEG is defined. This is the value
|
||||
under the bit mask that represents the 100Mbps, full duplex setting.
|
||||
|
||||
config SAMA5_EMAC1_REGDEBUG
|
||||
endmenu # EMAC1 device driver options
|
||||
endif # SAMA5_EMAC1
|
||||
|
||||
# These apply to both EMAC0 and EMAC1
|
||||
|
||||
config SAMA5_EMACB_PREALLOCATE
|
||||
bool "Preallocate buffers"
|
||||
default n
|
||||
---help---
|
||||
Buffer an descriptor many may either be allocated from the memory
|
||||
pool or pre-allocated to lie in .bss. This options selected pre-
|
||||
allocated buffer memory.
|
||||
|
||||
config SAMA5_EMACB_NBC
|
||||
bool "Disable Broadcast"
|
||||
default n
|
||||
---help---
|
||||
Select to disable receipt of broadcast packets.
|
||||
|
||||
config SAMA5_EMACB_REGDEBUG
|
||||
bool "Register-Level Debug"
|
||||
default n
|
||||
depends on DEBUG
|
||||
---help---
|
||||
Enable very low-level register access debug. Depends on DEBUG.
|
||||
|
||||
endmenu # EMAC1 device driver options
|
||||
endif # SAMA5_EMAC1
|
||||
endif # SAMA5_EMACB
|
||||
|
||||
if SAMA5_EMAC || SAMA5_EMAC0 || SAMA5_EMAC1 || SAMA5_GMAC
|
||||
if SAMA5_EMACA || SAMA5_EMAC0 || SAMA5_EMAC1 || SAMA5_GMAC
|
||||
choice
|
||||
prompt "Which device is eth0"
|
||||
default SAMA5_GMAC_ISETH0 if SAMA5_GMAC
|
||||
default SAMA5_EMAC_ISETH0 if SAMA5_EMAC && !SAMA5_GMAC
|
||||
default SAMA5_EMAC_ISETH0 if SAMA5_EMACA && !SAMA5_GMAC
|
||||
default SAMA5_EMAC0_ISETH0 if SAMA5_EMAC0 && !SAM_EMAC && !SAMA5_GMAC
|
||||
default SAMA5_EMAC1_ISETH0 if SAMA5_EMAC1 && !SAM_EMAC && !SAMA5_EMAC0 && !SAMA5_GMAC
|
||||
|
||||
config SAMA5_EMAC_ISETH0
|
||||
bool "EMAC is eth0"
|
||||
depends on SAMA5_EMAC
|
||||
depends on SAMA5_EMACA
|
||||
|
||||
config SAMA5_EMAC0_ISETH0
|
||||
bool "EMAC0 is eth0"
|
||||
|
||||
@ -190,8 +190,11 @@ endif
|
||||
|
||||
ifeq ($(CONFIG_NET),y)
|
||||
CHIP_CSRCS += sam_ethernet.c
|
||||
ifeq ($(CONFIG_SAMA5_EMAC),y)
|
||||
CHIP_CSRCS += sam_emac.c
|
||||
ifeq ($(CONFIG_SAMA5_EMACA),y)
|
||||
CHIP_CSRCS += sam_emaca.c
|
||||
endif
|
||||
ifeq ($(CONFIG_SAMA5_EMACB),y)
|
||||
CHIP_CSRCS += sam_emacb.c
|
||||
endif
|
||||
ifeq ($(CONFIG_SAMA5_GMAC),y)
|
||||
CHIP_CSRCS += sam_gmac.c
|
||||
|
||||
@ -41,14 +41,11 @@
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <arch/sama5/chip.h>
|
||||
|
||||
#if defined(ATSAMA5D3)
|
||||
# include "chip/sama5d3x_emac.h"
|
||||
#elif defined(ATSAMA5D4)
|
||||
# include "chip/sama5d4x_emac.h"
|
||||
#else
|
||||
# error Unrecognized SAMA5 architecture
|
||||
#if defined(CONFIG_SAMA5_EMACA)
|
||||
# include "chip/sam_emaca.h"
|
||||
#elif defined(CONFIG_SAMA5_EMACB)
|
||||
# include "chip/sam_emacb.h"
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_SAMA5_CHIP_SAM_EMAC_H */
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/sama5/chip/sama5d3x_emac.h
|
||||
* arch/arm/src/sama5/chip/sam_emaca.h
|
||||
* This is the form of the EMAC interface used the the SAMA5D3
|
||||
*
|
||||
* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
@ -33,8 +34,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_SAMA5_CHIP_SAMA5D3X_EMAC_H
|
||||
#define __ARCH_ARM_SRC_SAMA5_CHIP_SAMA5D3X_EMAC_H
|
||||
#ifndef __ARCH_ARM_SRC_SAMA5_CHIP_SAM_EMACA_H
|
||||
#define __ARCH_ARM_SRC_SAMA5_CHIP_SAM_EMACA_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@ -453,4 +454,4 @@ struct emac_txdesc_s
|
||||
uint32_t status; /* TX status and controls */
|
||||
};
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_SAMA5_CHIP_SAMA5D3X_EMAC_H */
|
||||
#endif /* __ARCH_ARM_SRC_SAMA5_CHIP_SAM_EMACA_H */
|
||||
@ -1,5 +1,8 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/sama5/chip/sama5d4x_emac.h
|
||||
* arch/arm/src/sama5/chip/sam_emacb.h
|
||||
* This is the form of the EMAC interface used the the SAMA5D4 (and also the SAM43).
|
||||
* This is referred as GMAC in the documentation even though it does not support
|
||||
* Gibabit Ethernet.
|
||||
*
|
||||
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
@ -33,8 +36,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_SAMA5_CHIP_SAMA5D4X_EMAC_H
|
||||
#define __ARCH_ARM_SRC_SAMA5_CHIP_SAMA5D4X_EMAC_H
|
||||
#ifndef __ARCH_ARM_SRC_SAMA5_CHIP_SAM_EMACB_H
|
||||
#define __ARCH_ARM_SRC_SAMA5_CHIP_SAM_EMACB_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@ -677,4 +680,4 @@ struct emac_txdesc_s
|
||||
uint32_t status; /* TX status and controls */
|
||||
};
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_SAMA5_CHIP_SAMA5D4X_EMAC_H */
|
||||
#endif /* __ARCH_ARM_SRC_SAMA5_CHIP_SAM_EMACB_H */
|
||||
@ -1,5 +1,5 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/sama5/sam_emac.c
|
||||
* arch/arm/src/sama5/sam_emaca.c
|
||||
*
|
||||
* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
@ -78,7 +78,7 @@
|
||||
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#if defined(CONFIG_NET) && defined(CONFIG_SAMA5_EMAC)
|
||||
#if defined(CONFIG_NET) && defined(CONFIG_SAMA5_EMACA)
|
||||
|
||||
/****************************************************************************
|
||||
* Definitions
|
||||
@ -212,7 +212,7 @@
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_DEBUG
|
||||
# undef CONFIG_SAMA5_EMAC_REGDEBUG
|
||||
# undef CONFIG_SAMA5_EMACA_REGDEBUG
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_NET_DUMPPACKET
|
||||
@ -274,7 +274,7 @@ struct sam_emac_s
|
||||
|
||||
/* Debug stuff */
|
||||
|
||||
#ifdef CONFIG_SAMA5_EMAC_REGDEBUG
|
||||
#ifdef CONFIG_SAMA5_EMACA_REGDEBUG
|
||||
bool wrlast; /* Last was a write */
|
||||
uintptr_t addrlast; /* Last address */
|
||||
uint32_t vallast; /* Last value */
|
||||
@ -324,7 +324,7 @@ static uint8_t g_rxbuffer[CONFIG_SAMA5_EMAC_NRXBUFFERS * EMAC_RX_UNITSIZE]
|
||||
****************************************************************************/
|
||||
/* Register operations ******************************************************/
|
||||
|
||||
#if defined(CONFIG_SAMA5_EMAC_REGDEBUG) && defined(CONFIG_DEBUG)
|
||||
#if defined(CONFIG_SAMA5_EMACA_REGDEBUG) && defined(CONFIG_DEBUG)
|
||||
static bool sam_checkreg(struct sam_emac_s *priv, bool wr,
|
||||
uint32_t regval, uintptr_t address);
|
||||
static uint32_t sam_getreg(struct sam_emac_s *priv, uintptr_t addr);
|
||||
@ -415,7 +415,7 @@ static int sam_emac_configure(struct sam_emac_s *priv);
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMA5_EMAC_REGDEBUG
|
||||
#ifdef CONFIG_SAMA5_EMACA_REGDEBUG
|
||||
static bool sam_checkreg(struct sam_emac_s *priv, bool wr, uint32_t regval,
|
||||
uintptr_t address)
|
||||
{
|
||||
@ -461,7 +461,7 @@ static bool sam_checkreg(struct sam_emac_s *priv, bool wr, uint32_t regval,
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMA5_EMAC_REGDEBUG
|
||||
#ifdef CONFIG_SAMA5_EMACA_REGDEBUG
|
||||
static uint32_t sam_getreg(struct sam_emac_s *priv, uintptr_t address)
|
||||
{
|
||||
uint32_t regval = getreg32(address);
|
||||
@ -483,7 +483,7 @@ static uint32_t sam_getreg(struct sam_emac_s *priv, uintptr_t address)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMA5_EMAC_REGDEBUG
|
||||
#ifdef CONFIG_SAMA5_EMACA_REGDEBUG
|
||||
static void sam_putreg(struct sam_emac_s *priv, uintptr_t address,
|
||||
uint32_t regval)
|
||||
{
|
||||
@ -2965,4 +2965,4 @@ errout:
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_NET && CONFIG_SAMA5_EMAC */
|
||||
#endif /* CONFIG_NET && CONFIG_SAMA5_EMACA */
|
||||
@ -1,7 +1,7 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/sama5/sam_ethernet.c
|
||||
*
|
||||
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@ -109,7 +109,7 @@ static inline void up_gmac_initialize(void)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMA5_EMAC
|
||||
#if defined(CONFIG_SAMA5_EMACA) || defined(CONFIG_SAMA5_EMACB)
|
||||
static inline void up_emac_initialize(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
@ -51,8 +51,13 @@
|
||||
************************************************************************************/
|
||||
/* Definitions for use with sam_phy_boardinitialize */
|
||||
|
||||
#define GMAC_INTF 0
|
||||
#define EMAC_INTF 1
|
||||
#if defined(SAMA5_HAVE_EMACA)
|
||||
# define GMAC_INTF 0
|
||||
# define EMAC_INTF 1
|
||||
#elif defined(SAMA5_HAVE_EMACB)
|
||||
# define EMAC0_INTF 0
|
||||
# define EMAC1_INTF 1
|
||||
#endif
|
||||
|
||||
/* Which is ETH0 and which is ETH1? */
|
||||
|
||||
@ -60,10 +65,15 @@
|
||||
# undef CONFIG_SAMA5_GMAC_ISETH0
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_SAMA5_EMAC
|
||||
#ifndef CONFIG_SAMA5_EMACA
|
||||
# undef CONFIG_SAMA5_EMAC_ISETH0
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_SAMA5_EMACB
|
||||
# undef CONFIG_SAMA5_EMAC0_ISETH0
|
||||
# undef CONFIG_SAMA5_EMAC1_ISETH0
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SAMA5_GMAC_ISETH0) && defined(CONFIG_SAMA5_EMAC_ISETH0)
|
||||
# error GMAC and EMAC cannot both be ETH0
|
||||
#endif
|
||||
@ -106,7 +116,7 @@
|
||||
# else
|
||||
# error ETH0 PHY unrecognized
|
||||
# endif
|
||||
#elif defined(CONFIG_SAMA5_EMAC)
|
||||
#elif defined(CONFIG_SAMA5_EMACA)
|
||||
# if defined(CONFIG_ETH1_PHY_DM9161)
|
||||
# define SAMA5_EMAC_PHY_DM9161 1
|
||||
# elif defined(CONFIG_ETH1_PHY_LAN8700)
|
||||
@ -129,7 +139,8 @@
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C" {
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
@ -172,7 +183,7 @@ int sam_gmac_initialize(void);
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SAMA5_EMAC
|
||||
#if defined(CONFIG_SAMA5_EMACA) || defined(CONFIG_SAMA5_EMACB)
|
||||
int sam_emac_initialize(void);
|
||||
#endif
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user