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Centralize definitions associated with CONFIG_DEBUG_TIMER

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This commit is contained in:
Gregory Nutt 2016-06-16 07:16:25 -06:00
parent 6b517ed017
commit 37b9742189
29 changed files with 368 additions and 440 deletions
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30
Kconfig
View File

@ -1276,14 +1276,40 @@ config DEBUG_SPI_INFO
endif # DEBUG_SPI
config DEBUG_TIMER
bool "Timer Debug Output"
bool "Timer Debug Features"
default n
depends on TIMER
---help---
Enable timer debug SYSLOG output (disabled by default).
Enable timer debug features.
Support for this debug option is architecture-specific and may not
be available for some MCUs.
if DEBUG_TIMER
config DEBUG_TIMER_ERROR
bool "Timer Error Output"
default n
depends on DEBUG_ERROR
---help---
Enable timer error output to SYSLOG.
config DEBUG_TIMER_WARN
bool "Timer Warnings Output"
default n
depends on DEBUG_WARN
---help---
Enable timer warning output to SYSLOG.
config DEBUG_TIMER_INFO
bool "Timer Informational Output"
default n
depends on DEBUG_INFO
---help---
Enable timer informational output to SYSLOG.
endif # DEBUG_TIMER
config DEBUG_USB
bool "USB Debug Features"
default n

69
arch/arm/src/efm32/efm32_timer.c
View File

@ -55,49 +55,17 @@
#include "efm32_config.h"
#include "efm32_gpio.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing TIMER */
#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_TIMER
#endif
#ifdef CONFIG_DEBUG_TIMER
# define efm32_timererr err
# define efm32_timerllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define efm32_timerinfo info
# define efm32_timerllinfo llinfo
#ifdef CONFIG_DEBUG_TIMER_INFO
# define efm32_timer_dumpgpio(p,m) efm32_dumpgpio(p,m)
#else
# define efm32_timerllerr(x...)
# define efm32_timerllinfo(x...)
# define efm32_timer_dumpgpio(p,m)
#endif
#else
# define efm32_timererr(x...)
# define efm32_timerllerr(x...)
# define efm32_timerinfo(x...)
# define efm32_timerllinfo(x...)
# define efm32_timer_dumpgpio(p,m)
#endif
/****************************************************************************
* Private Types
****************************************************************************/
/****************************************************************************
* Static Function Prototypes
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
@ -119,48 +87,43 @@
void efm32_timer_dumpregs(uintptr_t base, FAR const char *msg)
{
#ifdef CONFIG_DEBUG_TIMER_INFO
int i;
efm32_timerinfo("%s:\n", msg);
efm32_timerinfo(" CTRL: %04x STATUS: %04x IEN: %04x IF: %04x\n",
tmrinfo("%s:\n", msg);
tmrinfo(" CTRL: %04x STATUS: %04x IEN: %04x IF: %04x\n",
getreg32(base + EFM32_TIMER_CTRL_OFFSET ),
getreg32(base + EFM32_TIMER_STATUS_OFFSET ),
getreg32(base + EFM32_TIMER_IEN_OFFSET ),
getreg32(base + EFM32_TIMER_IF_OFFSET )
);
efm32_timerinfo(" TOP: %04x TOPB: %04x CNT: %04x ROUTE: %04x\n",
getreg32(base + EFM32_TIMER_IF_OFFSET ));
tmrinfo(" TOP: %04x TOPB: %04x CNT: %04x ROUTE: %04x\n",
getreg32(base + EFM32_TIMER_TOP_OFFSET ),
getreg32(base + EFM32_TIMER_TOPB_OFFSET ),
getreg32(base + EFM32_TIMER_CNT_OFFSET ),
getreg32(base + EFM32_TIMER_ROUTE_OFFSET )
);
getreg32(base + EFM32_TIMER_ROUTE_OFFSET ));
for (i = 0; i < EFM32_TIMER_NCC; i++)
{
#if defined(CONFIG_DEBUG_TIMER) && defined(CONFIG_DEBUG_INFO)
uintptr_t base_cc = base + EFM32_TIMER_CC_OFFSET(i);
#endif
efm32_timerinfo("CC%d => CTRL: %04x CCV: %04x CCVP: %04x CCVB: %04x\n",
tmrinfo("CC%d => CTRL: %04x CCV: %04x CCVP: %04x CCVB: %04x\n",
i
getreg32(base_cc + EFM32_TIMER_CC_CTRL_OFFSET ),
getreg32(base_cc + EFM32_TIMER_CC_CCV_OFFSET ),
getreg32(base_cc + EFM32_TIMER_CC_CCVP_OFFSET ),
getreg32(base_cc + EFM32_TIMER_CC_CCVB_OFFSET )
);
getreg32(base_cc + EFM32_TIMER_CC_CCVB_OFFSET ));
}
efm32_timerinfo("DTCTRL: %04x DTTIME: %04x DTFC: %04x DTOGEN: %04x\n",
tmrinfo("DTCTRL: %04x DTTIME: %04x DTFC: %04x DTOGEN: %04x\n",
getreg32(base + EFM32_TIMER_CTRL_OFFSET ),
getreg32(base + EFM32_TIMER_STATUS_OFFSET ),
getreg32(base + EFM32_TIMER_IEN_OFFSET ),
getreg32(base + EFM32_TIMER_IF_OFFSET )
);
efm32_timerinfo("DTFAULT: %04x DTFAULTC: %04x DTLOCK: %04x \n",
getreg32(base + EFM32_TIMER_IF_OFFSET ));
tmrinfo("DTFAULT: %04x DTFAULTC: %04x DTLOCK: %04x \n",
getreg32(base + EFM32_TIMER_CTRL_OFFSET ),
getreg32(base + EFM32_TIMER_STATUS_OFFSET ),
getreg32(base + EFM32_TIMER_IEN_OFFSET ),
getreg32(base + EFM32_TIMER_IF_OFFSET )
);
#endif
}
/****************************************************************************
@ -238,6 +201,7 @@ void efm32_timer_reset(uintptr_t base)
* prescaler setted, -1 in case of error.
*
****************************************************************************/
int efm32_timer_set_freq(uintptr_t base, uint32_t clk_freq, uint32_t freq)
{
int prescaler = 0;
@ -262,8 +226,7 @@ int efm32_timer_set_freq(uintptr_t base, uint32_t clk_freq, uint32_t freq)
reload = (clk_freq / prescaler / freq);
efm32_timererr("Source: %4xHz Div: %4x Reload: %4x \n",
clk_freq, prescaler, reload);
tmrinfo("Source: %4xHz Div: %4x Reload: %4x \n", clk_freq, prescaler, reload);
putreg32(reload, base + EFM32_TIMER_TOP_OFFSET);

14
arch/arm/src/lpc11xx/lpc11_timer.c
View File

@ -449,7 +449,7 @@ static int timer_shutdown(FAR struct pwm_lowerhalf_s *dev)
FAR struct lpc11_timer_s *priv = (FAR struct lpc11_timer_s *)dev;
uint32_t pincfg;
pwmerr("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
pwminfo("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
/* Make sure that the output has been stopped */
@ -505,7 +505,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
uint32_t regval;
irqstate_t flags;
pwmerr("TIM%d\n", priv->timid);
pwminfo("TIM%d\n", priv->timid);
/* Disable interrupts momentary to stop any ongoing timer processing and
* to prevent any concurrent access to the reset register.
@ -531,7 +531,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
leave_critical_section(flags);
pwmerr("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
pwminfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
timer_dumpregs(priv, "After stop");
return OK;
}
@ -555,12 +555,12 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
static int timer_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd,
unsigned long arg)
{
#ifdef CONFIG_DEBUG_TIMER
#ifdef CONFIG_DEBUG_PWM_INFO
FAR struct lpc11_timer_s *priv = (FAR struct lpc11_timer_s *)dev;
/* There are no platform-specific ioctl commands */
pwmerr("TIM%d\n", priv->timid);
pwminfo("TIM%d\n", priv->timid);
#endif
return -ENOTTY;
}
@ -590,7 +590,7 @@ FAR struct pwm_lowerhalf_s *lpc11_timerinitialize(int timer)
{
FAR struct lpc11_timer_s *lower;
pwmerr("TIM%d\n", timer);
pwminfo("TIM%d\n", timer);
switch (timer)
{
@ -604,7 +604,7 @@ FAR struct pwm_lowerhalf_s *lpc11_timerinitialize(int timer)
#endif
default:
pwmerr("No such timer configured\n");
pwmerr("ERROR: No such timer configured\n");
return NULL;
}

14
arch/arm/src/lpc17xx/lpc17_timer.c
View File

@ -450,7 +450,7 @@ static int timer_shutdown(FAR struct pwm_lowerhalf_s *dev)
FAR struct lpc17_timer_s *priv = (FAR struct lpc17_timer_s *)dev;
uint32_t pincfg;
pwmerr("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
pwminfo("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
/* Make sure that the output has been stopped */
@ -506,7 +506,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
uint32_t regval;
irqstate_t flags;
pwmerr("TIM%d\n", priv->timid);
pwminfo("TIM%d\n", priv->timid);
/* Disable interrupts momentary to stop any ongoing timer processing and
* to prevent any concurrent access to the reset register.
@ -532,7 +532,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
leave_critical_section(flags);
pwmerr("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
pwminfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
timer_dumpregs(priv, "After stop");
return OK;
}
@ -555,12 +555,12 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
static int timer_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg)
{
#ifdef CONFIG_DEBUG_TIMER
#ifdef CONFIG_DEBUG_PWM_INFO
FAR struct lpc17_timer_s *priv = (FAR struct lpc17_timer_s *)dev;
/* There are no platform-specific ioctl commands */
pwmerr("TIM%d\n", priv->timid);
pwminfo("TIM%d\n", priv->timid);
#endif
return -ENOTTY;
}
@ -590,7 +590,7 @@ FAR struct pwm_lowerhalf_s *lpc17_timerinitialize(int timer)
{
FAR struct lpc17_timer_s *lower;
pwmerr("TIM%d\n", timer);
pwminfo("TIM%d\n", timer);
switch (timer)
{
@ -604,7 +604,7 @@ FAR struct pwm_lowerhalf_s *lpc17_timerinitialize(int timer)
#endif
default:
pwmerr("No such timer configured\n");
pwmerr("ERROR: No such timer configured\n");
return NULL;
}

12
arch/arm/src/sam34/sam4cm_freerun.c
View File

@ -121,7 +121,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
uint32_t cmr;
int ret;
tcinfo("chan=%d resolution=%d usec\n", chan, resolution);
tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
DEBUGASSERT(freerun && resolution > 0);
/* Get the TC frequency the corresponds to the requested resolution */
@ -133,11 +133,11 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
ret = sam_tc_divisor(frequency, &divisor, &cmr);
if (ret < 0)
{
tcerr("ERROR: sam_tc_divisor failed: %d\n", ret);
tmrerr("ERROR: sam_tc_divisor failed: %d\n", ret);
return ret;
}
tcinfo("frequency=%lu, divisor=%u, cmr=%08lx\n",
tmrinfo("frequency=%lu, divisor=%u, cmr=%08lx\n",
(unsigned long)frequency, (unsigned long)divisor,
(unsigned long)cmr);
@ -172,7 +172,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
freerun->tch = sam_tc_allocate(chan, cmr);
if (!freerun->tch)
{
tcerr("ERROR: Failed to allocate timer channel %d\n", chan);
tmrerr("ERROR: Failed to allocate timer channel %d\n", chan);
return -EBUSY;
}
@ -257,7 +257,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
leave_critical_section(flags);
tcinfo("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
tmrinfo("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
(unsigned long)counter, (unsigned long)verify,
(unsigned long)overflow, (unsigned long)sr);
@ -277,7 +277,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
ts->tv_sec = sec;
ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
tcinfo("usec=%llu ts=(%lu, %lu)\n",
tmrinfo("usec=%llu ts=(%lu, %lu)\n",
usec, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
return OK;

22
arch/arm/src/sam34/sam4cm_oneshot.c
View File

@ -91,7 +91,7 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
oneshot_handler_t oneshot_handler;
void *oneshot_arg;
tcllinfo("Expired...\n");
tmrllinfo("Expired...\n");
DEBUGASSERT(oneshot && oneshot->handler);
/* The clock was stopped, but not disabled when the RC match occurred.
@ -148,7 +148,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
uint32_t cmr;
int ret;
tcinfo("chan=%d resolution=%d usec\n", chan, resolution);
tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
DEBUGASSERT(oneshot && resolution > 0);
/* Get the TC frequency the corresponds to the requested resolution */
@ -160,11 +160,11 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
ret = sam_tc_divisor(frequency, &divisor, &cmr);
if (ret < 0)
{
tcerr("ERROR: sam_tc_divisor failed: %d\n", ret);
tmrerr("ERROR: sam_tc_divisor failed: %d\n", ret);
return ret;
}
tcinfo("frequency=%lu, divisor=%lu, cmr=%08lx\n",
tmrinfo("frequency=%lu, divisor=%lu, cmr=%08lx\n",
(unsigned long)frequency, (unsigned long)divisor,
(unsigned long)cmr);
@ -200,7 +200,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
oneshot->tch = sam_tc_allocate(chan, cmr);
if (!oneshot->tch)
{
tcerr("ERROR: Failed to allocate timer channel %d\n", chan);
tmrerr("ERROR: Failed to allocate timer channel %d\n", chan);
return -EBUSY;
}
@ -258,7 +258,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
uint64_t regval;
irqstate_t flags;
tcinfo("handler=%p arg=%p, ts=(%lu, %lu)\n",
tmrinfo("handler=%p arg=%p, ts=(%lu, %lu)\n",
handler, arg, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
DEBUGASSERT(oneshot && handler && ts);
@ -269,7 +269,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
{
/* Yes.. then cancel it */
tcinfo("Already running... cancelling\n");
tmrinfo("Already running... cancelling\n");
(void)sam_oneshot_cancel(oneshot, freerun, NULL);
}
@ -291,7 +291,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
regval = (usec * (uint64_t)sam_tc_divfreq(oneshot->tch)) / USEC_PER_SEC;
tcinfo("usec=%llu regval=%08llx\n", usec, regval);
tmrinfo("usec=%llu regval=%08llx\n", usec, regval);
DEBUGASSERT(regval <= UINT16_MAX);
/* Set up to receive the callback when the interrupt occurs */
@ -400,7 +400,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
* REVISIT: This does not appear to be the case.
*/
tcinfo("Cancelling...\n");
tmrinfo("Cancelling...\n");
count = sam_tc_getcounter(oneshot->tch);
rc = sam_tc_getregister(oneshot->tch, TC_REGC);
@ -436,7 +436,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
* oneshot timer.
*/
tcinfo("rc=%lu count=%lu usec=%lu\n",
tmrinfo("rc=%lu count=%lu usec=%lu\n",
(unsigned long)rc, (unsigned long)count, (unsigned long)usec);
/* REVISIT: I am not certain why the timer counter value sometimes
@ -481,7 +481,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
ts->tv_nsec = (unsigned long)nsec;
}
tcinfo("remaining (%lu, %lu)\n",
tmrinfo("remaining (%lu, %lu)\n",
(unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
}

26
arch/arm/src/sam34/sam4cm_tc.c
View File

@ -757,7 +757,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
{
/* Timer/counter is not invalid or not enabled */
tcerr("ERROR: Bad channel number: %d\n", channel);
tmrerr("ERROR: Bad channel number: %d\n", channel);
return NULL;
}
@ -770,7 +770,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
{
/* Initialize the channel. */
tcerr("Initializing TC%d\n", chconfig->chan);
tmrerr("ERROR: Initializing TC%d\n", chconfig->chan);
memset(chan, 0, sizeof(struct sam_chan_s));
sem_init(&chan->exclsem, 0, 1);
@ -831,7 +831,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
{
/* No.. return a failure */
tcerr("Channel %d is in-used\n", channel);
tmrerr("ERROR: Channel %d is in-use\n", channel);
sam_givesem(chan);
return NULL;
}
@ -876,7 +876,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
* access to the requested channel.
*/
tcinfo("channel=%d mode=%08x\n", channel, mode);
tmrinfo("channel=%d mode=%08x\n", channel, mode);
chan = sam_tc_initialize(channel);
if (chan)
@ -902,7 +902,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
/* Return an opaque reference to the channel */
tcinfo("Returning %p\n", chan);
tmrinfo("Returning %p\n", chan);
return (TC_HANDLE)chan;
}
@ -924,7 +924,7 @@ void sam_tc_free(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
tcinfo("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
tmrinfo("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
/* Make sure that interrupts are detached and disabled and that the channel
@ -957,7 +957,7 @@ void sam_tc_start(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
tcinfo("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
tmrinfo("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
/* Read the SR to clear any pending interrupts on this channel */
@ -989,7 +989,7 @@ void sam_tc_stop(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
tcinfo("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
tmrinfo("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
sam_chan_putreg(chan, SAM_TC_CCR_OFFSET, TC_CCR_CLKDIS);
@ -1096,7 +1096,7 @@ void sam_tc_setregister(TC_HANDLE handle, int regid, uint32_t regval)
DEBUGASSERT(chan && regid < TC_NREGISTERS);
tcinfo("Channel %d: Set register RC%d to %08lx\n",
tmrinfo("Channel %d: Set register RC%d to %08lx\n",
chan->chan, regid, (unsigned long)regval);
sam_chan_putreg(chan, g_regoffset[regid], regval);
@ -1233,7 +1233,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
uint32_t ftcin = sam_tc_infreq();
int ndx = 0;
tcinfo("frequency=%d\n", frequency);
tmrinfo("frequency=%d\n", frequency);
/* Satisfy lower bound. That is, the value of the divider such that:
*
@ -1246,7 +1246,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
{
/* If no divisor can be found, return -ERANGE */
tcerr("Lower bound search failed\n");
tmrerr("ERROR: Lower bound search failed\n");
return -ERANGE;
}
}
@ -1270,7 +1270,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
if (div)
{
uint32_t value = sam_tc_freqdiv_lookup(ftcin, ndx);
tcinfo("return div=%lu\n", (unsigned long)value);
tmrinfo("return div=%lu\n", (unsigned long)value);
*div = value;
}
@ -1278,7 +1278,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
if (tcclks)
{
tcinfo("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS(ndx));
tmrinfo("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS(ndx));
*tcclks = TC_CMR_TCCLKS(ndx);
}

17
arch/arm/src/sam34/sam4cm_tc.h
View File

@ -71,8 +71,7 @@
/* Timer debug is enabled if any timer client is enabled */
#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_ANALOG
#ifndef CONFIG_DEBUG_TIMER_INFO
# undef CONFIG_SAMA5_TC_REGDEBUG
#endif
@ -80,20 +79,6 @@
# define CONFIG_SAM34_TC_DEBUG 1
#endif
/* Timer/counter debug output */
#ifdef CONFIG_SAM34_TC_DEBUG
# define tcerr err
# define tcinfo info
# define tcllerr llerr
# define tcllinfo llinfo
#else
# define tcerr(x...)
# define tcinfo(x...)
# define tcllerr(x...)
# define tcllinfo(x...)
#endif
/****************************************************************************
* Public Types
****************************************************************************/

8
arch/arm/src/sam34/sam4cm_tickless.c
View File

@ -197,7 +197,7 @@ static struct sam_tickless_s g_tickless;
static void sam_oneshot_handler(void *arg)
{
tcllinfo("Expired...\n");
tmrllinfo("Expired...\n");
sched_timer_expiration();
}
@ -244,7 +244,7 @@ void up_timer_initialize(void)
CONFIG_USEC_PER_TICK);
if (ret < 0)
{
tcllerr("ERROR: sam_oneshot_initialize failed\n");
tmrllerr("ERROR: sam_oneshot_initialize failed\n");
PANIC();
}
@ -256,7 +256,7 @@ void up_timer_initialize(void)
ret = sam_oneshot_max_delay(&g_tickless.oneshot, &max_delay);
if (ret < 0)
{
tcllerr("ERROR: sam_oneshot_max_delay failed\n");
tmrllerr("ERROR: sam_oneshot_max_delay failed\n");
PANIC();
}
@ -280,7 +280,7 @@ void up_timer_initialize(void)
CONFIG_USEC_PER_TICK);
if (ret < 0)
{
tcllerr("ERROR: sam_freerun_initialize failed\n");
tmrllerr("ERROR: sam_freerun_initialize failed\n");
PANIC();
}

44
arch/arm/src/sam34/sam_tc.c
View File

@ -70,22 +70,6 @@
#define TC_FCLK (BOARD_SCLK_FREQUENCY)
#define TC_MAXTIMEOUT ((1000000ULL * (1ULL + TC_RVALUE_MASK)) / TC_FCLK)
/* Configuration ************************************************************/
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the timer
* driver. NOTE: that only llerr types are used so that the output is
* immediately available.
*/
#ifdef CONFIG_DEBUG_TIMER
# define tcerr llerr
# define tcinfo llinfo
#else
# define tcerr(x...)
# define tcinfo(x...)
#endif
/****************************************************************************
* Private Types
****************************************************************************/
@ -268,7 +252,7 @@ static int sam34_interrupt(int irq, FAR void *context)
{
FAR struct sam34_lowerhalf_s *priv = &g_tcdevs[irq-SAM_IRQ_TC0];
tcinfo("Entry\n");
tmrinfo("Entry\n");
DEBUGASSERT((irq >= SAM_IRQ_TC0) && (irq <= SAM_IRQ_TC5));
/* Check if the interrupt is really pending */
@ -299,7 +283,7 @@ static int sam34_interrupt(int irq, FAR void *context)
/* No handler or the handler returned false.. stop the timer */
sam34_stop((FAR struct timer_lowerhalf_s *)priv);
tcinfo("Stopped\n");
tmrinfo("Stopped\n");
}
/* TC_INT_CPCS is cleared by reading SAM_TCx_SR */
@ -328,7 +312,7 @@ static int sam34_start(FAR struct timer_lowerhalf_s *lower)
FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
uint32_t mr_val;
tcinfo("Entry\n");
tmrinfo("Entry\n");
DEBUGASSERT(priv);
if (priv->started)
@ -382,7 +366,7 @@ static int sam34_start(FAR struct timer_lowerhalf_s *lower)
static int sam34_stop(FAR struct timer_lowerhalf_s *lower)
{
FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
tcinfo("Entry\n");
tmrinfo("Entry\n");
DEBUGASSERT(priv);
if (!priv->started)
@ -421,7 +405,7 @@ static int sam34_getstatus(FAR struct timer_lowerhalf_s *lower,
FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
uint32_t elapsed;
tcinfo("Entry\n");
tmrinfo("Entry\n");
DEBUGASSERT(priv);
/* Return the status bit */
@ -446,9 +430,9 @@ static int sam34_getstatus(FAR struct timer_lowerhalf_s *lower,
elapsed = sam34_getreg(priv->base + SAM_TC_CV_OFFSET);
status->timeleft = ((uint64_t)priv->timeout * elapsed) / (priv->clkticks + 1); /* TODO - check on this +1 */
tcinfo(" flags : %08x\n", status->flags);
tcinfo(" timeout : %d\n", status->timeout);
tcinfo(" timeleft : %d\n", status->timeleft);
tmrinfo(" flags : %08x\n", status->flags);
tmrinfo(" timeout : %d\n", status->timeout);
tmrinfo(" timeleft : %d\n", status->timeleft);
return OK;
}
@ -480,13 +464,13 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
return -EPERM;
}
tcinfo("Entry: timeout=%d\n", timeout);
tmrinfo("Entry: timeout=%d\n", timeout);
/* Can this timeout be represented? */
if (timeout < 1 || timeout > TC_MAXTIMEOUT)
{
tcerr("Cannot represent timeout=%lu > %lu\n",
tmrerr("ERROR: Cannot represent timeout=%lu > %lu\n",
timeout, TC_MAXTIMEOUT);
return -ERANGE;
}
@ -496,7 +480,7 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
timeout = (1000000ULL * priv->clkticks) / TC_FCLK; /* Truncated timeout */
priv->adjustment = priv->timeout - timeout; /* Truncated time to be added to next interval (dither) */
tcinfo("fclk=%d clkticks=%d timout=%d, adjustment=%d\n",
tmrinfo("fclk=%d clkticks=%d timout=%d, adjustment=%d\n",
TC_FCLK, priv->clkticks, priv->timeout, priv->adjustment);
return OK;
@ -531,7 +515,7 @@ static tccb_t sam34_sethandler(FAR struct timer_lowerhalf_s *lower,
flags = enter_critical_section();
DEBUGASSERT(priv);
tcinfo("Entry: handler=%p\n", handler);
tmrinfo("Entry: handler=%p\n", handler);
/* Get the old handler return value */
@ -572,7 +556,7 @@ static int sam34_ioctl(FAR struct timer_lowerhalf_s *lower, int cmd,
int ret = -ENOTTY;
DEBUGASSERT(priv);
tcinfo("Entry: cmd=%d arg=%ld\n", cmd, arg);
tmrinfo("Entry: cmd=%d arg=%ld\n", cmd, arg);
UNUSED(priv);
return ret;
@ -602,7 +586,7 @@ void sam_tcinitialize(FAR const char *devpath, int irq)
{
FAR struct sam34_lowerhalf_s *priv = &g_tcdevs[irq-SAM_IRQ_TC0];
tcinfo("Entry: devpath=%s\n", devpath);
tmrinfo("Entry: devpath=%s\n", devpath);
DEBUGASSERT((irq >= SAM_IRQ_TC0) && (irq <= SAM_IRQ_TC5));
/* Initialize the driver state structure. Here we assume: (1) the state

12
arch/arm/src/sama5/sam_freerun.c
View File

@ -138,7 +138,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
uint32_t cmr;
int ret;
tcinfo("chan=%d resolution=%d usec\n", chan, resolution);
tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
DEBUGASSERT(freerun && resolution > 0);
/* Get the TC frequency the corresponds to the requested resolution */
@ -150,11 +150,11 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
ret = sam_tc_divisor(frequency, &divisor, &cmr);
if (ret < 0)
{
tcerr("ERROR: sam_tc_divisor failed: %d\n", ret);
tmrerr("ERROR: sam_tc_divisor failed: %d\n", ret);
return ret;
}
tcinfo("frequency=%lu, divisor=%u, cmr=%08lx\n",
tmrinfo("frequency=%lu, divisor=%u, cmr=%08lx\n",
(unsigned long)frequency, (unsigned long)divisor,
(unsigned long)cmr);
@ -189,7 +189,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
freerun->tch = sam_tc_allocate(chan, cmr);
if (!freerun->tch)
{
tcerr("ERROR: Failed to allocate timer channel %d\n", chan);
tmrerr("ERROR: Failed to allocate timer channel %d\n", chan);
return -EBUSY;
}
@ -274,7 +274,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
leave_critical_section(flags);
tcinfo("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
tmrinfo("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
(unsigned long)counter, (unsigned long)verify,
(unsigned long)overflow, (unsigned long)sr);
@ -294,7 +294,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
ts->tv_sec = sec;
ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
tcinfo("usec=%llu ts=(%lu, %lu)\n",
tmrinfo("usec=%llu ts=(%lu, %lu)\n",
usec, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
return OK;

22
arch/arm/src/sama5/sam_oneshot.c
View File

@ -108,7 +108,7 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
oneshot_handler_t oneshot_handler;
void *oneshot_arg;
tcllinfo("Expired...\n");
tmrllinfo("Expired...\n");
DEBUGASSERT(oneshot && oneshot->handler);
/* The clock was stopped, but not disabled when the RC match occurred.
@ -165,7 +165,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
uint32_t cmr;
int ret;
tcinfo("chan=%d resolution=%d usec\n", chan, resolution);
tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
DEBUGASSERT(oneshot && resolution > 0);
/* Get the TC frequency the corresponds to the requested resolution */
@ -177,11 +177,11 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
ret = sam_tc_divisor(frequency, &divisor, &cmr);
if (ret < 0)
{
tcerr("ERROR: sam_tc_divisor failed: %d\n", ret);
tmrerr("ERROR: sam_tc_divisor failed: %d\n", ret);
return ret;
}
tcinfo("frequency=%lu, divisor=%lu, cmr=%08lx\n",
tmrinfo("frequency=%lu, divisor=%lu, cmr=%08lx\n",
(unsigned long)frequency, (unsigned long)divisor,
(unsigned long)cmr);
@ -217,7 +217,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
oneshot->tch = sam_tc_allocate(chan, cmr);
if (!oneshot->tch)
{
tcerr("ERROR: Failed to allocate timer channel %d\n", chan);
tmrerr("ERROR: Failed to allocate timer channel %d\n", chan);
return -EBUSY;
}
@ -260,7 +260,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
uint64_t regval;
irqstate_t flags;
tcinfo("handler=%p arg=%p, ts=(%lu, %lu)\n",
tmrinfo("handler=%p arg=%p, ts=(%lu, %lu)\n",
handler, arg, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
DEBUGASSERT(oneshot && handler && ts);
@ -271,7 +271,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
{
/* Yes.. then cancel it */
tcinfo("Already running... cancelling\n");
tmrinfo("Already running... cancelling\n");
(void)sam_oneshot_cancel(oneshot, freerun, NULL);
}
@ -293,7 +293,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
regval = (usec * (uint64_t)sam_tc_divfreq(oneshot->tch)) / USEC_PER_SEC;
tcinfo("usec=%llu regval=%08llx\n", usec, regval);
tmrinfo("usec=%llu regval=%08llx\n", usec, regval);
DEBUGASSERT(regval <= UINT32_MAX);
/* Set up to receive the callback when the interrupt occurs */
@ -402,7 +402,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
* REVISIT: This does not appear to be the case.
*/
tcinfo("Cancelling...\n");
tmrinfo("Cancelling...\n");
count = sam_tc_getcounter(oneshot->tch);
rc = sam_tc_getregister(oneshot->tch, TC_REGC);
@ -438,7 +438,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
* oneshot timer.
*/
tcinfo("rc=%lu count=%lu usec=%lu\n",
tmrinfo("rc=%lu count=%lu usec=%lu\n",
(unsigned long)rc, (unsigned long)count, (unsigned long)usec);
/* REVISIT: I am not certain why the timer counter value sometimes
@ -483,7 +483,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
ts->tv_nsec = (unsigned long)nsec;
}
tcinfo("remaining (%lu, %lu)\n",
tmrinfo("remaining (%lu, %lu)\n",
(unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
}

26
arch/arm/src/sama5/sam_tc.c
View File

@ -953,7 +953,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
{
/* Timer/counter is not invalid or not enabled */
tcerr("ERROR: Bad channel number: %d\n", channel);
tmrerr("ERROR: Bad channel number: %d\n", channel);
return NULL;
}
@ -976,7 +976,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
for (i = 0, ch = tcconfig->chfirst; i < SAM_TC_NCHANNELS; i++)
{
tcerr("Initializing TC%d channel %d\n", tcconfig->tc, ch);
tmrerr("ERROR: Initializing TC%d channel %d\n", tcconfig->tc, ch);
/* Initialize the channel data structure */
@ -1057,7 +1057,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
{
/* No.. return a failure */
tcerr("Channel %d is in-used\n", channel);
tmrerr("ERROR: Channel %d is in-use\n", channel);
sam_givesem(tc);
return NULL;
}
@ -1102,7 +1102,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
* access to the requested channel.
*/
tcinfo("channel=%d mode=%08x\n", channel, mode);
tmrinfo("channel=%d mode=%08x\n", channel, mode);
chan = sam_tc_initialize(channel);
if (chan)
@ -1128,7 +1128,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
/* Return an opaque reference to the channel */
tcinfo("Returning %p\n", chan);
tmrinfo("Returning %p\n", chan);
return (TC_HANDLE)chan;
}
@ -1150,7 +1150,7 @@ void sam_tc_free(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
tcinfo("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
tmrinfo("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
/* Make sure that interrupts are detached and disabled and that the channel
@ -1183,7 +1183,7 @@ void sam_tc_start(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
tcinfo("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
tmrinfo("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
/* Read the SR to clear any pending interrupts on this channel */
@ -1215,7 +1215,7 @@ void sam_tc_stop(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
tcinfo("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
tmrinfo("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
sam_chan_putreg(chan, SAM_TC_CCR_OFFSET, TC_CCR_CLKDIS);
@ -1322,7 +1322,7 @@ void sam_tc_setregister(TC_HANDLE handle, int regid, uint32_t regval)
DEBUGASSERT(chan && regid < TC_NREGISTERS);
tcinfo("Channel %d: Set register RC%d to %08lx\n",
tmrinfo("Channel %d: Set register RC%d to %08lx\n",
chan->chan, regid, (unsigned long)regval);
sam_chan_putreg(chan, g_regoffset[regid], regval);
@ -1465,7 +1465,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
uint32_t ftcin = sam_tc_infreq();
int ndx = 0;
tcinfo("frequency=%d\n", frequency);
tmrinfo("frequency=%d\n", frequency);
/* Satisfy lower bound. That is, the value of the divider such that:
*
@ -1478,7 +1478,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
{
/* If no divisor can be found, return -ERANGE */
tcerr("Lower bound search failed\n");
tmrerr("ERROR: Lower bound search failed\n");
return -ERANGE;
}
}
@ -1502,7 +1502,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
if (div)
{
uint32_t value = sam_tc_freqdiv_lookup(ftcin, ndx);
tcinfo("return div=%lu\n", (unsigned long)value);
tmrinfo("return div=%lu\n", (unsigned long)value);
*div = value;
}
@ -1510,7 +1510,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
if (tcclks)
{
tcinfo("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS(ndx));
tmrinfo("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS(ndx));
*tcclks = TC_CMR_TCCLKS(ndx);
}

17
arch/arm/src/sama5/sam_tc.h
View File

@ -74,8 +74,7 @@
/* Timer debug is enabled if any timer client is enabled */
#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_ANALOG
#ifndef CONFIG_DEBUG_TIMER_INFO
# undef CONFIG_SAMA5_TC_REGDEBUG
#endif
@ -83,20 +82,6 @@
# define CONFIG_SAMA5_TC_DEBUG 1
#endif
/* Timer/counter debug output */
#ifdef CONFIG_SAMA5_TC_DEBUG
# define tcerr err
# define tcinfo info
# define tcllerr llerr
# define tcllinfo llinfo
#else
# define tcerr(x...)
# define tcinfo(x...)
# define tcllerr(x...)
# define tcllinfo(x...)
#endif
/****************************************************************************
* Public Types
****************************************************************************/

8
arch/arm/src/sama5/sam_tickless.c
View File

@ -209,7 +209,7 @@ static struct sam_tickless_s g_tickless;
static void sam_oneshot_handler(void *arg)
{
tcllinfo("Expired...\n");
tmrllinfo("Expired...\n");
sched_timer_expiration();
}
@ -256,7 +256,7 @@ void up_timer_initialize(void)
CONFIG_USEC_PER_TICK);
if (ret < 0)
{
tcllerr("ERROR: sam_oneshot_initialize failed\n");
tmrllerr("ERROR: sam_oneshot_initialize failed\n");
PANIC();
}
@ -268,7 +268,7 @@ void up_timer_initialize(void)
ret = sam_oneshot_max_delay(&g_tickless.oneshot, &max_delay);
if (ret < 0)
{
tcllerr("ERROR: sam_oneshot_max_delay failed\n");
tmrllerr("ERROR: sam_oneshot_max_delay failed\n");
PANIC();
}
@ -292,7 +292,7 @@ void up_timer_initialize(void)
CONFIG_USEC_PER_TICK);
if (ret < 0)
{
tcllerr("ERROR: sam_freerun_initialize failed\n");
tmrllerr("ERROR: sam_freerun_initialize failed\n");
PANIC();
}

12
arch/arm/src/samv7/sam_freerun.c
View File

@ -124,7 +124,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
uint32_t cmr;
int ret;
tcinfo("chan=%d resolution=%d usec\n", chan, resolution);
tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
DEBUGASSERT(freerun && resolution > 0);
/* Get the TC frequency the corresponds to the requested resolution */
@ -136,11 +136,11 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
ret = sam_tc_clockselect(frequency, &cmr, &actual);
if (ret < 0)
{
tcerr("ERROR: sam_tc_clockselect failed: %d\n", ret);
tmrerr("ERROR: sam_tc_clockselect failed: %d\n", ret);
return ret;
}
tcinfo("frequency=%lu, actual=%lu, cmr=%08lx\n",
tmrinfo("frequency=%lu, actual=%lu, cmr=%08lx\n",
(unsigned long)frequency, (unsigned long)actual,
(unsigned long)cmr);
@ -175,7 +175,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
freerun->tch = sam_tc_allocate(chan, cmr);
if (!freerun->tch)
{
tcerr("ERROR: Failed to allocate timer channel %d\n", chan);
tmrerr("ERROR: Failed to allocate timer channel %d\n", chan);
return -EBUSY;
}
@ -260,7 +260,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
leave_critical_section(flags);
tcinfo("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
tmrinfo("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
(unsigned long)counter, (unsigned long)verify,
(unsigned long)overflow, (unsigned long)sr);
@ -280,7 +280,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
ts->tv_sec = sec;
ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
tcinfo("usec=%llu ts=(%lu, %lu)\n",
tmrinfo("usec=%llu ts=(%lu, %lu)\n",
usec, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
return OK;

22
arch/arm/src/samv7/sam_oneshot.c
View File

@ -109,7 +109,7 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
oneshot_handler_t oneshot_handler;
void *oneshot_arg;
tcllinfo("Expired...\n");
tmrllinfo("Expired...\n");
DEBUGASSERT(oneshot && oneshot->handler);
/* The clock was stopped, but not disabled when the RC match occurred.
@ -166,7 +166,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
uint32_t cmr;
int ret;
tcinfo("chan=%d resolution=%d usec\n", chan, resolution);
tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
DEBUGASSERT(oneshot && resolution > 0);
/* Get the TC frequency the corresponds to the requested resolution */
@ -178,11 +178,11 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
ret = sam_tc_clockselect(frequency, &cmr, &actual);
if (ret < 0)
{
tcerr("ERROR: sam_tc_clockselect failed: %d\n", ret);
tmrerr("ERROR: sam_tc_clockselect failed: %d\n", ret);
return ret;
}
tcinfo("frequency=%lu, actual=%lu, cmr=%08lx\n",
tmrinfo("frequency=%lu, actual=%lu, cmr=%08lx\n",
(unsigned long)frequency, (unsigned long)actual,
(unsigned long)cmr);
@ -218,7 +218,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
oneshot->tch = sam_tc_allocate(chan, cmr);
if (!oneshot->tch)
{
tcerr("ERROR: Failed to allocate timer channel %d\n", chan);
tmrerr("ERROR: Failed to allocate timer channel %d\n", chan);
return -EBUSY;
}
@ -261,7 +261,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
uint64_t regval;
irqstate_t flags;
tcinfo("handler=%p arg=%p, ts=(%lu, %lu)\n",
tmrinfo("handler=%p arg=%p, ts=(%lu, %lu)\n",
handler, arg, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
DEBUGASSERT(oneshot && handler && ts);
@ -272,7 +272,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
{
/* Yes.. then cancel it */
tcinfo("Already running... cancelling\n");
tmrinfo("Already running... cancelling\n");
(void)sam_oneshot_cancel(oneshot, freerun, NULL);
}
@ -294,7 +294,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
regval = (usec * (uint64_t)sam_tc_divfreq(oneshot->tch)) / USEC_PER_SEC;
tcinfo("usec=%llu regval=%08llx\n", usec, regval);
tmrinfo("usec=%llu regval=%08llx\n", usec, regval);
DEBUGASSERT(regval <= UINT16_MAX);
/* Set up to receive the callback when the interrupt occurs */
@ -403,7 +403,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
* REVISIT: This does not appear to be the case.
*/
tcinfo("Cancelling...\n");
tmrinfo("Cancelling...\n");
count = sam_tc_getcounter(oneshot->tch);
rc = sam_tc_getregister(oneshot->tch, TC_REGC);
@ -439,7 +439,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
* oneshot timer.
*/
tcinfo("rc=%lu count=%lu usec=%lu\n",
tmrinfo("rc=%lu count=%lu usec=%lu\n",
(unsigned long)rc, (unsigned long)count, (unsigned long)usec);
/* REVISIT: I am not certain why the timer counter value sometimes
@ -484,7 +484,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
ts->tv_nsec = (unsigned long)nsec;
}
tcinfo("remaining (%lu, %lu)\n",
tmrinfo("remaining (%lu, %lu)\n",
(unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
}

28
arch/arm/src/samv7/sam_tc.c
View File

@ -1046,7 +1046,7 @@ static int sam_tc_mcksrc(uint32_t frequency, uint32_t *tcclks,
uint32_t fnext;
int ndx = 0;
tcinfo("frequency=%d\n", frequency);
tmrinfo("frequency=%d\n", frequency);
/* Satisfy lower bound. That is, the value of the divider such that:
*
@ -1066,7 +1066,7 @@ static int sam_tc_mcksrc(uint32_t frequency, uint32_t *tcclks,
{
/* If no divisor can be found, return -ERANGE */
tcerr("Lower bound search failed\n");
tmrerr("Lower bound search failed\n");
return -ERANGE;
}
@ -1169,7 +1169,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
{
/* Timer/counter is not invalid or not enabled */
tcerr("ERROR: Bad channel number: %d\n", channel);
tmrerr("ERROR: Bad channel number: %d\n", channel);
return NULL;
}
@ -1225,7 +1225,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
{
/* Yes.. return a failure */
tcerr("Channel %d is in-use\n", channel);
tmrerr("Channel %d is in-use\n", channel);
sam_givesem(tc);
return NULL;
}
@ -1318,7 +1318,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
* access to the requested channel.
*/
tcinfo("channel=%d mode=%08x\n", channel, mode);
tmrinfo("channel=%d mode=%08x\n", channel, mode);
chan = sam_tc_initialize(channel);
if (chan)
@ -1344,7 +1344,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
/* Return an opaque reference to the channel */
tcinfo("Returning %p\n", chan);
tmrinfo("Returning %p\n", chan);
return (TC_HANDLE)chan;
}
@ -1366,7 +1366,7 @@ void sam_tc_free(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
tcinfo("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
tmrinfo("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
/* Make sure that interrupts are detached and disabled and that the channel
@ -1399,7 +1399,7 @@ void sam_tc_start(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
tcinfo("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
tmrinfo("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
/* Read the SR to clear any pending interrupts on this channel */
@ -1431,7 +1431,7 @@ void sam_tc_stop(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
tcinfo("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
tmrinfo("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
sam_chan_putreg(chan, SAM_TC_CCR_OFFSET, TC_CCR_CLKDIS);
@ -1538,7 +1538,7 @@ void sam_tc_setregister(TC_HANDLE handle, int regid, uint32_t regval)
DEBUGASSERT(chan && regid < TC_NREGISTERS);
tcinfo("Channel %d: Set register RC%d to %08lx\n",
tmrinfo("Channel %d: Set register RC%d to %08lx\n",
chan->chan, regid, (unsigned long)regval);
sam_chan_putreg(chan, g_regoffset[regid], regval);
@ -1717,7 +1717,7 @@ int sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks,
if (actual)
{
tcinfo("return actual=%lu\n", (unsigned long)fselect);
tmrinfo("return actual=%lu\n", (unsigned long)fselect);
*actual = pck6_actual;
}
@ -1725,7 +1725,7 @@ int sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks,
if (tcclks)
{
tcinfo("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS_PCK6);
tmrinfo("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS_PCK6);
*tcclks = TC_CMR_TCCLKS_PCK6;
}
@ -1739,7 +1739,7 @@ int sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks,
if (actual)
{
tcinfo("return actual=%lu\n", (unsigned long)mck_actual);
tmrinfo("return actual=%lu\n", (unsigned long)mck_actual);
*actual = mck_actual;
}
@ -1747,7 +1747,7 @@ int sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks,
if (tcclks)
{
tcinfo("return tcclks=%08lx\n", (unsigned long)mck_tcclks);
tmrinfo("return tcclks=%08lx\n", (unsigned long)mck_tcclks);
*tcclks = mck_tcclks;
}

17
arch/arm/src/samv7/sam_tc.h
View File

@ -75,8 +75,7 @@
/* Timer debug is enabled if any timer client is enabled */
#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_ANALOG
#ifndef CONFIG_DEBUG_TIMER_INFO
# undef CONFIG_SAMV7_TC_REGDEBUG
#endif
@ -84,20 +83,6 @@
# define CONFIG_SAMV7_TC_DEBUG 1
#endif
/* Timer/counter debug output */
#ifdef CONFIG_SAMV7_TC_DEBUG
# define tcerr err
# define tcinfo info
# define tcllerr llerr
# define tcllinfo llinfo
#else
# define tcerr(x...)
# define tcinfo(x...)
# define tcllerr(x...)
# define tcllinfo(x...)
#endif
/****************************************************************************
* Public Types
****************************************************************************/

6
arch/arm/src/samv7/sam_tickless.c
View File

@ -221,7 +221,7 @@ static struct sam_tickless_s g_tickless;
static void sam_oneshot_handler(void *arg)
{
tcllinfo("Expired...\n");
tmrllinfo("Expired...\n");
sched_timer_expiration();
}
@ -265,7 +265,7 @@ void up_timer_initialize(void)
CONFIG_USEC_PER_TICK);
if (ret < 0)
{
tcllerr("ERROR: sam_oneshot_initialize failed\n");
tmrllerr("ERROR: sam_oneshot_initialize failed\n");
PANIC();
}
@ -278,7 +278,7 @@ void up_timer_initialize(void)
CONFIG_USEC_PER_TICK);
if (ret < 0)
{
tcllerr("ERROR: sam_freerun_initialize failed\n");
tmrllerr("ERROR: sam_freerun_initialize failed\n");
PANIC();
}

6
arch/arm/src/tiva/Kconfig
View File

@ -840,7 +840,7 @@ endif # TIVA_TIMER_16BIT
config TIVA_TIMER_REGDEBUG
bool "Register level debug"
default n
depends on DEBUG_INFO
depends on DEBUG_TIMER_INFO
---help---
Enables extremely detailed register access debug output.
@ -853,7 +853,7 @@ menu "ADC Configuration"
config TIVA_ADC_REGDEBUG
bool "Register level debug"
default n
depends on DEBUG_INFO
depends on DEBUG_ANALOG_INFO
---help---
Enables extremely detailed register access debug output.
@ -1103,7 +1103,7 @@ config TIVA_EMAC_HWCHECKSUM
config TIVA_ETHERNET_REGDEBUG
bool "Register-Level Debug"
default n
depends on DEBUG_INFO
depends on DEBUG_NET_INFO
---help---
Enable very low-level register access debug. Depends on CONFIG_DEBUG_FEATURES.

14
arch/arm/src/tiva/tiva_timer.h
View File

@ -127,20 +127,6 @@
#define TIMER_ISDMARTCM(c) ((((c)->flags) & TIMER_FLAG_DMARTCM) != 0)
#define TIMER_ISDMAMATCH(c) ((((c)->flags) & TIMER_FLAG_DMAMATCH) != 0)
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the timer
* driver. NOTE: that only llerr types are used so that the output is
* immediately available.
*/
#ifdef CONFIG_DEBUG_TIMER
# define timerr llerr
# define timinfo llinfo
#else
# define timerr(x...)
# define timinfo(x...)
#endif
/****************************************************************************
* Public Types
****************************************************************************/

62
arch/arm/src/tiva/tiva_timerlib.c
View File

@ -63,7 +63,7 @@
* Pre-processor Definitions
****************************************************************************/
#ifndef CONFIG_DEBUG_INFO
#ifndef CONFIG_DEBUG_TIMER_INFO
# undef CONFIG_TIVA_TIMER_REGDEBUG
#endif
@ -397,7 +397,7 @@ static bool tiva_timer_checkreg(struct tiva_gptmstate_s *priv, bool wr,
{
/* Yes... show how many times we did it */
llinfo("...[Repeats %d times]...\n", priv->ntimes);
tmrinfo("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@ -430,7 +430,7 @@ static uint32_t tiva_getreg(struct tiva_gptmstate_s *priv, unsigned int offset)
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
if (tiva_timer_checkreg(priv, false, regval, regaddr))
{
llinfo("%08x->%08x\n", regaddr, regval);
tmrinfo("%08x->%08x\n", regaddr, regval);
}
#endif
@ -453,7 +453,7 @@ static void tiva_putreg(struct tiva_gptmstate_s *priv, unsigned int offset,
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
if (tiva_timer_checkreg(priv, true, regval, regaddr))
{
llinfo("%08x<-%08x\n", regaddr, regval);
tmrinfo("%08x<-%08x\n", regaddr, regval);
}
#endif
@ -1780,7 +1780,7 @@ TIMER_HANDLE tiva_gptm_configure(const struct tiva_gptmconfig_s *config)
priv->clkin = ALTCLK_FREQUENCY;
#else
timinfo("tiva_gptm_configure: Error: alternate clock only available on TM4C129 devices\n");
tmrinfo("tiva_gptm_configure: Error: alternate clock only available on TM4C129 devices\n");
return (TIMER_HANDLE)NULL;
#endif /* CONFIG_ARCH_CHIP_TM4C129 */
}
@ -2382,14 +2382,14 @@ void tiva_timer32_setinterval(TIMER_HANDLE handle, uint32_t interval)
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
/* Generate low-level debug output outside of the critical section */
llinfo("%08x<-%08x\n", loadr, interval);
tmrinfo("%08x<-%08x\n", loadr, interval);
if (toints)
{
# ifdef CONFIG_ARCH_CHIP_TM4C129
llinfo("%08x->%08x\n", moder, modev1);
llinfo("%08x<-%08x\n", moder, modev2);
tmrinfo("%08x->%08x\n", moder, modev1);
tmrinfo("%08x<-%08x\n", moder, modev2);
# endif /* CONFIG_ARCH_CHIP_TM4C129 */
llinfo("%08x<-%08x\n", imrr, priv->imr);
tmrinfo("%08x<-%08x\n", imrr, priv->imr);
}
#endif
}
@ -2529,14 +2529,14 @@ void tiva_timer16_setinterval(TIMER_HANDLE handle, uint16_t interval, int tmndx)
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
/* Generate low-level debug output outside of the critical section */
llinfo("%08x<-%08x\n", loadr, interval);
tmrinfo("%08x<-%08x\n", loadr, interval);
if (toints)
{
#ifdef CONFIG_ARCH_CHIP_TM4C129
llinfo("%08x->%08x\n", moder, modev1);
llinfo("%08x<-%08x\n", moder, modev2);
tmrinfo("%08x->%08x\n", moder, modev1);
tmrinfo("%08x<-%08x\n", moder, modev2);
#endif
llinfo("%08x<-%08x\n", imrr, priv->imr);
tmrinfo("%08x<-%08x\n", imrr, priv->imr);
}
#endif
}
@ -2568,7 +2568,7 @@ uint32_t tiva_timer32_remaining(TIMER_HANDLE handle)
uint32_t interval;
uint32_t remaining;
timinfo("Entry\n");
tmrinfo("Entry\n");
DEBUGASSERT(priv && priv->attr && priv->config &&
priv->config->mode != TIMER16_MODE);
@ -2734,13 +2734,13 @@ void tiva_rtc_setalarm(TIMER_HANDLE handle, uint32_t delay)
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
/* Generate low-level debug output outside of the critical section */
llinfo("%08x->%08x\n", base + TIVA_TIMER_TAR_OFFSET, counter);
llinfo("%08x<-%08x\n", base + TIVA_TIMER_TAMATCHR_OFFSET, match);
tmrinfo("%08x->%08x\n", base + TIVA_TIMER_TAR_OFFSET, counter);
tmrinfo("%08x<-%08x\n", base + TIVA_TIMER_TAMATCHR_OFFSET, match);
#ifdef CONFIG_ARCH_CHIP_TM4C129
llinfo("%08x->%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev);
llinfo("%08x<-%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev | adcbits);
tmrinfo("%08x->%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev);
tmrinfo("%08x<-%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev | adcbits);
#endif /* CONFIG_ARCH_CHIP_TM4C129 */
llinfo("%08x<-%08x\n", base + TIVA_TIMER_IMR_OFFSET, priv->imr);
tmrinfo("%08x<-%08x\n", base + TIVA_TIMER_IMR_OFFSET, priv->imr);
#endif
}
#endif
@ -2838,13 +2838,13 @@ void tiva_timer32_relmatch(TIMER_HANDLE handle, uint32_t relmatch)
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
/* Generate low-level debug output outside of the critical section */
llinfo("%08x->%08x\n", base + TIVA_TIMER_TAR_OFFSET, counter);
llinfo("%08x<-%08x\n", base + TIVA_TIMER_TAMATCHR_OFFSET, match);
tmrinfo("%08x->%08x\n", base + TIVA_TIMER_TAR_OFFSET, counter);
tmrinfo("%08x<-%08x\n", base + TIVA_TIMER_TAMATCHR_OFFSET, match);
#ifdef CONFIG_ARCH_CHIP_TM4C129
llinfo("%08x->%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev);
llinfo("%08x<-%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev | adcbits);
tmrinfo("%08x->%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev);
tmrinfo("%08x<-%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev | adcbits);
#endif /* CONFIG_ARCH_CHIP_TM4C129 */
llinfo("%08x<-%08x\n", base + TIVA_TIMER_IMR_OFFSET, priv->imr);
tmrinfo("%08x<-%08x\n", base + TIVA_TIMER_IMR_OFFSET, priv->imr);
#endif /* CONFIG_TIVA_TIMER_REGDEBUG */
}
@ -3040,15 +3040,15 @@ void tiva_timer16_relmatch(TIMER_HANDLE handle, uint32_t relmatch, int tmndx)
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
/* Generate low-level debug output outside of the critical section */
llinfo("%08x->%08x\n", timerr, timerv);
llinfo("%08x->%08x\n", prescr, prescv);
llinfo("%08x<-%08x\n", matchr, matchv);
llinfo("%08x<-%08x\n", prematchr, prematchv);
tmrinfo("%08x->%08x\n", timerr, timerv);
tmrinfo("%08x->%08x\n", prescr, prescv);
tmrinfo("%08x<-%08x\n", matchr, matchv);
tmrinfo("%08x<-%08x\n", prematchr, prematchv);
#ifdef CONFIG_ARCH_CHIP_TM4C129
llinfo("%08x->%08x\n", adcevr, adcevv);
llinfo("%08x<-%08x\n", adcevr, adcevv | adcbits);
tmrinfo("%08x->%08x\n", adcevr, adcevv);
tmrinfo("%08x<-%08x\n", adcevr, adcevv | adcbits);
#endif
llinfo("%08x<-%08x\n", imr, priv->imr);
tmrinfo("%08x<-%08x\n", imr, priv->imr);
#endif
}
#endif

38
arch/arm/src/tiva/tiva_timerlow32.c
View File

@ -57,10 +57,6 @@
#if defined(CONFIG_TIMER) && defined(CONFIG_TIVA_TIMER)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Types
****************************************************************************/
@ -200,7 +196,7 @@ static uint32_t tiva_ticks2usec(struct tiva_lowerhalf_s *priv, uint32_t ticks)
static void tiva_timeout(struct tiva_lowerhalf_s *priv, uint32_t timeout)
{
timinfo("Entry: timeout=%d\n", timeout);
tmrinfo("Entry: timeout=%d\n", timeout);
/* Save the desired timeout value */
@ -215,7 +211,7 @@ static void tiva_timeout(struct tiva_lowerhalf_s *priv, uint32_t timeout)
timeout = tiva_ticks2usec(priv, priv->clkticks);
priv->adjustment = priv->timeout - timeout;
timinfo("clkin=%d clkticks=%d timeout=%d, adjustment=%d\n",
tmrinfo("clkin=%d clkticks=%d timeout=%d, adjustment=%d\n",
priv->clkin, priv->clkticks, priv->timeout, priv->adjustment);
}
@ -237,7 +233,7 @@ static void tiva_timer_handler(TIMER_HANDLE handle, void *arg, uint32_t status)
{
struct tiva_lowerhalf_s *priv = (struct tiva_lowerhalf_s *)arg;
timinfo("Entry: status=%08x\n", status);
tmrinfo("Entry: status=%08x\n", status);
DEBUGASSERT(arg && status);
/* Check if the timeout interrupt is pending */
@ -276,7 +272,7 @@ static void tiva_timer_handler(TIMER_HANDLE handle, void *arg, uint32_t status)
/* No handler or the handler returned false.. stop the timer */
tiva_timer32_stop(priv->handle);
timinfo("Stopped\n");
tmrinfo("Stopped\n");
}
}
}
@ -300,7 +296,7 @@ static int tiva_start(struct timer_lowerhalf_s *lower)
{
struct tiva_lowerhalf_s *priv = (struct tiva_lowerhalf_s *)lower;
timinfo("Entry: started %d\n", priv->started);
tmrinfo("Entry: started %d\n", priv->started);
/* Has the timer already been started? */
@ -337,7 +333,7 @@ static int tiva_stop(struct timer_lowerhalf_s *lower)
{
struct tiva_lowerhalf_s *priv = (struct tiva_lowerhalf_s *)lower;
timinfo("Entry: started %d\n", priv->started);
tmrinfo("Entry: started %d\n", priv->started);
/* Has the timer already been started? */
@ -377,7 +373,7 @@ static int tiva_getstatus(struct timer_lowerhalf_s *lower,
struct tiva_lowerhalf_s *priv = (struct tiva_lowerhalf_s *)lower;
uint32_t remaining;
timinfo("Entry\n");
tmrinfo("Entry\n");
DEBUGASSERT(priv);
/* Return the status bit */
@ -402,9 +398,9 @@ static int tiva_getstatus(struct timer_lowerhalf_s *lower,
remaining = tiva_timer32_remaining(priv->handle);
status->timeleft = tiva_ticks2usec(priv, remaining);
timinfo(" flags : %08x\n", status->flags);
timinfo(" timeout : %d\n", status->timeout);
timinfo(" timeleft : %d\n", status->timeleft);
tmrinfo(" flags : %08x\n", status->flags);
tmrinfo(" timeout : %d\n", status->timeout);
tmrinfo(" timeleft : %d\n", status->timeleft);
return OK;
}
@ -435,7 +431,7 @@ static int tiva_settimeout(struct timer_lowerhalf_s *lower, uint32_t timeout)
return -EPERM;
}
timinfo("Entry: timeout=%d\n", timeout);
tmrinfo("Entry: timeout=%d\n", timeout);
/* Calculate the the new time settings */
@ -476,7 +472,7 @@ static tccb_t tiva_sethandler(struct timer_lowerhalf_s *lower,
flags = enter_critical_section();
DEBUGASSERT(priv);
timinfo("Entry: handler=%p\n", handler);
tmrinfo("Entry: handler=%p\n", handler);
/* Get the old handler return value */
@ -516,7 +512,7 @@ static int tiva_ioctl(struct timer_lowerhalf_s *lower, int cmd,
int ret = -ENOTTY;
DEBUGASSERT(priv);
timinfo("Entry: cmd=%d arg=%ld\n", cmd, arg);
tmrinfo("Entry: cmd=%d arg=%ld\n", cmd, arg);
return ret;
}
@ -557,7 +553,7 @@ int tiva_timer_initialize(FAR const char *devpath,
void *drvr;
int ret;
timinfo("\n");
tmrinfo("\n");
DEBUGASSERT(devpath);
/* Allocate an instance of the lower half state structure */
@ -565,7 +561,7 @@ int tiva_timer_initialize(FAR const char *devpath,
priv = (struct tiva_lowerhalf_s *)kmm_zalloc(sizeof(struct tiva_lowerhalf_s));
if (!priv)
{
timerr("ERROR: Failed to allocate driver structure\n");
tmrerr("ERROR: Failed to allocate driver structure\n");
return -ENOMEM;
}
@ -577,7 +573,7 @@ int tiva_timer_initialize(FAR const char *devpath,
#else
if (config->cmn.alternate)
{
timerr("ERROR: Alternate clock unsupported on TM4C123 architecture\n");
tmrerr("ERROR: Alternate clock unsupported on TM4C123 architecture\n");
return -ENOMEM;
}
else
@ -599,7 +595,7 @@ int tiva_timer_initialize(FAR const char *devpath,
priv->handle = tiva_gptm_configure((const struct tiva_gptmconfig_s *)&priv->config);
if (!priv->handle)
{
timerr("ERROR: Failed to create timer handle\n");
tmrerr("ERROR: Failed to create timer handle\n");
ret = -EINVAL;
goto errout_with_alloc;
}

4
configs/dk-tm4c129x/src/tm4c_timer.c
View File

@ -102,12 +102,12 @@ int tiva_timer_configure(void)
{
int ret;
timinfo("Registering TIMER%d at %s\n", GPTM, CONFIG_DK_TM4C129X_TIMER_DEVNAME);
tmrinfo("Registering TIMER%d at %s\n", GPTM, CONFIG_DK_TM4C129X_TIMER_DEVNAME);
ret = tiva_timer_register(CONFIG_DK_TM4C129X_TIMER_DEVNAME, GPTM, ALTCLK);
if (ret < 0)
{
timerr("ERROR: Failed to register timer driver: %d\n", ret);
tmrerr("ERROR: Failed to register timer driver: %d\n", ret);
}
return ret;

70
configs/sam4s-xplained-pro/src/sam_tc.c
View File

@ -95,34 +95,6 @@
# define CONFIG_RTT_DEVPATH "/dev/rtt0"
#endif
/* Timer Definitions ********************************************************/
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the watchdog
* timer
*/
#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_TIMER
#endif
#ifdef CONFIG_DEBUG_TIMER
# define tcerr err
# define tcllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define tcinfo info
# define tcllinfo llinfo
# else
# define tcinfo(x...)
# define tcllinfo(x...)
# endif
#else
# define tcerr(x...)
# define tcllerr(x...)
# define tcinfo(x...)
# define tcllinfo(x...)
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
@ -168,37 +140,37 @@ int sam_timerinitialize(void)
/* Initialize and register the timer devices */
#if defined(CONFIG_SAM34_TC0)
tcinfo("Initializing %s...\n", CONFIG_TIMER0_DEVPATH);
tmrinfo("Initializing %s...\n", CONFIG_TIMER0_DEVPATH);
sam_tcinitialize(CONFIG_TIMER0_DEVPATH, SAM_IRQ_TC0);
#endif
#if defined(CONFIG_SAM34_TC1)
tcinfo("Initializing %s...\n", CONFIG_TIMER1_DEVPATH);
tmrinfo("Initializing %s...\n", CONFIG_TIMER1_DEVPATH);
sam_tcinitialize(CONFIG_TIMER1_DEVPATH, SAM_IRQ_TC1);
#endif
#if defined(CONFIG_SAM34_TC2)
tcinfo("Initializing %s...\n", CONFIG_TIMER2_DEVPATH);
tmrinfo("Initializing %s...\n", CONFIG_TIMER2_DEVPATH);
sam_tcinitialize(CONFIG_TIMER2_DEVPATH, SAM_IRQ_TC2);
#endif
#if defined(CONFIG_SAM34_TC3)
tcinfo("Initializing %s...\n", CONFIG_TIMER3_DEVPATH);
tmrinfo("Initializing %s...\n", CONFIG_TIMER3_DEVPATH);
sam_tcinitialize(CONFIG_TIMER3_DEVPATH, SAM_IRQ_TC3);
#endif
#if defined(CONFIG_SAM34_TC4)
tcinfo("Initializing %s...\n", CONFIG_TIMER4_DEVPATH);
tmrinfo("Initializing %s...\n", CONFIG_TIMER4_DEVPATH);
sam_tcinitialize(CONFIG_TIMER4_DEVPATH, SAM_IRQ_TC4);
#endif
#if defined(CONFIG_SAM34_TC5)
tcinfo("Initializing %s...\n", CONFIG_TIMER5_DEVPATH);
tmrinfo("Initializing %s...\n", CONFIG_TIMER5_DEVPATH);
sam_tcinitialize(CONFIG_TIMER5_DEVPATH, SAM_IRQ_TC5);
#endif
#if defined(CONFIG_SAM34_RTT)
tcinfo("Initializing %s...\n", CONFIG_RTT_DEVPATH);
tmrinfo("Initializing %s...\n", CONFIG_RTT_DEVPATH);
sam_rttinitialize(CONFIG_RTT_DEVPATH);
#endif
@ -206,23 +178,23 @@ int sam_timerinitialize(void)
!defined(CONFIG_SUPPRESS_TIMER_INTS)
/* System Timer Initialization */
tcinfo("Opening %s\n", CONFIG_SAM4S_XPLAINED_PRO_SCHED_TIMER_DEVPATH);
tmrinfo("Opening %s\n", CONFIG_SAM4S_XPLAINED_PRO_SCHED_TIMER_DEVPATH);
fd = open(CONFIG_SAM4S_XPLAINED_PRO_SCHED_TIMER_DEVPATH, O_RDONLY);
if (fd < 0)
{
tcerr("ERROR: open %s failed: %d\n",
tmrerr("ERROR: open %s failed: %d\n",
CONFIG_SAM4S_XPLAINED_PRO_SCHED_TIMER_DEVPATH, errno);
goto errout;
}
/* Set the timeout */
tcinfo("Interval = %d us.\n", (unsigned long)USEC_PER_TICK);
tmrinfo("Interval = %d us.\n", (unsigned long)USEC_PER_TICK);
ret = ioctl(fd, TCIOC_SETTIMEOUT, (unsigned long)USEC_PER_TICK);
if (ret < 0)
{
tcerr("ERROR: ioctl(TCIOC_SETTIMEOUT) failed: %d\n", errno);
tmrerr("ERROR: ioctl(TCIOC_SETTIMEOUT) failed: %d\n", errno);
goto errout_with_dev;
}
@ -235,18 +207,18 @@ int sam_timerinitialize(void)
ret = ioctl(fd, TCIOC_SETHANDLER, (unsigned long)&tccb);
if (ret < 0)
{
tcerr("ERROR: ioctl(TCIOC_SETHANDLER) failed: %d\n", errno);
tmrerr("ERROR: ioctl(TCIOC_SETHANDLER) failed: %d\n", errno);
goto errout_with_dev;
}
}
/* Start the timer */
tcinfo("Starting.\n");
tmrinfo("Starting.\n");
ret = ioctl(fd, TCIOC_START, 0);
if (ret < 0)
{
tcerr("ERROR: ioctl(TCIOC_START) failed: %d\n", errno);
tmrerr("ERROR: ioctl(TCIOC_START) failed: %d\n", errno);
goto errout_with_dev;
}
#endif
@ -254,25 +226,25 @@ int sam_timerinitialize(void)
#if defined(CONFIG_SCHED_CPULOAD) && defined(CONFIG_SCHED_CPULOAD_EXTCLK)
/* CPU Load initialization */
tcinfo("Opening %s\n", CONFIG_SAM4S_XPLAINED_PRO_CPULOAD_TIMER_DEVPATH);
tmrinfo("Opening %s\n", CONFIG_SAM4S_XPLAINED_PRO_CPULOAD_TIMER_DEVPATH);
fd = open(CONFIG_SAM4S_XPLAINED_PRO_CPULOAD_TIMER_DEVPATH, O_RDONLY);
if (fd < 0)
{
tcerr("ERROR: open %s failed: %d\n",
tmrerr("ERROR: open %s failed: %d\n",
CONFIG_SAM4S_XPLAINED_PRO_CPULOAD_TIMER_DEVPATH, errno);
goto errout;
}
/* Set the timeout */
tcinfo("Interval = %d us.\n", (unsigned long)1000000 / CONFIG_SCHED_CPULOAD_TICKSPERSEC);
tmrinfo("Interval = %d us.\n", (unsigned long)1000000 / CONFIG_SCHED_CPULOAD_TICKSPERSEC);
ret = ioctl(fd, TCIOC_SETTIMEOUT,
(unsigned long)1000000 / CONFIG_SCHED_CPULOAD_TICKSPERSEC);
if (ret < 0)
{
tcerr("ERROR: ioctl(TCIOC_SETTIMEOUT) failed: %d\n", errno);
tmrerr("ERROR: ioctl(TCIOC_SETTIMEOUT) failed: %d\n", errno);
goto errout_with_dev;
}
@ -286,18 +258,18 @@ int sam_timerinitialize(void)
ret = ioctl(fd, TCIOC_SETHANDLER, (unsigned long)&tccb);
if (ret < 0)
{
tcerr("ERROR: ioctl(TCIOC_SETHANDLER) failed: %d\n", errno);
tmrerr("ERROR: ioctl(TCIOC_SETHANDLER) failed: %d\n", errno);
goto errout_with_dev;
}
}
/* Start the timer */
tcinfo("Starting.\n");
tmrinfo("Starting.\n");
ret = ioctl(fd, TCIOC_START, 0);
if (ret < 0)
{
tcerr("ERROR: ioctl(TCIOC_START) failed: %d\n", errno);
tmrerr("ERROR: ioctl(TCIOC_START) failed: %d\n", errno);
goto errout_with_dev;
}
#endif

4
configs/tm4c1294-launchpad/src/tm4c_timer.c
View File

@ -101,14 +101,14 @@ int tiva_timer_configure(void)
{
int ret;
timinfo("Registering TIMER%d at %s\n",
tmrinfo("Registering TIMER%d at %s\n",
GPTM, CONFIG_TM4C1294_LAUNCHPAD_TIMER_DEVNAME);
ret = tiva_timer_register(CONFIG_TM4C1294_LAUNCHPAD_TIMER_DEVNAME,
GPTM, ALTCLK);
if (ret < 0)
{
timerr("ERROR: Failed to register timer driver: %d\n", ret);
tmrerr("ERROR: Failed to register timer driver: %d\n", ret);
}
return ret;

18
drivers/timers/timer.c
View File

@ -57,24 +57,6 @@
#ifdef CONFIG_TIMER
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the timer driver */
#ifdef CONFIG_DEBUG_TIMER
# define tmrerr err
# define tmrinfo info
# define tmrllerr llerr
# define tmrllinfo llinfo
#else
# define tmrerr(x...)
# define tmrinfo(x...)
# define tmrllerr(x...)
# define tmrllinfo(x...)
#endif
/****************************************************************************
* Private Type Definitions
****************************************************************************/

64
include/debug.h
View File

@ -741,6 +741,30 @@
# define spillinfo(x...)
#endif
#ifdef CONFIG_DEBUG_TIMER_ERROR
# define tmrerr(format, ...) err(format, ##__VA_ARGS__)
# define tmrllerr(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define tmrerr(x...)
# define tmrllerr(x...)
#endif
#ifdef CONFIG_DEBUG_TIMER_WARN
# define tmrwarn(format, ...) warn(format, ##__VA_ARGS__)
# define tmrllwarn(format, ...) llwarn(format, ##__VA_ARGS__)
#else
# define tmrwarn(x...)
# define tmrllwarn(x...)
#endif
#ifdef CONFIG_DEBUG_TIMER_INFO
# define tmrinfo(format, ...) info(format, ##__VA_ARGS__)
# define tmrllinfo(format, ...) llinfo(format, ##__VA_ARGS__)
#else
# define tmrinfo(x...)
# define tmrllinfo(x...)
#endif
#ifdef CONFIG_DEBUG_USB_ERROR
# define uerr(format, ...) err(format, ##__VA_ARGS__)
# define ullerr(format, ...) llerr(format, ##__VA_ARGS__)
@ -1378,6 +1402,30 @@
# define spillinfo (void)
#endif
#ifdef CONFIG_DEBUG_TIMER_ERROR
# define tmrerr err
# define tmrllerr llerr
#else
# define tmrerr (void)
# define tmrllerr (void)
#endif
#ifdef CONFIG_DEBUG_TIMER_WARN
# define tmrwarn warn
# define tmrllwarn llwarn
#else
# define tmrwarn (void)
# define tmrllwarn (void)
#endif
#ifdef CONFIG_DEBUG_TIMER_INFO
# define tmrinfo info
# define tmrllinfo llinfo
#else
# define tmrinfo (void)
# define tmrllinfo (void)
#endif
#ifdef CONFIG_DEBUG_USB_ERROR
# define uerr err
# define ullerr llerr
@ -1612,6 +1660,22 @@
# define sninfodumpbuffer(m,b,n)
#endif
#ifdef CONFIG_DEBUG_SPI
# define spierrdumpbuffer(m,b,n) errdumpbuffer(m,b,n)
# define spiinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
#else
# define spierrdumpbuffer(m,b,n)
# define spiinfodumpbuffer(m,b,n)
#endif
#ifdef CONFIG_DEBUG_TIMER
# define tmrerrdumpbuffer(m,b,n) errdumpbuffer(m,b,n)
# define tmrinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)
#else
# define tmrerrdumpbuffer(m,b,n)
# define tmrinfodumpbuffer(m,b,n)
#endif
#ifdef CONFIG_DEBUG_USB
# define uerrdumpbuffer(m,b,n) errdumpbuffer(m,b,n)
# define uinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n)