Fix a few compile bugs and minor corrections to the mikroe-stm32f4 configuration source. From Ken Pettit
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@ -231,9 +231,9 @@
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/* SPI - Onboard devices use SPI3, plus SPI2 routes to the I/O header */
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/* SPI - Onboard devices use SPI3, plus SPI2 routes to the I/O header */
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#define GPIO_SPI2_MISO GPIO_SPI3_MISO_2
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#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
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#define GPIO_SPI2_MOSI GPIO_SPI3_MOSI_2
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#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
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#define GPIO_SPI2_SCK GPIO_SPI3_SCK_2
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#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
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#define DMACHAN_SPI2_RX DMAMAP_SPI2_RX
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#define DMACHAN_SPI2_RX DMAMAP_SPI2_RX
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#define DMACHAN_SPI2_TX DMAMAP_SPI2_TX
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#define DMACHAN_SPI2_TX DMAMAP_SPI2_TX
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@ -277,6 +277,7 @@ int nsh_archinitialize(void)
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partno++;
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partno++;
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}
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}
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}
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#else /* CONFIG_MIKROE_FLASH_PART */
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#else /* CONFIG_MIKROE_FLASH_PART */
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/* Configure the device with no partition support */
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/* Configure the device with no partition support */
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@ -285,7 +286,6 @@ int nsh_archinitialize(void)
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#endif /* CONFIG_MIKROE_FLASH_PART */
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#endif /* CONFIG_MIKROE_FLASH_PART */
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}
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}
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}
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/* Create a RAM MTD device if configured */
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/* Create a RAM MTD device if configured */
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@ -160,7 +160,7 @@
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#define TC_PENDOWN_POLL_TICKS MSEC2TICK(40) /* Active polling rate: 40 MSec */
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#define TC_PENDOWN_POLL_TICKS MSEC2TICK(40) /* Active polling rate: 40 MSec */
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#define TC_DEBOUNCE_TICKS MSEC2TICK(16) /* Delay before re-sampling: 16 MSec */
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#define TC_DEBOUNCE_TICKS MSEC2TICK(16) /* Delay before re-sampling: 16 MSec */
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#define TC_SAMPLE_TICKS MSEC2TICK(4) /* Delay for A/D sampling: 4 MSec */
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#define TC_SAMPLE_TICKS MSEC2TICK(4) /* Delay for A/D sampling: 4 MSec */
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#define TC_SETTLE_TICKS MSECT2TICK(10) /* Delay for A/D settling: 10 MSec */
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#define TC_SETTLE_TICKS MSEC2TICK(10) /* Delay for A/D settling: 10 MSec */
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#define TC_RESAMPLE_TICKS TC_SAMPLE_TICKS
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#define TC_RESAMPLE_TICKS TC_SAMPLE_TICKS
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/************************************************************************************
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/************************************************************************************
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