diff --git a/boards/arm/stm32/common/src/stm32_ssd1306.c b/boards/arm/stm32/common/src/stm32_ssd1306.c
index a9ee58e0ad..cdb66b808f 100644
--- a/boards/arm/stm32/common/src/stm32_ssd1306.c
+++ b/boards/arm/stm32/common/src/stm32_ssd1306.c
@@ -80,7 +80,7 @@ FAR struct lcd_dev_s    *g_lcddev;
 
 int board_ssd1306_initialize(int busno)
 {
-  FAR struct i2c_master_s* i2c;
+  FAR struct i2c_master_s *i2c;
 
   /* Initialize I2C */
 
@@ -125,4 +125,3 @@ FAR struct lcd_dev_s *board_ssd1306_getdev(void)
 {
   return g_lcddev;
 }
-
diff --git a/boards/arm/stm32/stm32_tiny/include/board.h b/boards/arm/stm32/stm32_tiny/include/board.h
index 550656d273..5f0b60c979 100644
--- a/boards/arm/stm32/stm32_tiny/include/board.h
+++ b/boards/arm/stm32/stm32_tiny/include/board.h
@@ -59,7 +59,9 @@
 
 #define STM32_BOARD_XTAL        8000000ul
 
-/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */
+/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is
+ * 8MHz (XTAL) x 9 = 72MHz
+ */
 
 #define STM32_CFGR_PLLSRC       RCC_CFGR_PLLSRC
 #define STM32_CFGR_PLLXTPRE     0
@@ -108,7 +110,8 @@
 
 /* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
  * otherwise frequency is 2xAPBx.
- * Note: TIM1,8 are on APB2, others on APB1 */
+ * Note: TIM1,8 are on APB2, others on APB1
+ */
 
 #define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
 #define BOARD_TIM2_FREQUENCY    STM32_HCLK_FREQUENCY
diff --git a/boards/arm/stm32/stm32_tiny/src/stm32_tiny.h b/boards/arm/stm32/stm32_tiny/src/stm32_tiny.h
index 89680e450f..a0aa35959a 100644
--- a/boards/arm/stm32/stm32_tiny/src/stm32_tiny.h
+++ b/boards/arm/stm32/stm32_tiny/src/stm32_tiny.h
@@ -60,7 +60,8 @@
 #  undef CONFIG_STM32_SPI2
 #endif
 
-/* GPIOs **************************************************************/
+/* GPIOs ********************************************************************/
+
 /* LEDs */
 
 #define GPIO_LED        (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
@@ -78,7 +79,8 @@
 
 /* PWM
  *
- * Let's use the LED.  It is connected to PB.5, which can be used as PWM output of channel 2 of timer 3
+ * Let's use the LED.  It is connected to PB.5, which can be used as
+ * PWM output of channel 2 of timer 3
  * (STM32_TIM3_PARTIAL_REMAP must be enabled)
  */
 
@@ -101,14 +103,15 @@
 #ifndef __ASSEMBLY__
 
 /****************************************************************************
- * Public Functions
+ * Public Function Prototypes
  ****************************************************************************/
 
 /****************************************************************************
  * Name: stm32_spidev_initialize
  *
  * Description:
- *   Called to configure SPI chip select GPIO pins for the Hy-Mini STM32v board.
+ *   Called to configure SPI chip select GPIO pins for the Hy-Mini STM32v
+ *   board.
  *
  ****************************************************************************/
 
diff --git a/boards/arm/stm32/stm32f103-minimum/include/board.h b/boards/arm/stm32/stm32f103-minimum/include/board.h
index c19f46ecc9..14de351396 100644
--- a/boards/arm/stm32/stm32f103-minimum/include/board.h
+++ b/boards/arm/stm32/stm32f103-minimum/include/board.h
@@ -50,13 +50,15 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* Clocking *************************************************************************/
+/* Clocking *****************************************************************/
 
 /* On-board crystal frequency is 8MHz (HSE) */
 
 #define STM32_BOARD_XTAL        8000000ul
 
-/* PLL source is HSE/1, PLL multiplier is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */
+/* PLL source is HSE/1, PLL multiplier is 9: PLL frequency is
+ * 8MHz (XTAL) x 9 = 72MHz
+ */
 
 #define STM32_CFGR_PLLSRC       RCC_CFGR_PLLSRC
 #define STM32_CFGR_PLLXTPRE     0
@@ -105,7 +107,8 @@
 
 /* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
  * otherwise frequency is 2xAPBx.
- * Note: TIM1,8 are on APB2, others on APB1 */
+ * Note: TIM1,8 are on APB2, others on APB1
+ */
 
 #define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
 #define BOARD_TIM2_FREQUENCY    STM32_PCLK1_FREQUENCY
@@ -146,7 +149,7 @@
 #  define SDIO_SDXFR_CLKDIV     (3 << SDIO_CLKCR_CLKDIV_SHIFT)
 #endif
 
-/* BUTTON definitions ***************************************************************/
+/* BUTTON definitions *******************************************************/
 
 #define NUM_BUTTONS       2
 
@@ -155,7 +158,7 @@
 #define BUTTON_USER1_BIT  (1 << BUTTON_USER1)
 #define BUTTON_USER2_BIT  (1 << BUTTON_USER2)
 
-/* LED definitions ******************************************************************/
+/* LED definitions **********************************************************/
 
 /* Define how many LEDs this board has (needed by userleds) */
 
@@ -177,7 +180,8 @@
  * The STM32F103-Minimum has no real on-board PWM devices, but the board can
  * be configured to output a pulse train using TIM3 CH3 on PB0.
  *
- * Note: we don't need redefine GPIO_TIM3_CH3OUT because PB0 is not remap pin.
+ * Note: we don't need redefine GPIO_TIM3_CH3OUT because PB0 is not
+ * remap pin.
  */
 
 /* RGB LED
diff --git a/boards/arm/stm32/stm32f4discovery/src/stm32f4discovery.h b/boards/arm/stm32/stm32f4discovery/src/stm32f4discovery.h
index bfb7fe17f1..67b8b73c29 100644
--- a/boards/arm/stm32/stm32f4discovery/src/stm32f4discovery.h
+++ b/boards/arm/stm32/stm32f4discovery/src/stm32f4discovery.h
@@ -329,8 +329,8 @@
  * 7  A0|D/C     | 9 A0|D/C  | P2 PB8 (Arbitrary selection)
  * 9  LED+ (N/C) | -----     | -----
  * 2  5V Vcc     | 1,2 Vcc   | P2 5V
- * 4  DI         | 18 D1/SI  | P1 PA7 (GPIO_SPI1_MOSI == GPIO_SPI1_MOSI_1 (1))
- * 6  SCLK       | 19 D0/SCL | P1 PA5 (GPIO_SPI1_SCK == GPIO_SPI1_SCK_1 (1))
+ * 4  DI         | 18 D1/SI  | P1 PA7 (GPIO_SPI1_MOSI == GPIO_SPI1_MOSI_1(1))
+ * 6  SCLK       | 19 D0/SCL | P1 PA5 (GPIO_SPI1_SCK == GPIO_SPI1_SCK_1(1))
  * 8  LED- (N/C) | -----     | ------
  * 10 GND        | 20 GND    | P2 GND
  * --------------+-----------+----------------------------------------------