diff --git a/arch/arm/src/tms570/tms570_gio.c b/arch/arm/src/tms570/tms570_gio.c
index e84cbdde3e..1f2a372fef 100644
--- a/arch/arm/src/tms570/tms570_gio.c
+++ b/arch/arm/src/tms570/tms570_gio.c
@@ -50,7 +50,7 @@
 #include "up_internal.h"
 #include "up_arch.h"
 
-#include "chip/tms570_gio.h"
+#include "chip/tms570_gio.h"
 #include "tms570_gio.h"
 
 /****************************************************************************
@@ -73,15 +73,15 @@ static const char g_portchar[TMS570_NPORTS] =
 #if TMS570_NPORTS > 4
   , 'E'
 #endif
-#if TMS570_NPORTS > 5
-  , 'F'
-#endif
-#if TMS570_NPORTS > 6
-  , 'G'
-#endif
-#if TMS570_NPORTS > 7
-  , 'H'
-#endif
+#if TMS570_NPORTS > 5
+  , 'F'
+#endif
+#if TMS570_NPORTS > 6
+  , 'G'
+#endif
+#if TMS570_NPORTS > 7
+  , 'H'
+#endif
 };
 #endif
 
@@ -89,27 +89,27 @@ static const char g_portchar[TMS570_NPORTS] =
  * Public Functions
  ****************************************************************************/
 
-/****************************************************************************
- * Name: tms570_gio_initialize
- *
- * Description:
- *   Take the GIO block out of reset and assure that it is ready for use.
- *
- ****************************************************************************/
-
-int tms570_gio_initialize(void)
-{
-  /* Take the GIO block out of reset */
-
-  putreg32(GIO_GCR0_RESET, TMS570_GIO_GCR0);
-
-  /* Disable all pin interrupts on the pin.  Make sure they are all level 0. */
-
-  putreg32(0xffffffff, TMS570_GIO_ENACLR);
-  putreg32(0xffffffff, TMS570_GIO_LVLCLR);
-  return OK;
-}
-
+/****************************************************************************
+ * Name: tms570_gio_initialize
+ *
+ * Description:
+ *   Take the GIO block out of reset and assure that it is ready for use.
+ *
+ ****************************************************************************/
+
+int tms570_gio_initialize(void)
+{
+  /* Take the GIO block out of reset */
+
+  putreg32(GIO_GCR0_RESET, TMS570_GIO_GCR0);
+
+  /* Disable all pin interrupts on the pin.  Make sure they are all level 0. */
+
+  putreg32(0xffffffff, TMS570_GIO_ENACLR);
+  putreg32(0xffffffff, TMS570_GIO_LVLCLR);
+  return OK;
+}
+
 /****************************************************************************
  * Name: tms570_configgio
  *
@@ -120,111 +120,111 @@ int tms570_gio_initialize(void)
 
 int tms570_configgio(gio_pinset_t cfgset)
 {
-  uint32_t port = tms570_gio_port(cfgset);
+  uint32_t port = tms570_gio_port(cfgset);
   uintptr_t base = tms570_gio_base(cfgset);
-  uint32_t pin = tms570_gio_pin(cfgset);
-  uint32_t pinmask = tms570_gio_pinmask(cfgset);
+  uint32_t pin = tms570_gio_pin(cfgset);
+  uint32_t pinmask = tms570_gio_pinmask(cfgset);
   uint32_t regval;
   irqstate_t flags;
 
   /* Disable interrupts to prohibit re-entrance. */
 
-  flags = irqsave();
-
-  /* Force the pin to be an input for now */
-
-  regval  = getreg32(base + TMS570_GIO_DIR_OFFSET);
-  regval &= ~pinmask;
-  putreg32(regval, base + TMS570_GIO_DIR_OFFSET);
-
-  /* Disable interrupts on the pin.  Make sure this is a level 0 pin. */
-
-  putreg32(GIO_ENACLR_PORT_PIN(port, pin), TMS570_GIO_ENACLR);
-  putreg32(GIO_LVLCLR_PORT_PIN(port, pin), TMS570_GIO_LVLCLR);
-
-  /* Setup settings common to both input and output pins */
-  /* Enable/disable the pull-up/down as requested */
-
-  switch (cfgset & GIO_CFG_MASK)
-    {
-      case GIO_CFG_DEFAULT: /* Default, no attribute */
-      default:
-        {
-          /* Disable pull functionality */
-
-          regval  = getreg32(base + TMS570_GIO_PULDIS_OFFSET);
-          regval &= ~pinmask;
-          putreg32(regval, base + TMS570_GIO_PULDIS_OFFSET);
-        }
-        break;
-
-      case GIO_CFG_PULLUP: /* Internal pull-up */
-        {
-          /* Select pull-up */
-
-          regval  = getreg32(base + TMS570_GIO_PSL_OFFSET);
-          regval |= pinmask;
-          putreg32(regval, base + TMS570_GIO_PSL_OFFSET);
-
-          /* Enable pull functionality */
-
-          regval  = getreg32(base + TMS570_GIO_PULDIS_OFFSET);
-          regval |= pinmask;
-          putreg32(regval, base + TMS570_GIO_PULDIS_OFFSET);
-        }
-        break;
-
-      case GIO_CFG_PULLDOWN: /* Internal pull-down */
-        {
-          /* Select pull-down */
-
-          regval  = getreg32(base + TMS570_GIO_PSL_OFFSET);
-          regval |= pinmask;
-          putreg32(regval, base + TMS570_GIO_PSL_OFFSET);
-
-          /* Enable pull functionality */
-
-          regval  = getreg32(base + TMS570_GIO_DIR_OFFSET);
-          regval |= pinmask;
-          putreg32(regval, base + TMS570_GIO_DIR_OFFSET);
-        }
-        break;
-    }
-
+  flags = irqsave();
+
+  /* Force the pin to be an input for now */
+
+  regval  = getreg32(base + TMS570_GIO_DIR_OFFSET);
+  regval &= ~pinmask;
+  putreg32(regval, base + TMS570_GIO_DIR_OFFSET);
+
+  /* Disable interrupts on the pin.  Make sure this is a level 0 pin. */
+
+  putreg32(GIO_ENACLR_PORT_PIN(port, pin), TMS570_GIO_ENACLR);
+  putreg32(GIO_LVLCLR_PORT_PIN(port, pin), TMS570_GIO_LVLCLR);
+
+  /* Setup settings common to both input and output pins */
+  /* Enable/disable the pull-up/down as requested */
+
+  switch (cfgset & GIO_CFG_MASK)
+    {
+      case GIO_CFG_DEFAULT: /* Default, no attribute */
+      default:
+        {
+          /* Disable pull functionality */
+
+          regval  = getreg32(base + TMS570_GIO_PULDIS_OFFSET);
+          regval &= ~pinmask;
+          putreg32(regval, base + TMS570_GIO_PULDIS_OFFSET);
+        }
+        break;
+
+      case GIO_CFG_PULLUP: /* Internal pull-up */
+        {
+          /* Select pull-up */
+
+          regval  = getreg32(base + TMS570_GIO_PSL_OFFSET);
+          regval |= pinmask;
+          putreg32(regval, base + TMS570_GIO_PSL_OFFSET);
+
+          /* Enable pull functionality */
+
+          regval  = getreg32(base + TMS570_GIO_PULDIS_OFFSET);
+          regval |= pinmask;
+          putreg32(regval, base + TMS570_GIO_PULDIS_OFFSET);
+        }
+        break;
+
+      case GIO_CFG_PULLDOWN: /* Internal pull-down */
+        {
+          /* Select pull-down */
+
+          regval  = getreg32(base + TMS570_GIO_PSL_OFFSET);
+          regval |= pinmask;
+          putreg32(regval, base + TMS570_GIO_PSL_OFFSET);
+
+          /* Enable pull functionality */
+
+          regval  = getreg32(base + TMS570_GIO_DIR_OFFSET);
+          regval |= pinmask;
+          putreg32(regval, base + TMS570_GIO_DIR_OFFSET);
+        }
+        break;
+    }
+
   /* Then do unique operations for an output pin */
-
+
   if ((cfgset & GIO_MODE_MASK) == GIO_OUTPUT)
     {
-      /* Enable the open drain driver if requested */
-
-      regval = getreg32(base + TMS570_GIO_PDR_OFFSET);
-      if ((cfgset & GIO_OPENDRAIN) != 0)
-        {
-          regval |= pinmask;
-        }
-      else
-        {
-          regval &= ~pinmask;
-        }
-
-      putreg32(regval, base + TMS570_GIO_PDR_OFFSET);
-
-      /* Set default output value */
-
-      if ((cfgset & GIO_OUTPUT_SET) != 0)
-       {
-          putreg32(pinmask, base + TMS570_GIO_DSET_OFFSET);
-        }
-      else
-        {
-          putreg32(pinmask, base + TMS570_GIO_DCLR_OFFSET);
-        }
-
-      /* Finally, configure the pin as an output */
-
-      regval  = getreg32(base + TMS570_GIO_DIR_OFFSET);
-      regval |= pinmask;
-      putreg32(regval, base + TMS570_GIO_DIR_OFFSET);
+      /* Enable the open drain driver if requested */
+
+      regval = getreg32(base + TMS570_GIO_PDR_OFFSET);
+      if ((cfgset & GIO_OPENDRAIN) != 0)
+        {
+          regval |= pinmask;
+        }
+      else
+        {
+          regval &= ~pinmask;
+        }
+
+      putreg32(regval, base + TMS570_GIO_PDR_OFFSET);
+
+      /* Set default output value */
+
+      if ((cfgset & GIO_OUTPUT_SET) != 0)
+       {
+          putreg32(pinmask, base + TMS570_GIO_DSET_OFFSET);
+        }
+      else
+        {
+          putreg32(pinmask, base + TMS570_GIO_DCLR_OFFSET);
+        }
+
+      /* Finally, configure the pin as an output */
+
+      regval  = getreg32(base + TMS570_GIO_DIR_OFFSET);
+      regval |= pinmask;
+      putreg32(regval, base + TMS570_GIO_DIR_OFFSET);
     }
 
   irqrestore(flags);
@@ -295,35 +295,35 @@ int tms570_dumpgio(uint32_t pinset, const char *msg)
   uintptr_t     base;
   unsigned int  port;
 
-  lldbg("GIO%c pinset: %08x base: %08x -- %s\n",
-        g_portchar[port], pinset, base, msg);
-
-  /* Get the base address associated with the GIO port */
-
-  port = (pinset & GIO_PORT_MASK) >> GIO_PORT_SHIFT;
-  base = TMS570_GIO_PORTBASE(port);
-
+  lldbg("GIO%c pinset: %08x base: %08x -- %s\n",
+        g_portchar[port], pinset, base, msg);
+
+  /* Get the base address associated with the GIO port */
+
+  port = (pinset & GIO_PORT_MASK) >> GIO_PORT_SHIFT;
+  base = TMS570_GIO_PORTBASE(port);
+
   /* The following requires exclusive access to the GIO registers */
 
-  flags = irqsave();
-
-  /* Show global GIO registers */
-
-  lldbg("   GCR0: %08x INTDET: %08x    POL: %08x   ENA: %08x\n",
-        getreg32(TMS570_GIO_GCR0), getreg32(TMS570_GIO_INTDET),
-        getreg32(TMS570_GIO_POL), getreg32(TMS570_GIO_ENASET));
-  lldbg("    LVL: %08x    FLG: %08x   EMU1: %08x   EMU2: %08x\n",
-        getreg32(TMS570_GIO_LVLSET), getreg32(TMS570_GIO_FLG),
-        getreg32(TMS570_GIO_EMU1), getreg32(TMS570_GIO_EMU2));
+  flags = irqsave();
+
+  /* Show global GIO registers */
+
+  lldbg("   GCR0: %08x INTDET: %08x    POL: %08x   ENA: %08x\n",
+        getreg32(TMS570_GIO_GCR0), getreg32(TMS570_GIO_INTDET),
+        getreg32(TMS570_GIO_POL), getreg32(TMS570_GIO_ENASET));
+  lldbg("    LVL: %08x    FLG: %08x   EMU1: %08x   EMU2: %08x\n",
+        getreg32(TMS570_GIO_LVLSET), getreg32(TMS570_GIO_FLG),
+        getreg32(TMS570_GIO_EMU1), getreg32(TMS570_GIO_EMU2));
+
+  /* Port specific registers */
+
+  lldbg("    DIR: %08x    DIN: %08x   DOUT: %08x    PDR: %08x\n",
+        getreg32(base + TMS570_GIO_DIR_OFFSET), getreg32(base + TMS570_GIO_DIN_OFFSET),
+        getreg32(base + TMS570_GIO_DOUT_OFFSET), getreg32(base + TMS570_GIO_PDR_OFFSET));
+  lldbg(" PULDIS: %08x    PSL: %08x\n",
+        getreg32(base + TMS570_GIO_PULDIS_OFFSET), getreg32(base + TMS570_GIO_PSL_OFFSET));
 
-  /* Port specific registers */
-
-  lldbg("    DIR: %08x    DIN: %08x   DOUT: %08x    PDR: %08x\n",
-        getreg32(base + TMS570_GIO_DIR_OFFSET), getreg32(base + TMS570_GIO_DIN_OFFSET),
-        getreg32(base + TMS570_GIO_DOUT_OFFSET), getreg32(base + TMS570_GIO_PDR_OFFSET));
-  lldbg(" PULDIS: %08x    PSL: %08x\n",
-        getreg32(base + TMS570_GIO_PULDIS_OFFSET), getreg32(base + TMS570_GIO_PSL_OFFSET));
-
   irqrestore(flags);
   return OK;
 }