From 3857d7491f0837dae7a2d492c285aaa91c3b09e4 Mon Sep 17 00:00:00 2001 From: YAMAMOTO Takashi Date: Fri, 5 Mar 2021 15:15:02 +0900 Subject: [PATCH] esp32: Extract memory layout definitions to a separate header --- arch/xtensa/include/esp32/memory_layout.h | 112 +++++++++++++++++++++ arch/xtensa/src/esp32/esp32_allocateheap.c | 69 +------------ arch/xtensa/src/esp32/esp32_imm.c | 21 +--- 3 files changed, 114 insertions(+), 88 deletions(-) create mode 100644 arch/xtensa/include/esp32/memory_layout.h diff --git a/arch/xtensa/include/esp32/memory_layout.h b/arch/xtensa/include/esp32/memory_layout.h new file mode 100644 index 0000000000..443dcc2645 --- /dev/null +++ b/arch/xtensa/include/esp32/memory_layout.h @@ -0,0 +1,112 @@ +/**************************************************************************** + * arch/xtensa/include/esp32/memory_layout.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* The heap overview: + * + * CONFIG_HEAP2_BASE eg. 3f80 0000 + * : + * : g_mmheap region3 (CONFIG_ESP32_SPIRAM) + * : + * CONFIG_HEAP2_BASE + CONFIG_HEAP2_SIZE eg. 3fc0 0000 + * + * _sheap eg. 3ffc 8c6c + * : + * : g_iheap (CONFIG_XTENSA_IMEM_USE_SEPARATE_HEAP) + * : + * _sheap + CONFIG_XTENSA_IMEM_REGION_SIZE eg. 3ffd ebfc + * : + * : g_mmheap region1 + * : + * HEAP_REGION1_END 3ffd fff0 + * : + * : ROM data + * : + * HEAP_REGION2_START 3ffe 1330 or 3ffe 7e40 + * : + * : g_mmheap region2 + * : + * : about 123KB + * : + * _eheap 4000 0000 + */ + +/* Region 1 of the heap is the area from the end of the .data section to the + * beginning of the ROM data. The start address is defined from the linker + * script as "_sheap". Then end is defined here, as follows: + */ + +#ifndef HEAP_REGION1_END +#define HEAP_REGION1_END 0x3ffdfff0 +#endif + +/* Region 2 of the heap is the area from the end of the ROM data to the end + * of DRAM. The linker script has already set "_eheap" as the end of DRAM, + * the following defines the start of region2. + * N.B: That ROM data consists of 2 regions, one per CPU. If SMP is not + * enabled include APP's region with the heap. + */ + +#ifndef CONFIG_SMP +# define HEAP_REGION2_START 0x3ffe1330 +#else +# define HEAP_REGION2_START 0x3ffe7e40 +#endif + +#ifdef CONFIG_XTENSA_IMEM_USE_SEPARATE_HEAP +#define XTENSA_IMEM_REGION_SIZE CONFIG_XTENSA_IMEM_REGION_SIZE +#else +#define XTENSA_IMEM_REGION_SIZE 0 +#endif + +/* If CONFIG_XTENSA_IMEM_MAXIMIZE_HEAP_REGION is defined, it means + * using maximum separate heap for internal memory, but part of + * the available memory is reserved for the Region 1 heap. + */ + +#ifdef CONFIG_XTENSA_IMEM_MAXIMIZE_HEAP_REGION +#ifndef HEAP_REGION_OFFSET +#define HEAP_REGION_OFFSET 0x2000 +#endif +#endif diff --git a/arch/xtensa/src/esp32/esp32_allocateheap.c b/arch/xtensa/src/esp32/esp32_allocateheap.c index 06d16ea331..db7fc7f86b 100644 --- a/arch/xtensa/src/esp32/esp32_allocateheap.c +++ b/arch/xtensa/src/esp32/esp32_allocateheap.c @@ -46,6 +46,7 @@ #include #include #include +#include #include "xtensa.h" @@ -53,74 +54,6 @@ * Pre-processor Definitions ****************************************************************************/ -/* The heap overview: - * - * CONFIG_HEAP2_BASE eg. 3f80 0000 - * : - * : g_mmheap region3 (CONFIG_ESP32_SPIRAM) - * : - * CONFIG_HEAP2_BASE + CONFIG_HEAP2_SIZE eg. 3fc0 0000 - * - * _sheap eg. 3ffc 8c6c - * : - * : g_iheap (CONFIG_XTENSA_IMEM_USE_SEPARATE_HEAP) - * : - * _sheap + CONFIG_XTENSA_IMEM_REGION_SIZE eg. 3ffd ebfc - * : - * : g_mmheap region1 - * : - * HEAP_REGION1_END 3ffd fff0 - * : - * : ROM data - * : - * HEAP_REGION2_START 3ffe 1330 or 3ffe 7e40 - * : - * : g_mmheap region2 - * : - * : about 123KB - * : - * _eheap 4000 0000 - */ - -/* Region 1 of the heap is the area from the end of the .data section to the - * beginning of the ROM data. The start address is defined from the linker - * script as "_sheap". Then end is defined here, as follows: - */ - -#ifndef HEAP_REGION1_END -#define HEAP_REGION1_END 0x3ffdfff0 -#endif - -/* Region 2 of the heap is the area from the end of the ROM data to the end - * of DRAM. The linker script has already set "_eheap" as the end of DRAM, - * the following defines the start of region2. - * N.B: That ROM data consists of 2 regions, one per CPU. If SMP is not - * enabled include APP's region with the heap. - */ - -#ifndef CONFIG_SMP -# define HEAP_REGION2_START 0x3ffe1330 -#else -# define HEAP_REGION2_START 0x3ffe7e40 -#endif - -#ifdef CONFIG_XTENSA_IMEM_USE_SEPARATE_HEAP -#define XTENSA_IMEM_REGION_SIZE CONFIG_XTENSA_IMEM_REGION_SIZE -#else -#define XTENSA_IMEM_REGION_SIZE 0 -#endif - -/* If CONFIG_XTENSA_IMEM_MAXIMIZE_HEAP_REGION is defined, it means - * using maximum separate heap for internal memory, but part of - * the available memory is reserved for the Region 1 heap. - */ - -#ifdef CONFIG_XTENSA_IMEM_MAXIMIZE_HEAP_REGION -#ifndef HEAP_REGION_OFFSET -#define HEAP_REGION_OFFSET 0x2000 -#endif -#endif - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/arch/xtensa/src/esp32/esp32_imm.c b/arch/xtensa/src/esp32/esp32_imm.c index 824d5a9a77..530da5ee80 100644 --- a/arch/xtensa/src/esp32/esp32_imm.c +++ b/arch/xtensa/src/esp32/esp32_imm.c @@ -28,6 +28,7 @@ #include #include #include +#include #include "xtensa.h" @@ -37,26 +38,6 @@ * Pre-processor Definitions ****************************************************************************/ -/* Region 1 of the heap is the area from the end of the .data section to the - * begining of the ROM data. The start address is defined from the linker - * script as "_sheap". Then end is defined here, as follows: - */ - -#ifndef HEAP_REGION1_END -#define HEAP_REGION1_END 0x3ffdfff0 -#endif - -/* If define CONFIG_XTENSA_IMEM_MAXIMIZE_HEAP_REGION, it means - * using maximum separate heap for internal memory, but part of - * the available memory is reserved for the Region 1 heap. - */ - -#ifdef CONFIG_XTENSA_IMEM_MAXIMIZE_HEAP_REGION -#ifndef HEAP_REGION_OFFSET -#define HEAP_REGION_OFFSET 0x2000 -#endif -#endif - /**************************************************************************** * Private Data ****************************************************************************/